root/drivers/staging/olpc_dcon/olpc_dcon.h

INCLUDED FROM

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 #ifndef OLPC_DCON_H_
   3 #define OLPC_DCON_H_
   4 
   5 #include <linux/notifier.h>
   6 #include <linux/workqueue.h>
   7 
   8 /* DCON registers */
   9 
  10 #define DCON_REG_ID              0
  11 #define DCON_REG_MODE            1
  12 
  13 #define MODE_PASSTHRU   BIT(0)
  14 #define MODE_SLEEP      BIT(1)
  15 #define MODE_SLEEP_AUTO BIT(2)
  16 #define MODE_BL_ENABLE  BIT(3)
  17 #define MODE_BLANK      BIT(4)
  18 #define MODE_CSWIZZLE   BIT(5)
  19 #define MODE_COL_AA     BIT(6)
  20 #define MODE_MONO_LUMA  BIT(7)
  21 #define MODE_SCAN_INT   BIT(8)
  22 #define MODE_CLOCKDIV   BIT(9)
  23 #define MODE_DEBUG      BIT(14)
  24 #define MODE_SELFTEST   BIT(15)
  25 
  26 #define DCON_REG_HRES           0x2
  27 #define DCON_REG_HTOTAL         0x3
  28 #define DCON_REG_HSYNC_WIDTH    0x4
  29 #define DCON_REG_VRES           0x5
  30 #define DCON_REG_VTOTAL         0x6
  31 #define DCON_REG_VSYNC_WIDTH    0x7
  32 #define DCON_REG_TIMEOUT        0x8
  33 #define DCON_REG_SCAN_INT       0x9
  34 #define DCON_REG_BRIGHT         0xa
  35 #define DCON_REG_MEM_OPT_A      0x41
  36 #define DCON_REG_MEM_OPT_B      0x42
  37 
  38 /* Load Delay Locked Loop (DLL) settings for clock delay */
  39 #define MEM_DLL_CLOCK_DELAY     BIT(0)
  40 /* Memory controller power down function */
  41 #define MEM_POWER_DOWN          BIT(8)
  42 /* Memory controller software reset */
  43 #define MEM_SOFT_RESET          BIT(0)
  44 
  45 /* Status values */
  46 
  47 #define DCONSTAT_SCANINT        0
  48 #define DCONSTAT_SCANINT_DCON   1
  49 #define DCONSTAT_DISPLAYLOAD    2
  50 #define DCONSTAT_MISSED         3
  51 
  52 /* Source values */
  53 
  54 #define DCON_SOURCE_DCON        0
  55 #define DCON_SOURCE_CPU         1
  56 
  57 /* Interrupt */
  58 #define DCON_IRQ                6
  59 
  60 struct dcon_priv {
  61         struct i2c_client *client;
  62         struct fb_info *fbinfo;
  63         struct backlight_device *bl_dev;
  64 
  65         wait_queue_head_t waitq;
  66         struct work_struct switch_source;
  67         struct notifier_block reboot_nb;
  68 
  69         /* Shadow register for the DCON_REG_MODE register */
  70         u8 disp_mode;
  71 
  72         /* The current backlight value - this saves us some smbus traffic */
  73         u8 bl_val;
  74 
  75         /* Current source, initialized at probe time */
  76         int curr_src;
  77 
  78         /* Desired source */
  79         int pending_src;
  80 
  81         /* Variables used during switches */
  82         bool switched;
  83         ktime_t irq_time;
  84         ktime_t load_time;
  85 
  86         /* Current output type; true == mono, false == color */
  87         bool mono;
  88         bool asleep;
  89         /* This get set while controlling fb blank state from the driver */
  90         bool ignore_fb_events;
  91 };
  92 
  93 struct dcon_platform_data {
  94         int (*init)(struct dcon_priv *dcon);
  95         void (*bus_stabilize_wiggle)(void);
  96         void (*set_dconload)(int load);
  97         int (*read_status)(u8 *status);
  98 };
  99 
 100 struct dcon_gpio {
 101         const char *name;
 102         unsigned long flags;
 103 };
 104 
 105 #include <linux/interrupt.h>
 106 
 107 irqreturn_t dcon_interrupt(int irq, void *id);
 108 
 109 #ifdef CONFIG_FB_OLPC_DCON_1
 110 extern struct dcon_platform_data dcon_pdata_xo_1;
 111 #endif
 112 
 113 #ifdef CONFIG_FB_OLPC_DCON_1_5
 114 extern struct dcon_platform_data dcon_pdata_xo_1_5;
 115 #endif
 116 
 117 #endif