root/drivers/staging/rts5208/ms.h

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INCLUDED FROM


   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Driver for Realtek PCI-Express card reader
   4  *
   5  * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved.
   6  *
   7  * Author:
   8  *   Wei WANG (wei_wang@realsil.com.cn)
   9  *   Micky Ching (micky_ching@realsil.com.cn)
  10  */
  11 
  12 #ifndef __REALTEK_RTSX_MS_H
  13 #define __REALTEK_RTSX_MS_H
  14 
  15 #define MS_DELAY_WRITE
  16 
  17 #define MS_MAX_RETRY_COUNT      3
  18 
  19 #define MS_EXTRA_SIZE           0x9
  20 
  21 #define WRT_PRTCT               0x01
  22 
  23 /* Error Code */
  24 #define MS_NO_ERROR                             0x00
  25 #define MS_CRC16_ERROR                          0x80
  26 #define MS_TO_ERROR                             0x40
  27 #define MS_NO_CARD                              0x20
  28 #define MS_NO_MEMORY                            0x10
  29 #define MS_CMD_NK                               0x08
  30 #define MS_FLASH_READ_ERROR                     0x04
  31 #define MS_FLASH_WRITE_ERROR                    0x02
  32 #define MS_BREQ_ERROR                           0x01
  33 #define MS_NOT_FOUND                            0x03
  34 
  35 /* Transfer Protocol Command */
  36 #define READ_PAGE_DATA                          0x02
  37 #define READ_REG                                0x04
  38 #define GET_INT                                 0x07
  39 #define WRITE_PAGE_DATA                         0x0D
  40 #define WRITE_REG                               0x0B
  41 #define SET_RW_REG_ADRS                         0x08
  42 #define SET_CMD                                 0x0E
  43 
  44 #define PRO_READ_LONG_DATA                      0x02
  45 #define PRO_READ_SHORT_DATA                     0x03
  46 #define PRO_READ_REG                            0x04
  47 #define PRO_READ_QUAD_DATA                      0x05
  48 #define PRO_GET_INT                             0x07
  49 #define PRO_WRITE_LONG_DATA                     0x0D
  50 #define PRO_WRITE_SHORT_DATA                    0x0C
  51 #define PRO_WRITE_QUAD_DATA                     0x0A
  52 #define PRO_WRITE_REG                           0x0B
  53 #define PRO_SET_RW_REG_ADRS                     0x08
  54 #define PRO_SET_CMD                             0x0E
  55 #define PRO_EX_SET_CMD                          0x09
  56 
  57 #ifdef SUPPORT_MAGIC_GATE
  58 
  59 #define MG_GET_ID               0x40
  60 #define MG_SET_LID              0x41
  61 #define MG_GET_LEKB             0x42
  62 #define MG_SET_RD               0x43
  63 #define MG_MAKE_RMS             0x44
  64 #define MG_MAKE_KSE             0x45
  65 #define MG_SET_IBD              0x46
  66 #define MG_GET_IBD              0x47
  67 
  68 #endif
  69 
  70 #ifdef XC_POWERCLASS
  71 #define XC_CHG_POWER            0x16
  72 #endif
  73 
  74 #define BLOCK_READ      0xAA
  75 #define BLOCK_WRITE     0x55
  76 #define BLOCK_END       0x33
  77 #define BLOCK_ERASE     0x99
  78 #define FLASH_STOP      0xCC
  79 
  80 #define SLEEP           0x5A
  81 #define CLEAR_BUF       0xC3
  82 #define MS_RESET        0x3C
  83 
  84 #define PRO_READ_DATA           0x20
  85 #define PRO_WRITE_DATA          0x21
  86 #define PRO_READ_ATRB           0x24
  87 #define PRO_STOP                0x25
  88 #define PRO_ERASE               0x26
  89 #define PRO_READ_2K_DATA        0x27
  90 #define PRO_WRITE_2K_DATA       0x28
  91 
  92 #define PRO_FORMAT              0x10
  93 #define PRO_SLEEP               0x11
  94 
  95 #define IntReg                  0x01
  96 #define StatusReg0              0x02
  97 #define StatusReg1              0x03
  98 
  99 #define SystemParm              0x10
 100 #define BlockAdrs               0x11
 101 #define CMDParm                 0x14
 102 #define PageAdrs                0x15
 103 
 104 #define OverwriteFlag           0x16
 105 #define ManagemenFlag           0x17
 106 #define LogicalAdrs             0x18
 107 #define ReserveArea             0x1A
 108 
 109 #define Pro_IntReg              0x01
 110 #define Pro_StatusReg           0x02
 111 #define Pro_TypeReg             0x04
 112 #define Pro_IFModeReg           0x05
 113 #define Pro_CatagoryReg         0x06
 114 #define Pro_ClassReg            0x07
 115 
 116 #define Pro_SystemParm          0x10
 117 #define Pro_DataCount1          0x11
 118 #define Pro_DataCount0          0x12
 119 #define Pro_DataAddr3           0x13
 120 #define Pro_DataAddr2           0x14
 121 #define Pro_DataAddr1           0x15
 122 #define Pro_DataAddr0           0x16
 123 
 124 #define Pro_TPCParm             0x17
 125 #define Pro_CMDParm             0x18
 126 
 127 #define INT_REG_CED             0x80
 128 #define INT_REG_ERR             0x40
 129 #define INT_REG_BREQ            0x20
 130 #define INT_REG_CMDNK           0x01
 131 
 132 #define BLOCK_BOOT              0xC0
 133 #define BLOCK_OK                0x80
 134 #define PAGE_OK                 0x60
 135 #define DATA_COMPL              0x10
 136 
 137 #define NOT_BOOT_BLOCK          0x4
 138 #define NOT_TRANSLATION_TABLE   0x8
 139 
 140 #define HEADER_ID0              PPBUF_BASE2
 141 #define HEADER_ID1              (PPBUF_BASE2 + 1)
 142 #define DISABLED_BLOCK0         (PPBUF_BASE2 + 0x170 + 4)
 143 #define DISABLED_BLOCK1         (PPBUF_BASE2 + 0x170 + 5)
 144 #define DISABLED_BLOCK2         (PPBUF_BASE2 + 0x170 + 6)
 145 #define DISABLED_BLOCK3         (PPBUF_BASE2 + 0x170 + 7)
 146 #define BLOCK_SIZE_0            (PPBUF_BASE2 + 0x1a0 + 2)
 147 #define BLOCK_SIZE_1            (PPBUF_BASE2 + 0x1a0 + 3)
 148 #define BLOCK_COUNT_0           (PPBUF_BASE2 + 0x1a0 + 4)
 149 #define BLOCK_COUNT_1           (PPBUF_BASE2 + 0x1a0 + 5)
 150 #define EBLOCK_COUNT_0          (PPBUF_BASE2 + 0x1a0 + 6)
 151 #define EBLOCK_COUNT_1          (PPBUF_BASE2 + 0x1a0 + 7)
 152 #define PAGE_SIZE_0             (PPBUF_BASE2 + 0x1a0 + 8)
 153 #define PAGE_SIZE_1             (PPBUF_BASE2 + 0x1a0 + 9)
 154 
 155 #define MS_Device_Type          (PPBUF_BASE2 + 0x1D8)
 156 
 157 #define MS_4bit_Support         (PPBUF_BASE2 + 0x1D3)
 158 
 159 #define setPS_NG        1
 160 #define setPS_Error     0
 161 
 162 #define PARALLEL_8BIT_IF        0x40
 163 #define PARALLEL_4BIT_IF        0x00
 164 #define SERIAL_IF               0x80
 165 
 166 #define BUF_FULL        0x10
 167 #define BUF_EMPTY       0x20
 168 
 169 #define MEDIA_BUSY      0x80
 170 #define FLASH_BUSY      0x40
 171 #define DATA_ERROR      0x20
 172 #define STS_UCDT        0x10
 173 #define EXTRA_ERROR     0x08
 174 #define STS_UCEX        0x04
 175 #define FLAG_ERROR      0x02
 176 #define STS_UCFG        0x01
 177 
 178 #define MS_SHORT_DATA_LEN       32
 179 
 180 #define FORMAT_SUCCESS          0
 181 #define FORMAT_FAIL             1
 182 #define FORMAT_IN_PROGRESS      2
 183 
 184 #define MS_SET_BAD_BLOCK_FLG(ms_card)   ((ms_card)->multi_flag |= 0x80)
 185 #define MS_CLR_BAD_BLOCK_FLG(ms_card)   ((ms_card)->multi_flag &= 0x7F)
 186 #define MS_TST_BAD_BLOCK_FLG(ms_card)   ((ms_card)->multi_flag & 0x80)
 187 
 188 void mspro_polling_format_status(struct rtsx_chip *chip);
 189 
 190 void mspro_stop_seq_mode(struct rtsx_chip *chip);
 191 int reset_ms_card(struct rtsx_chip *chip);
 192 int ms_rw(struct scsi_cmnd *srb, struct rtsx_chip *chip,
 193           u32 start_sector, u16 sector_cnt);
 194 int mspro_format(struct scsi_cmnd *srb, struct rtsx_chip *chip,
 195                  int short_data_len, bool quick_format);
 196 void ms_free_l2p_tbl(struct rtsx_chip *chip);
 197 void ms_cleanup_work(struct rtsx_chip *chip);
 198 int ms_power_off_card3v3(struct rtsx_chip *chip);
 199 int release_ms_card(struct rtsx_chip *chip);
 200 #ifdef MS_DELAY_WRITE
 201 int ms_delay_write(struct rtsx_chip *chip);
 202 #endif
 203 
 204 #ifdef SUPPORT_MAGIC_GATE
 205 int mg_set_leaf_id(struct scsi_cmnd *srb, struct rtsx_chip *chip);
 206 int mg_get_local_EKB(struct scsi_cmnd *srb, struct rtsx_chip *chip);
 207 int mg_chg(struct scsi_cmnd *srb, struct rtsx_chip *chip);
 208 int mg_get_rsp_chg(struct scsi_cmnd *srb, struct rtsx_chip *chip);
 209 int mg_rsp(struct scsi_cmnd *srb, struct rtsx_chip *chip);
 210 int mg_get_ICV(struct scsi_cmnd *srb, struct rtsx_chip *chip);
 211 int mg_set_ICV(struct scsi_cmnd *srb, struct rtsx_chip *chip);
 212 #endif
 213 
 214 #endif  /* __REALTEK_RTSX_MS_H */

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