1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (C) 2018 Intel Corporation */
3
4 #ifndef __IPU3_CSS_FW_H
5 #define __IPU3_CSS_FW_H
6
7 /******************* Firmware file definitions *******************/
8
9 #define IMGU_FW_NAME "intel/ipu3-fw.bin"
10
11 typedef u32 imgu_fw_ptr;
12
13 enum imgu_fw_type {
14 IMGU_FW_SP_FIRMWARE, /* Firmware for the SP */
15 IMGU_FW_SP1_FIRMWARE, /* Firmware for the SP1 */
16 IMGU_FW_ISP_FIRMWARE, /* Firmware for the ISP */
17 IMGU_FW_BOOTLOADER_FIRMWARE, /* Firmware for the BootLoader */
18 IMGU_FW_ACC_FIRMWARE /* Firmware for accelerations */
19 };
20
21 enum imgu_fw_acc_type {
22 IMGU_FW_ACC_NONE, /* Normal binary */
23 IMGU_FW_ACC_OUTPUT, /* Accelerator stage on output frame */
24 IMGU_FW_ACC_VIEWFINDER, /* Accelerator stage on viewfinder frame */
25 IMGU_FW_ACC_STANDALONE, /* Stand-alone acceleration */
26 };
27
28 struct imgu_fw_isp_parameter {
29 u32 offset; /* Offset in isp_<mem> config, params, etc. */
30 u32 size; /* Disabled if 0 */
31 };
32
33 struct imgu_fw_param_memory_offsets {
34 struct {
35 struct imgu_fw_isp_parameter lin; /* lin_vmem_params */
36 struct imgu_fw_isp_parameter tnr3; /* tnr3_vmem_params */
37 struct imgu_fw_isp_parameter xnr3; /* xnr3_vmem_params */
38 } vmem;
39 struct {
40 struct imgu_fw_isp_parameter tnr;
41 struct imgu_fw_isp_parameter tnr3; /* tnr3_params */
42 struct imgu_fw_isp_parameter xnr3; /* xnr3_params */
43 struct imgu_fw_isp_parameter plane_io_config; /* 192 bytes */
44 struct imgu_fw_isp_parameter rgbir; /* rgbir_params */
45 } dmem;
46 };
47
48 struct imgu_fw_config_memory_offsets {
49 struct {
50 struct imgu_fw_isp_parameter iterator;
51 struct imgu_fw_isp_parameter dvs;
52 struct imgu_fw_isp_parameter output;
53 struct imgu_fw_isp_parameter raw;
54 struct imgu_fw_isp_parameter input_yuv;
55 struct imgu_fw_isp_parameter tnr;
56 struct imgu_fw_isp_parameter tnr3;
57 struct imgu_fw_isp_parameter ref;
58 } dmem;
59 };
60
61 struct imgu_fw_state_memory_offsets {
62 struct {
63 struct imgu_fw_isp_parameter tnr;
64 struct imgu_fw_isp_parameter tnr3;
65 struct imgu_fw_isp_parameter ref;
66 } dmem;
67 };
68
69 union imgu_fw_all_memory_offsets {
70 struct {
71 u64 imgu_fw_mem_offsets[3]; /* params, config, state */
72 } offsets;
73 struct {
74 u64 ptr;
75 } array[IMGU_ABI_PARAM_CLASS_NUM];
76 };
77
78 struct imgu_fw_binary_xinfo {
79 /* Part that is of interest to the SP. */
80 struct imgu_abi_binary_info sp;
81
82 /* Rest of the binary info, only interesting to the host. */
83 u32 type; /* enum imgu_fw_acc_type */
84
85 u32 num_output_formats __aligned(8);
86 u32 output_formats[IMGU_ABI_FRAME_FORMAT_NUM]; /* enum frame_format */
87
88 /* number of supported vf formats */
89 u32 num_vf_formats __aligned(8);
90 /* types of supported vf formats */
91 u32 vf_formats[IMGU_ABI_FRAME_FORMAT_NUM]; /* enum frame_format */
92 u8 num_output_pins;
93 imgu_fw_ptr xmem_addr;
94
95 u64 imgu_fw_blob_descr_ptr __aligned(8);
96 u32 blob_index __aligned(8);
97 union imgu_fw_all_memory_offsets mem_offsets __aligned(8);
98 struct imgu_fw_binary_xinfo *next __aligned(8);
99 };
100
101 struct imgu_fw_sp_info {
102 u32 init_dmem_data; /* data sect config, stored to dmem */
103 u32 per_frame_data; /* Per frame data, stored to dmem */
104 u32 group; /* Per pipeline data, loaded by dma */
105 u32 output; /* SP output data, loaded by dmem */
106 u32 host_sp_queue; /* Host <-> SP queues */
107 u32 host_sp_com; /* Host <-> SP commands */
108 u32 isp_started; /* P'ed from sensor thread, csim only */
109 u32 sw_state; /* Polled from css, enum imgu_abi_sp_swstate */
110 u32 host_sp_queues_initialized; /* Polled from the SP */
111 u32 sleep_mode; /* different mode to halt SP */
112 u32 invalidate_tlb; /* inform SP to invalidate mmu TLB */
113 u32 debug_buffer_ddr_address; /* the addr of DDR debug queue */
114
115 /* input system perf count array */
116 u32 perf_counter_input_system_error;
117 u32 threads_stack; /* sp thread's stack pointers */
118 u32 threads_stack_size; /* sp thread's stack sizes */
119 u32 curr_binary_id; /* current binary id */
120 u32 raw_copy_line_count; /* raw copy line counter */
121 u32 ddr_parameter_address; /* acc param ddrptr, sp dmem */
122 u32 ddr_parameter_size; /* acc param size, sp dmem */
123 /* Entry functions */
124 u32 sp_entry; /* The SP entry function */
125 u32 tagger_frames_addr; /* Base address of tagger state */
126 };
127
128 struct imgu_fw_bl_info {
129 u32 num_dma_cmds; /* Number of cmds sent by CSS */
130 u32 dma_cmd_list; /* Dma command list sent by CSS */
131 u32 sw_state; /* Polled from css, enum imgu_abi_bl_swstate */
132 /* Entry functions */
133 u32 bl_entry; /* The SP entry function */
134 };
135
136 struct imgu_fw_acc_info {
137 u32 per_frame_data; /* Dummy for now */
138 };
139
140 union imgu_fw_union {
141 struct imgu_fw_binary_xinfo isp; /* ISP info */
142 struct imgu_fw_sp_info sp; /* SP info */
143 struct imgu_fw_sp_info sp1; /* SP1 info */
144 struct imgu_fw_bl_info bl; /* Bootloader info */
145 struct imgu_fw_acc_info acc; /* Accelerator info */
146 };
147
148 struct imgu_fw_info {
149 size_t header_size; /* size of fw header */
150 u32 type __aligned(8); /* enum imgu_fw_type */
151 union imgu_fw_union info; /* Binary info */
152 struct imgu_abi_blob_info blob; /* Blob info */
153 /* Dynamic part */
154 u64 next;
155
156 u32 loaded __aligned(8); /* Firmware has been loaded */
157 const u64 isp_code __aligned(8); /* ISP pointer to code */
158 /* Firmware handle between user space and kernel */
159 u32 handle __aligned(8);
160 /* Sections to copy from/to ISP */
161 struct imgu_abi_isp_param_segments mem_initializers;
162 /* Initializer for local ISP memories */
163 };
164
165 struct imgu_fw_bi_file_h {
166 char version[64]; /* branch tag + week day + time */
167 int binary_nr; /* Number of binaries */
168 unsigned int h_size; /* sizeof(struct imgu_fw_bi_file_h) */
169 };
170
171 struct imgu_fw_header {
172 struct imgu_fw_bi_file_h file_header;
173 struct imgu_fw_info binary_header[1]; /* binary_nr items */
174 };
175
176 /******************* Firmware functions *******************/
177
178 int imgu_css_fw_init(struct imgu_css *css);
179 void imgu_css_fw_cleanup(struct imgu_css *css);
180
181 unsigned int imgu_css_fw_obgrid_size(const struct imgu_fw_info *bi);
182 void *imgu_css_fw_pipeline_params(struct imgu_css *css, unsigned int pipe,
183 enum imgu_abi_param_class cls,
184 enum imgu_abi_memories mem,
185 struct imgu_fw_isp_parameter *par,
186 size_t par_size, void *binary_params);
187
188 #endif