root/drivers/staging/media/ipu3/ipu3-css.h

INCLUDED FROM

DEFINITIONS

1. imgu_css_buf_state
2. imgu_css_buf_init

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /* Copyright (C) 2018 Intel Corporation */
   3 
   4 #ifndef __IPU3_CSS_H
   5 #define __IPU3_CSS_H
   6 
   7 #include <linux/videodev2.h>
   8 #include <linux/types.h>
   9 
  10 #include "ipu3-abi.h"
  11 #include "ipu3-css-pool.h"
  12 
  13 /* 2 stages for split isp pipeline, 1 for scaling */
  14 #define IMGU_NUM_SP                     2
  15 #define IMGU_MAX_PIPELINE_NUM           20
  16 #define IMGU_MAX_PIPE_NUM               2
  17 
  18 /* For DVS etc., format FRAME_FMT_YUV420_16 */
  19 #define IPU3_CSS_AUX_FRAME_REF          0
  20 /* For temporal noise reduction DVS etc., format FRAME_FMT_YUV_LINE */
  21 #define IPU3_CSS_AUX_FRAME_TNR          1
  22 #define IPU3_CSS_AUX_FRAME_TYPES        2       /* REF and TNR */
  23 #define IPU3_CSS_AUX_FRAMES             2       /* 2 for REF and 2 for TNR */
  24 
  25 #define IPU3_CSS_QUEUE_IN               0
  26 #define IPU3_CSS_QUEUE_PARAMS           1
  27 #define IPU3_CSS_QUEUE_OUT              2
  28 #define IPU3_CSS_QUEUE_VF               3
  29 #define IPU3_CSS_QUEUE_STAT_3A          4
  30 #define IPU3_CSS_QUEUES                 5
  31 
  32 #define IPU3_CSS_RECT_EFFECTIVE         0       /* Effective resolution */
  33 #define IPU3_CSS_RECT_BDS               1       /* Resolution after BDS */
  34 #define IPU3_CSS_RECT_ENVELOPE          2       /* DVS envelope size */
  35 #define IPU3_CSS_RECT_GDC               3       /* gdc output res */
  36 #define IPU3_CSS_RECTS                  4       /* number of rects */
  37 
  38 #define IA_CSS_BINARY_MODE_PRIMARY      2
  39 #define IA_CSS_BINARY_MODE_VIDEO        3
  40 #define IPU3_CSS_DEFAULT_BINARY         3       /* default binary index */
  41 
  42 /*
  43  * The pipe id type, distinguishes the kind of pipes that
  44  * can be run in parallel.
  45  */
  46 enum imgu_css_pipe_id {
  47         IPU3_CSS_PIPE_ID_PREVIEW,
  48         IPU3_CSS_PIPE_ID_COPY,
  49         IPU3_CSS_PIPE_ID_VIDEO,
  50         IPU3_CSS_PIPE_ID_CAPTURE,
  51         IPU3_CSS_PIPE_ID_YUVPP,
  52         IPU3_CSS_PIPE_ID_ACC,
  53         IPU3_CSS_PIPE_ID_NUM
  54 };
  55 
  56 struct imgu_css_resolution {
  57         u32 w;
  58         u32 h;
  59 };
  60 
  61 enum imgu_css_buffer_state {
  62         IPU3_CSS_BUFFER_NEW,    /* Not yet queued */
  63         IPU3_CSS_BUFFER_QUEUED, /* Queued, waiting to be filled */
  64         IPU3_CSS_BUFFER_DONE,   /* Finished processing, removed from queue */
  65         IPU3_CSS_BUFFER_FAILED, /* Was not processed, removed from queue */
  66 };
  67 
  68 struct imgu_css_buffer {
  69         /* Private fields: user doesn't touch */
  70         dma_addr_t daddr;
  71         unsigned int queue;
  72         enum imgu_css_buffer_state state;
  73         struct list_head list;
  74         u8 queue_pos;
  75         unsigned int pipe;
  76 };
  77 
  78 struct imgu_css_format {
  79         u32 pixelformat;
  80         enum v4l2_colorspace colorspace;
  81         enum imgu_abi_frame_format frame_format;
  82         enum imgu_abi_bayer_order bayer_order;
  83         enum imgu_abi_osys_format osys_format;
  84         enum imgu_abi_osys_tiling osys_tiling;
  85         u32 bytesperpixel_num;  /* Bytes per pixel in first plane * 50 */
  86         u8 bit_depth;           /* Effective bits per pixel */
  87         u8 chroma_decim;        /* Chroma plane decimation, 0=no chroma plane */
  88         u8 width_align;         /* Alignment requirement for width_pad */
  89         u8 flags;
  90 };
  91 
  92 struct imgu_css_queue {
  93         union {
  94                 struct v4l2_pix_format_mplane mpix;
  95                 struct v4l2_meta_format meta;
  96 
  97         } fmt;
  98         const struct imgu_css_format *css_fmt;
  99         unsigned int width_pad;
 100         struct list_head bufs;
 101 };
 102 
 103 struct imgu_css_pipe {
 104         enum imgu_css_pipe_id pipe_id;
 105         unsigned int bindex;
 106 
 107         struct imgu_css_queue queue[IPU3_CSS_QUEUES];
 108         struct v4l2_rect rect[IPU3_CSS_RECTS];
 109 
 110         bool vf_output_en;
 111         /* Protect access to queue[IPU3_CSS_QUEUES] */
 112         spinlock_t qlock;
 113 
 114         /* Data structures shared with IMGU and driver, always allocated */
 115         struct imgu_css_map sp_ddr_ptrs;
 116         struct imgu_css_map xmem_sp_stage_ptrs[IPU3_CSS_PIPE_ID_NUM]
 117                                             [IMGU_ABI_MAX_STAGES];
 118         struct imgu_css_map xmem_isp_stage_ptrs[IPU3_CSS_PIPE_ID_NUM]
 119                                             [IMGU_ABI_MAX_STAGES];
 120 
 121         /*
 122          * Data structures shared with IMGU and driver, binary specific.
 123          * PARAM_CLASS_CONFIG and PARAM_CLASS_STATE parameters.
 124          */
 125         struct imgu_css_map binary_params_cs[IMGU_ABI_PARAM_CLASS_NUM - 1]
 126                                             [IMGU_ABI_NUM_MEMORIES];
 127 
 128         struct {
 129                 struct imgu_css_map mem[IPU3_CSS_AUX_FRAMES];
 130                 unsigned int width;
 131                 unsigned int height;
 132                 unsigned int bytesperline;
 133                 unsigned int bytesperpixel;
 134         } aux_frames[IPU3_CSS_AUX_FRAME_TYPES];
 135 
 136         struct {
 137                 struct imgu_css_pool parameter_set_info;
 138                 struct imgu_css_pool acc;
 139                 struct imgu_css_pool gdc;
 140                 struct imgu_css_pool obgrid;
 141                 /* PARAM_CLASS_PARAM parameters for binding while streaming */
 142                 struct imgu_css_pool binary_params_p[IMGU_ABI_NUM_MEMORIES];
 143         } pool;
 144 
 145         struct imgu_css_map abi_buffers[IPU3_CSS_QUEUES]
 146                                     [IMGU_ABI_HOST2SP_BUFQ_SIZE];
 147 };
 148 
 149 /* IPU3 Camera Sub System structure */
 150 struct imgu_css {
 151         struct device *dev;
 152         void __iomem *base;
 153         const struct firmware *fw;
 154         struct imgu_fw_header *fwp;
 155         int iomem_length;
 156         int fw_bl, fw_sp[IMGU_NUM_SP];  /* Indices of bl and SP binaries */
 157         struct imgu_css_map *binary;    /* fw binaries mapped to device */
 158         bool streaming;         /* true when streaming is enabled */
 159 
 160         struct imgu_css_pipe pipes[IMGU_MAX_PIPE_NUM];
 161         struct imgu_css_map xmem_sp_group_ptrs;
 162 
 163         /* enabled pipe(s) */
 164         DECLARE_BITMAP(enabled_pipes, IMGU_MAX_PIPE_NUM);
 165 };
 166 
 167 /******************* css v4l *******************/
 168 int imgu_css_init(struct device *dev, struct imgu_css *css,
 169                   void __iomem *base, int length);
 170 void imgu_css_cleanup(struct imgu_css *css);
 171 int imgu_css_fmt_try(struct imgu_css *css,
 172                      struct v4l2_pix_format_mplane *fmts[IPU3_CSS_QUEUES],
 173                      struct v4l2_rect *rects[IPU3_CSS_RECTS],
 174                      unsigned int pipe);
 175 int imgu_css_fmt_set(struct imgu_css *css,
 176                      struct v4l2_pix_format_mplane *fmts[IPU3_CSS_QUEUES],
 177                      struct v4l2_rect *rects[IPU3_CSS_RECTS],
 178                      unsigned int pipe);
 179 int imgu_css_meta_fmt_set(struct v4l2_meta_format *fmt);
 180 int imgu_css_buf_queue(struct imgu_css *css, unsigned int pipe,
 181                        struct imgu_css_buffer *b);
 182 struct imgu_css_buffer *imgu_css_buf_dequeue(struct imgu_css *css);
 183 int imgu_css_start_streaming(struct imgu_css *css);
 184 void imgu_css_stop_streaming(struct imgu_css *css);
 185 bool imgu_css_queue_empty(struct imgu_css *css);
 186 bool imgu_css_is_streaming(struct imgu_css *css);
 187 bool imgu_css_pipe_queue_empty(struct imgu_css *css, unsigned int pipe);
 188 
 189 /******************* css hw *******************/
 190 int imgu_css_set_powerup(struct device *dev, void __iomem *base);
 191 void imgu_css_set_powerdown(struct device *dev, void __iomem *base);
 192 int imgu_css_irq_ack(struct imgu_css *css);
 193 
 194 /******************* set parameters ************/
 195 int imgu_css_set_parameters(struct imgu_css *css, unsigned int pipe,
 196                             struct ipu3_uapi_params *set_params);
 197 
 198 /******************* auxiliary helpers *******************/
 199 static inline enum imgu_css_buffer_state
 200 imgu_css_buf_state(struct imgu_css_buffer *b)
 201 {
 202         return b->state;
 203 }
 204 
 205 /* Initialize given buffer. May be called several times. */
 206 static inline void imgu_css_buf_init(struct imgu_css_buffer *b,
 207                                      unsigned int queue, dma_addr_t daddr)
 208 {
 209         b->state = IPU3_CSS_BUFFER_NEW;
 210         b->queue = queue;
 211         b->daddr = daddr;
 212 }
 213 #endif