1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3 * Hantro VPU codec driver
4 *
5 * Copyright 2018 Google LLC.
6 * Tomasz Figa <tfiga@chromium.org>
7 *
8 * Based on s5p-mfc driver by Samsung Electronics Co., Ltd.
9 * Copyright (C) 2011 Samsung Electronics Co., Ltd.
10 */
11
12 #ifndef HANTRO_H_
13 #define HANTRO_H_
14
15 #include <linux/platform_device.h>
16 #include <linux/videodev2.h>
17 #include <linux/wait.h>
18 #include <linux/clk.h>
19
20 #include <media/v4l2-ctrls.h>
21 #include <media/v4l2-device.h>
22 #include <media/v4l2-ioctl.h>
23 #include <media/v4l2-mem2mem.h>
24 #include <media/videobuf2-core.h>
25 #include <media/videobuf2-dma-contig.h>
26
27 #include "hantro_hw.h"
28
29 #define VP8_MB_DIM 16
30 #define VP8_MB_WIDTH(w) DIV_ROUND_UP(w, VP8_MB_DIM)
31 #define VP8_MB_HEIGHT(h) DIV_ROUND_UP(h, VP8_MB_DIM)
32
33 #define H264_MB_DIM 16
34 #define H264_MB_WIDTH(w) DIV_ROUND_UP(w, H264_MB_DIM)
35 #define H264_MB_HEIGHT(h) DIV_ROUND_UP(h, H264_MB_DIM)
36
37 #define MPEG2_MB_DIM 16
38 #define MPEG2_MB_WIDTH(w) DIV_ROUND_UP(w, MPEG2_MB_DIM)
39 #define MPEG2_MB_HEIGHT(h) DIV_ROUND_UP(h, MPEG2_MB_DIM)
40
41 #define JPEG_MB_DIM 16
42 #define JPEG_MB_WIDTH(w) DIV_ROUND_UP(w, JPEG_MB_DIM)
43 #define JPEG_MB_HEIGHT(h) DIV_ROUND_UP(h, JPEG_MB_DIM)
44
45 struct hantro_ctx;
46 struct hantro_codec_ops;
47
48 #define HANTRO_JPEG_ENCODER BIT(0)
49 #define HANTRO_ENCODERS 0x0000ffff
50 #define HANTRO_MPEG2_DECODER BIT(16)
51 #define HANTRO_VP8_DECODER BIT(17)
52 #define HANTRO_H264_DECODER BIT(18)
53 #define HANTRO_DECODERS 0xffff0000
54
55 /**
56 * struct hantro_irq - irq handler and name
57 *
58 * @name: irq name for device tree lookup
59 * @handler: interrupt handler
60 */
61 struct hantro_irq {
62 const char *name;
63 irqreturn_t (*handler)(int irq, void *priv);
64 };
65
66 /**
67 * struct hantro_variant - information about VPU hardware variant
68 *
69 * @enc_offset: Offset from VPU base to encoder registers.
70 * @dec_offset: Offset from VPU base to decoder registers.
71 * @enc_fmts: Encoder formats.
72 * @num_enc_fmts: Number of encoder formats.
73 * @dec_fmts: Decoder formats.
74 * @num_dec_fmts: Number of decoder formats.
75 * @codec: Supported codecs
76 * @codec_ops: Codec ops.
77 * @init: Initialize hardware.
78 * @runtime_resume: reenable hardware after power gating
79 * @irqs: array of irq names and interrupt handlers
80 * @num_irqs: number of irqs in the array
81 * @clk_names: array of clock names
82 * @num_clocks: number of clocks in the array
83 * @reg_names: array of register range names
84 * @num_regs: number of register range names in the array
85 */
86 struct hantro_variant {
87 unsigned int enc_offset;
88 unsigned int dec_offset;
89 const struct hantro_fmt *enc_fmts;
90 unsigned int num_enc_fmts;
91 const struct hantro_fmt *dec_fmts;
92 unsigned int num_dec_fmts;
93 unsigned int codec;
94 const struct hantro_codec_ops *codec_ops;
95 int (*init)(struct hantro_dev *vpu);
96 int (*runtime_resume)(struct hantro_dev *vpu);
97 const struct hantro_irq *irqs;
98 int num_irqs;
99 const char * const *clk_names;
100 int num_clocks;
101 const char * const *reg_names;
102 int num_regs;
103 };
104
105 /**
106 * enum hantro_codec_mode - codec operating mode.
107 * @HANTRO_MODE_NONE: No operating mode. Used for RAW video formats.
108 * @HANTRO_MODE_JPEG_ENC: JPEG encoder.
109 * @HANTRO_MODE_H264_DEC: H264 decoder.
110 * @HANTRO_MODE_MPEG2_DEC: MPEG-2 decoder.
111 * @HANTRO_MODE_VP8_DEC: VP8 decoder.
112 */
113 enum hantro_codec_mode {
114 HANTRO_MODE_NONE = -1,
115 HANTRO_MODE_JPEG_ENC,
116 HANTRO_MODE_H264_DEC,
117 HANTRO_MODE_MPEG2_DEC,
118 HANTRO_MODE_VP8_DEC,
119 };
120
121 /*
122 * struct hantro_ctrl - helper type to declare supported controls
123 * @codec: codec id this control belong to (HANTRO_JPEG_ENCODER, etc.)
124 * @cfg: control configuration
125 */
126 struct hantro_ctrl {
127 unsigned int codec;
128 struct v4l2_ctrl_config cfg;
129 };
130
131 /*
132 * struct hantro_func - Hantro VPU functionality
133 *
134 * @id: processing functionality ID (can be
135 * %MEDIA_ENT_F_PROC_VIDEO_ENCODER or
136 * %MEDIA_ENT_F_PROC_VIDEO_DECODER)
137 * @vdev: &struct video_device that exposes the encoder or
138 * decoder functionality
139 * @source_pad: &struct media_pad with the source pad.
140 * @sink: &struct media_entity pointer with the sink entity
141 * @sink_pad: &struct media_pad with the sink pad.
142 * @proc: &struct media_entity pointer with the M2M device itself.
143 * @proc_pads: &struct media_pad with the @proc pads.
144 * @intf_devnode: &struct media_intf devnode pointer with the interface
145 * with controls the M2M device.
146 *
147 * Contains everything needed to attach the video device to the media device.
148 */
149 struct hantro_func {
150 unsigned int id;
151 struct video_device vdev;
152 struct media_pad source_pad;
153 struct media_entity sink;
154 struct media_pad sink_pad;
155 struct media_entity proc;
156 struct media_pad proc_pads[2];
157 struct media_intf_devnode *intf_devnode;
158 };
159
160 static inline struct hantro_func *
161 hantro_vdev_to_func(struct video_device *vdev)
162 {
163 return container_of(vdev, struct hantro_func, vdev);
164 }
165
166 /**
167 * struct hantro_dev - driver data
168 * @v4l2_dev: V4L2 device to register video devices for.
169 * @m2m_dev: mem2mem device associated to this device.
170 * @mdev: media device associated to this device.
171 * @encoder: encoder functionality.
172 * @decoder: decoder functionality.
173 * @pdev: Pointer to VPU platform device.
174 * @dev: Pointer to device for convenient logging using
175 * dev_ macros.
176 * @clocks: Array of clock handles.
177 * @reg_bases: Mapped addresses of VPU registers.
178 * @enc_base: Mapped address of VPU encoder register for convenience.
179 * @dec_base: Mapped address of VPU decoder register for convenience.
180 * @ctrl_base: Mapped address of VPU control block.
181 * @vpu_mutex: Mutex to synchronize V4L2 calls.
182 * @irqlock: Spinlock to synchronize access to data structures
183 * shared with interrupt handlers.
184 * @variant: Hardware variant-specific parameters.
185 * @watchdog_work: Delayed work for hardware timeout handling.
186 */
187 struct hantro_dev {
188 struct v4l2_device v4l2_dev;
189 struct v4l2_m2m_dev *m2m_dev;
190 struct media_device mdev;
191 struct hantro_func *encoder;
192 struct hantro_func *decoder;
193 struct platform_device *pdev;
194 struct device *dev;
195 struct clk_bulk_data *clocks;
196 void __iomem **reg_bases;
197 void __iomem *enc_base;
198 void __iomem *dec_base;
199 void __iomem *ctrl_base;
200
201 struct mutex vpu_mutex; /* video_device lock */
202 spinlock_t irqlock;
203 const struct hantro_variant *variant;
204 struct delayed_work watchdog_work;
205 };
206
207 /**
208 * struct hantro_ctx - Context (instance) private data.
209 *
210 * @dev: VPU driver data to which the context belongs.
211 * @fh: V4L2 file handler.
212 *
213 * @sequence_cap: Sequence counter for capture queue
214 * @sequence_out: Sequence counter for output queue
215 *
216 * @vpu_src_fmt: Descriptor of active source format.
217 * @src_fmt: V4L2 pixel format of active source format.
218 * @vpu_dst_fmt: Descriptor of active destination format.
219 * @dst_fmt: V4L2 pixel format of active destination format.
220 *
221 * @ctrl_handler: Control handler used to register controls.
222 * @jpeg_quality: User-specified JPEG compression quality.
223 *
224 * @buf_finish: Buffer finish. This depends on encoder or decoder
225 * context, and it's called right before
226 * calling v4l2_m2m_job_finish.
227 * @codec_ops: Set of operations related to codec mode.
228 * @jpeg_enc: JPEG-encoding context.
229 * @mpeg2_dec: MPEG-2-decoding context.
230 * @vp8_dec: VP8-decoding context.
231 */
232 struct hantro_ctx {
233 struct hantro_dev *dev;
234 struct v4l2_fh fh;
235
236 u32 sequence_cap;
237 u32 sequence_out;
238
239 const struct hantro_fmt *vpu_src_fmt;
240 struct v4l2_pix_format_mplane src_fmt;
241 const struct hantro_fmt *vpu_dst_fmt;
242 struct v4l2_pix_format_mplane dst_fmt;
243
244 struct v4l2_ctrl_handler ctrl_handler;
245 int jpeg_quality;
246
247 int (*buf_finish)(struct hantro_ctx *ctx,
248 struct vb2_buffer *buf,
249 unsigned int bytesused);
250
251 const struct hantro_codec_ops *codec_ops;
252
253 /* Specific for particular codec modes. */
254 union {
255 struct hantro_h264_dec_hw_ctx h264_dec;
256 struct hantro_jpeg_enc_hw_ctx jpeg_enc;
257 struct hantro_mpeg2_dec_hw_ctx mpeg2_dec;
258 struct hantro_vp8_dec_hw_ctx vp8_dec;
259 };
260 };
261
262 /**
263 * struct hantro_fmt - information about supported video formats.
264 * @name: Human readable name of the format.
265 * @fourcc: FourCC code of the format. See V4L2_PIX_FMT_*.
266 * @codec_mode: Codec mode related to this format. See
267 * enum hantro_codec_mode.
268 * @header_size: Optional header size. Currently used by JPEG encoder.
269 * @max_depth: Maximum depth, for bitstream formats
270 * @enc_fmt: Format identifier for encoder registers.
271 * @frmsize: Supported range of frame sizes (only for bitstream formats).
272 */
273 struct hantro_fmt {
274 char *name;
275 u32 fourcc;
276 enum hantro_codec_mode codec_mode;
277 int header_size;
278 int max_depth;
279 enum hantro_enc_fmt enc_fmt;
280 struct v4l2_frmsize_stepwise frmsize;
281 };
282
283 struct hantro_reg {
284 u32 base;
285 u32 shift;
286 u32 mask;
287 };
288
289 /* Logging helpers */
290
291 /**
292 * debug - Module parameter to control level of debugging messages.
293 *
294 * Level of debugging messages can be controlled by bits of
295 * module parameter called "debug". Meaning of particular
296 * bits is as follows:
297 *
298 * bit 0 - global information: mode, size, init, release
299 * bit 1 - each run start/result information
300 * bit 2 - contents of small controls from userspace
301 * bit 3 - contents of big controls from userspace
302 * bit 4 - detail fmt, ctrl, buffer q/dq information
303 * bit 5 - detail function enter/leave trace information
304 * bit 6 - register write/read information
305 */
306 extern int hantro_debug;
307
308 #define vpu_debug(level, fmt, args...) \
309 do { \
310 if (hantro_debug & BIT(level)) \
311 pr_info("%s:%d: " fmt, \
312 __func__, __LINE__, ##args); \
313 } while (0)
314
315 #define vpu_err(fmt, args...) \
316 pr_err("%s:%d: " fmt, __func__, __LINE__, ##args)
317
318 /* Structure access helpers. */
319 static inline struct hantro_ctx *fh_to_ctx(struct v4l2_fh *fh)
320 {
321 return container_of(fh, struct hantro_ctx, fh);
322 }
323
324 /* Register accessors. */
325 static inline void vepu_write_relaxed(struct hantro_dev *vpu,
326 u32 val, u32 reg)
327 {
328 vpu_debug(6, "0x%04x = 0x%08x\n", reg / 4, val);
329 writel_relaxed(val, vpu->enc_base + reg);
330 }
331
332 static inline void vepu_write(struct hantro_dev *vpu, u32 val, u32 reg)
333 {
334 vpu_debug(6, "0x%04x = 0x%08x\n", reg / 4, val);
335 writel(val, vpu->enc_base + reg);
336 }
337
338 static inline u32 vepu_read(struct hantro_dev *vpu, u32 reg)
339 {
340 u32 val = readl(vpu->enc_base + reg);
341
342 vpu_debug(6, "0x%04x = 0x%08x\n", reg / 4, val);
343 return val;
344 }
345
346 static inline void vdpu_write_relaxed(struct hantro_dev *vpu,
347 u32 val, u32 reg)
348 {
349 vpu_debug(6, "0x%04x = 0x%08x\n", reg / 4, val);
350 writel_relaxed(val, vpu->dec_base + reg);
351 }
352
353 static inline void vdpu_write(struct hantro_dev *vpu, u32 val, u32 reg)
354 {
355 vpu_debug(6, "0x%04x = 0x%08x\n", reg / 4, val);
356 writel(val, vpu->dec_base + reg);
357 }
358
359 static inline u32 vdpu_read(struct hantro_dev *vpu, u32 reg)
360 {
361 u32 val = readl(vpu->dec_base + reg);
362
363 vpu_debug(6, "0x%04x = 0x%08x\n", reg / 4, val);
364 return val;
365 }
366
367 static inline void hantro_reg_write(struct hantro_dev *vpu,
368 const struct hantro_reg *reg,
369 u32 val)
370 {
371 u32 v;
372
373 v = vdpu_read(vpu, reg->base);
374 v &= ~(reg->mask << reg->shift);
375 v |= ((val & reg->mask) << reg->shift);
376 vdpu_write_relaxed(vpu, v, reg->base);
377 }
378
379 bool hantro_is_encoder_ctx(const struct hantro_ctx *ctx);
380
381 void *hantro_get_ctrl(struct hantro_ctx *ctx, u32 id);
382 dma_addr_t hantro_get_ref(struct vb2_queue *q, u64 ts);
383
384 static inline struct vb2_v4l2_buffer *
385 hantro_get_src_buf(struct hantro_ctx *ctx)
386 {
387 return v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx);
388 }
389
390 static inline struct vb2_v4l2_buffer *
391 hantro_get_dst_buf(struct hantro_ctx *ctx)
392 {
393 return v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
394 }
395
396 #endif /* HANTRO_H_ */