drivers/gpio/gpio-pca953x.c

/* [<][>][^][v][top][bottom][index][help] */
This source file includes following definitions.
pca953x_bank_shift
pca953x_check_register
pca953x_readable_register
pca953x_writeable_register
pca953x_volatile_register
pca953x_recalc_addr
pca953x_write_regs
pca953x_read_regs
pca953x_gpio_direction_input
pca953x_gpio_direction_output
pca953x_gpio_get_value
pca953x_gpio_set_value
pca953x_gpio_get_direction
pca953x_gpio_set_multiple
pca953x_gpio_set_pull_up_down
pca953x_gpio_set_config
pca953x_setup_gpio
pca953x_irq_mask
pca953x_irq_unmask
pca953x_irq_set_wake
pca953x_irq_bus_lock
pca953x_irq_bus_sync_unlock
pca953x_irq_set_type
pca953x_irq_shutdown
pca953x_irq_pending
pca953x_irq_handler
pca953x_irq_setup
pca953x_irq_setup
device_pca95xx_init
device_pca957x_init
pca953x_probe
pca953x_remove
pca953x_regcache_sync
pca953x_suspend
pca953x_resume
pca953x_init
pca953x_exit
   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  *  PCA953x 4/8/16/24/40 bit I/O ports
   4  *
   5  *  Copyright (C) 2005 Ben Gardner <bgardner@wabtec.com>
   6  *  Copyright (C) 2007 Marvell International Ltd.
   7  *
   8  *  Derived from drivers/i2c/chips/pca9539.c
   9  */
  10 
  11 #include <linux/acpi.h>
  12 #include <linux/bits.h>
  13 #include <linux/gpio/driver.h>
  14 #include <linux/gpio/consumer.h>
  15 #include <linux/i2c.h>
  16 #include <linux/init.h>
  17 #include <linux/interrupt.h>
  18 #include <linux/module.h>
  19 #include <linux/of_platform.h>
  20 #include <linux/platform_data/pca953x.h>
  21 #include <linux/regmap.h>
  22 #include <linux/regulator/consumer.h>
  23 #include <linux/slab.h>
  24 
  25 #include <asm/unaligned.h>
  26 
  27 #define PCA953X_INPUT           0x00
  28 #define PCA953X_OUTPUT          0x01
  29 #define PCA953X_INVERT          0x02
  30 #define PCA953X_DIRECTION       0x03
  31 
  32 #define REG_ADDR_MASK           GENMASK(5, 0)
  33 #define REG_ADDR_EXT            BIT(6)
  34 #define REG_ADDR_AI             BIT(7)
  35 
  36 #define PCA957X_IN              0x00
  37 #define PCA957X_INVRT           0x01
  38 #define PCA957X_BKEN            0x02
  39 #define PCA957X_PUPD            0x03
  40 #define PCA957X_CFG             0x04
  41 #define PCA957X_OUT             0x05
  42 #define PCA957X_MSK             0x06
  43 #define PCA957X_INTS            0x07
  44 
  45 #define PCAL953X_OUT_STRENGTH   0x20
  46 #define PCAL953X_IN_LATCH       0x22
  47 #define PCAL953X_PULL_EN        0x23
  48 #define PCAL953X_PULL_SEL       0x24
  49 #define PCAL953X_INT_MASK       0x25
  50 #define PCAL953X_INT_STAT       0x26
  51 #define PCAL953X_OUT_CONF       0x27
  52 
  53 #define PCAL6524_INT_EDGE       0x28
  54 #define PCAL6524_INT_CLR        0x2a
  55 #define PCAL6524_IN_STATUS      0x2b
  56 #define PCAL6524_OUT_INDCONF    0x2c
  57 #define PCAL6524_DEBOUNCE       0x2d
  58 
  59 #define PCA_GPIO_MASK           GENMASK(7, 0)
  60 
  61 #define PCAL_GPIO_MASK          GENMASK(4, 0)
  62 #define PCAL_PINCTRL_MASK       GENMASK(6, 5)
  63 
  64 #define PCA_INT                 BIT(8)
  65 #define PCA_PCAL                BIT(9)
  66 #define PCA_LATCH_INT           (PCA_PCAL | PCA_INT)
  67 #define PCA953X_TYPE            BIT(12)
  68 #define PCA957X_TYPE            BIT(13)
  69 #define PCA_TYPE_MASK           GENMASK(15, 12)
  70 
  71 #define PCA_CHIP_TYPE(x)        ((x) & PCA_TYPE_MASK)
  72 
  73 static const struct i2c_device_id pca953x_id[] = {
  74         { "pca6416", 16 | PCA953X_TYPE | PCA_INT, },
  75         { "pca9505", 40 | PCA953X_TYPE | PCA_INT, },
  76         { "pca9534", 8  | PCA953X_TYPE | PCA_INT, },
  77         { "pca9535", 16 | PCA953X_TYPE | PCA_INT, },
  78         { "pca9536", 4  | PCA953X_TYPE, },
  79         { "pca9537", 4  | PCA953X_TYPE | PCA_INT, },
  80         { "pca9538", 8  | PCA953X_TYPE | PCA_INT, },
  81         { "pca9539", 16 | PCA953X_TYPE | PCA_INT, },
  82         { "pca9554", 8  | PCA953X_TYPE | PCA_INT, },
  83         { "pca9555", 16 | PCA953X_TYPE | PCA_INT, },
  84         { "pca9556", 8  | PCA953X_TYPE, },
  85         { "pca9557", 8  | PCA953X_TYPE, },
  86         { "pca9574", 8  | PCA957X_TYPE | PCA_INT, },
  87         { "pca9575", 16 | PCA957X_TYPE | PCA_INT, },
  88         { "pca9698", 40 | PCA953X_TYPE, },
  89 
  90         { "pcal6416", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
  91         { "pcal6524", 24 | PCA953X_TYPE | PCA_LATCH_INT, },
  92         { "pcal9555a", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
  93 
  94         { "max7310", 8  | PCA953X_TYPE, },
  95         { "max7312", 16 | PCA953X_TYPE | PCA_INT, },
  96         { "max7313", 16 | PCA953X_TYPE | PCA_INT, },
  97         { "max7315", 8  | PCA953X_TYPE | PCA_INT, },
  98         { "max7318", 16 | PCA953X_TYPE | PCA_INT, },
  99         { "pca6107", 8  | PCA953X_TYPE | PCA_INT, },
 100         { "tca6408", 8  | PCA953X_TYPE | PCA_INT, },
 101         { "tca6416", 16 | PCA953X_TYPE | PCA_INT, },
 102         { "tca6424", 24 | PCA953X_TYPE | PCA_INT, },
 103         { "tca9539", 16 | PCA953X_TYPE | PCA_INT, },
 104         { "tca9554", 8  | PCA953X_TYPE | PCA_INT, },
 105         { "xra1202", 8  | PCA953X_TYPE },
 106         { }
 107 };
 108 MODULE_DEVICE_TABLE(i2c, pca953x_id);
 109 
 110 static const struct acpi_device_id pca953x_acpi_ids[] = {
 111         { "INT3491", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
 112         { }
 113 };
 114 MODULE_DEVICE_TABLE(acpi, pca953x_acpi_ids);
 115 
 116 #define MAX_BANK 5
 117 #define BANK_SZ 8
 118 
 119 #define NBANK(chip) DIV_ROUND_UP(chip->gpio_chip.ngpio, BANK_SZ)
 120 
 121 struct pca953x_reg_config {
 122         int direction;
 123         int output;
 124         int input;
 125         int invert;
 126 };
 127 
 128 static const struct pca953x_reg_config pca953x_regs = {
 129         .direction = PCA953X_DIRECTION,
 130         .output = PCA953X_OUTPUT,
 131         .input = PCA953X_INPUT,
 132         .invert = PCA953X_INVERT,
 133 };
 134 
 135 static const struct pca953x_reg_config pca957x_regs = {
 136         .direction = PCA957X_CFG,
 137         .output = PCA957X_OUT,
 138         .input = PCA957X_IN,
 139         .invert = PCA957X_INVRT,
 140 };
 141 
 142 struct pca953x_chip {
 143         unsigned gpio_start;
 144         struct mutex i2c_lock;
 145         struct regmap *regmap;
 146 
 147 #ifdef CONFIG_GPIO_PCA953X_IRQ
 148         struct mutex irq_lock;
 149         u8 irq_mask[MAX_BANK];
 150         u8 irq_stat[MAX_BANK];
 151         u8 irq_trig_raise[MAX_BANK];
 152         u8 irq_trig_fall[MAX_BANK];
 153         struct irq_chip irq_chip;
 154 #endif
 155         atomic_t wakeup_path;
 156 
 157         struct i2c_client *client;
 158         struct gpio_chip gpio_chip;
 159         const char *const *names;
 160         unsigned long driver_data;
 161         struct regulator *regulator;
 162 
 163         const struct pca953x_reg_config *regs;
 164 };
 165 
 166 static int pca953x_bank_shift(struct pca953x_chip *chip)
 167 {
 168         return fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
 169 }
 170 
 171 #define PCA953x_BANK_INPUT      BIT(0)
 172 #define PCA953x_BANK_OUTPUT     BIT(1)
 173 #define PCA953x_BANK_POLARITY   BIT(2)
 174 #define PCA953x_BANK_CONFIG     BIT(3)
 175 
 176 #define PCA957x_BANK_INPUT      BIT(0)
 177 #define PCA957x_BANK_POLARITY   BIT(1)
 178 #define PCA957x_BANK_BUSHOLD    BIT(2)
 179 #define PCA957x_BANK_CONFIG     BIT(4)
 180 #define PCA957x_BANK_OUTPUT     BIT(5)
 181 
 182 #define PCAL9xxx_BANK_IN_LATCH  BIT(8 + 2)
 183 #define PCAL9xxx_BANK_PULL_EN   BIT(8 + 3)
 184 #define PCAL9xxx_BANK_PULL_SEL  BIT(8 + 4)
 185 #define PCAL9xxx_BANK_IRQ_MASK  BIT(8 + 5)
 186 #define PCAL9xxx_BANK_IRQ_STAT  BIT(8 + 6)
 187 
 188 /*
 189  * We care about the following registers:
 190  * - Standard set, below 0x40, each port can be replicated up to 8 times
 191  *   - PCA953x standard
 192  *     Input port                       0x00 + 0 * bank_size    R
 193  *     Output port                      0x00 + 1 * bank_size    RW
 194  *     Polarity Inversion port          0x00 + 2 * bank_size    RW
 195  *     Configuration port               0x00 + 3 * bank_size    RW
 196  *   - PCA957x with mixed up registers
 197  *     Input port                       0x00 + 0 * bank_size    R
 198  *     Polarity Inversion port          0x00 + 1 * bank_size    RW
 199  *     Bus hold port                    0x00 + 2 * bank_size    RW
 200  *     Configuration port               0x00 + 4 * bank_size    RW
 201  *     Output port                      0x00 + 5 * bank_size    RW
 202  *
 203  * - Extended set, above 0x40, often chip specific.
 204  *   - PCAL6524/PCAL9555A with custom PCAL IRQ handling:
 205  *     Input latch register             0x40 + 2 * bank_size    RW
 206  *     Pull-up/pull-down enable reg     0x40 + 3 * bank_size    RW
 207  *     Pull-up/pull-down select reg     0x40 + 4 * bank_size    RW
 208  *     Interrupt mask register          0x40 + 5 * bank_size    RW
 209  *     Interrupt status register        0x40 + 6 * bank_size    R
 210  *
 211  * - Registers with bit 0x80 set, the AI bit
 212  *   The bit is cleared and the registers fall into one of the
 213  *   categories above.
 214  */
 215 
 216 static bool pca953x_check_register(struct pca953x_chip *chip, unsigned int reg,
 217                                    u32 checkbank)
 218 {
 219         int bank_shift = pca953x_bank_shift(chip);
 220         int bank = (reg & REG_ADDR_MASK) >> bank_shift;
 221         int offset = reg & (BIT(bank_shift) - 1);
 222 
 223         /* Special PCAL extended register check. */
 224         if (reg & REG_ADDR_EXT) {
 225                 if (!(chip->driver_data & PCA_PCAL))
 226                         return false;
 227                 bank += 8;
 228         }
 229 
 230         /* Register is not in the matching bank. */
 231         if (!(BIT(bank) & checkbank))
 232                 return false;
 233 
 234         /* Register is not within allowed range of bank. */
 235         if (offset >= NBANK(chip))
 236                 return false;
 237 
 238         return true;
 239 }
 240 
 241 static bool pca953x_readable_register(struct device *dev, unsigned int reg)
 242 {
 243         struct pca953x_chip *chip = dev_get_drvdata(dev);
 244         u32 bank;
 245 
 246         if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) {
 247                 bank = PCA953x_BANK_INPUT | PCA953x_BANK_OUTPUT |
 248                        PCA953x_BANK_POLARITY | PCA953x_BANK_CONFIG;
 249         } else {
 250                 bank = PCA957x_BANK_INPUT | PCA957x_BANK_OUTPUT |
 251                        PCA957x_BANK_POLARITY | PCA957x_BANK_CONFIG |
 252                        PCA957x_BANK_BUSHOLD;
 253         }
 254 
 255         if (chip->driver_data & PCA_PCAL) {
 256                 bank |= PCAL9xxx_BANK_IN_LATCH | PCAL9xxx_BANK_PULL_EN |
 257                         PCAL9xxx_BANK_PULL_SEL | PCAL9xxx_BANK_IRQ_MASK |
 258                         PCAL9xxx_BANK_IRQ_STAT;
 259         }
 260 
 261         return pca953x_check_register(chip, reg, bank);
 262 }
 263 
 264 static bool pca953x_writeable_register(struct device *dev, unsigned int reg)
 265 {
 266         struct pca953x_chip *chip = dev_get_drvdata(dev);
 267         u32 bank;
 268 
 269         if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) {
 270                 bank = PCA953x_BANK_OUTPUT | PCA953x_BANK_POLARITY |
 271                         PCA953x_BANK_CONFIG;
 272         } else {
 273                 bank = PCA957x_BANK_OUTPUT | PCA957x_BANK_POLARITY |
 274                         PCA957x_BANK_CONFIG | PCA957x_BANK_BUSHOLD;
 275         }
 276 
 277         if (chip->driver_data & PCA_PCAL)
 278                 bank |= PCAL9xxx_BANK_IN_LATCH | PCAL9xxx_BANK_PULL_EN |
 279                         PCAL9xxx_BANK_PULL_SEL | PCAL9xxx_BANK_IRQ_MASK;
 280 
 281         return pca953x_check_register(chip, reg, bank);
 282 }
 283 
 284 static bool pca953x_volatile_register(struct device *dev, unsigned int reg)
 285 {
 286         struct pca953x_chip *chip = dev_get_drvdata(dev);
 287         u32 bank;
 288 
 289         if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE)
 290                 bank = PCA953x_BANK_INPUT;
 291         else
 292                 bank = PCA957x_BANK_INPUT;
 293 
 294         if (chip->driver_data & PCA_PCAL)
 295                 bank |= PCAL9xxx_BANK_IRQ_STAT;
 296 
 297         return pca953x_check_register(chip, reg, bank);
 298 }
 299 
 300 static const struct regmap_config pca953x_i2c_regmap = {
 301         .reg_bits = 8,
 302         .val_bits = 8,
 303 
 304         .readable_reg = pca953x_readable_register,
 305         .writeable_reg = pca953x_writeable_register,
 306         .volatile_reg = pca953x_volatile_register,
 307 
 308         .cache_type = REGCACHE_RBTREE,
 309         /* REVISIT: should be 0x7f but some 24 bit chips use REG_ADDR_AI */
 310         .max_register = 0xff,
 311 };
 312 
 313 static u8 pca953x_recalc_addr(struct pca953x_chip *chip, int reg, int off,
 314                               bool write, bool addrinc)
 315 {
 316         int bank_shift = pca953x_bank_shift(chip);
 317         int addr = (reg & PCAL_GPIO_MASK) << bank_shift;
 318         int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1;
 319         u8 regaddr = pinctrl | addr | (off / BANK_SZ);
 320 
 321         /* Single byte read doesn't need AI bit set. */
 322         if (!addrinc)
 323                 return regaddr;
 324 
 325         /* Chips with 24 and more GPIOs always support Auto Increment */
 326         if (write && NBANK(chip) > 2)
 327                 regaddr |= REG_ADDR_AI;
 328 
 329         /* PCA9575 needs address-increment on multi-byte writes */
 330         if (PCA_CHIP_TYPE(chip->driver_data) == PCA957X_TYPE)
 331                 regaddr |= REG_ADDR_AI;
 332 
 333         return regaddr;
 334 }
 335 
 336 static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val)
 337 {
 338         u8 regaddr = pca953x_recalc_addr(chip, reg, 0, true, true);
 339         int ret;
 340 
 341         ret = regmap_bulk_write(chip->regmap, regaddr, val, NBANK(chip));
 342         if (ret < 0) {
 343                 dev_err(&chip->client->dev, "failed writing register\n");
 344                 return ret;
 345         }
 346 
 347         return 0;
 348 }
 349 
 350 static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val)
 351 {
 352         u8 regaddr = pca953x_recalc_addr(chip, reg, 0, false, true);
 353         int ret;
 354 
 355         ret = regmap_bulk_read(chip->regmap, regaddr, val, NBANK(chip));
 356         if (ret < 0) {
 357                 dev_err(&chip->client->dev, "failed reading register\n");
 358                 return ret;
 359         }
 360 
 361         return 0;
 362 }
 363 
 364 static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off)
 365 {
 366         struct pca953x_chip *chip = gpiochip_get_data(gc);
 367         u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off,
 368                                         true, false);
 369         u8 bit = BIT(off % BANK_SZ);
 370         int ret;
 371 
 372         mutex_lock(&chip->i2c_lock);
 373         ret = regmap_write_bits(chip->regmap, dirreg, bit, bit);
 374         mutex_unlock(&chip->i2c_lock);
 375         return ret;
 376 }
 377 
 378 static int pca953x_gpio_direction_output(struct gpio_chip *gc,
 379                 unsigned off, int val)
 380 {
 381         struct pca953x_chip *chip = gpiochip_get_data(gc);
 382         u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off,
 383                                         true, false);
 384         u8 outreg = pca953x_recalc_addr(chip, chip->regs->output, off,
 385                                         true, false);
 386         u8 bit = BIT(off % BANK_SZ);
 387         int ret;
 388 
 389         mutex_lock(&chip->i2c_lock);
 390         /* set output level */
 391         ret = regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0);
 392         if (ret)
 393                 goto exit;
 394 
 395         /* then direction */
 396         ret = regmap_write_bits(chip->regmap, dirreg, bit, 0);
 397 exit:
 398         mutex_unlock(&chip->i2c_lock);
 399         return ret;
 400 }
 401 
 402 static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off)
 403 {
 404         struct pca953x_chip *chip = gpiochip_get_data(gc);
 405         u8 inreg = pca953x_recalc_addr(chip, chip->regs->input, off,
 406                                        true, false);
 407         u8 bit = BIT(off % BANK_SZ);
 408         u32 reg_val;
 409         int ret;
 410 
 411         mutex_lock(&chip->i2c_lock);
 412         ret = regmap_read(chip->regmap, inreg, &reg_val);
 413         mutex_unlock(&chip->i2c_lock);
 414         if (ret < 0) {
 415                 /* NOTE:  diagnostic already emitted; that's all we should
 416                  * do unless gpio_*_value_cansleep() calls become different
 417                  * from their nonsleeping siblings (and report faults).
 418                  */
 419                 return 0;
 420         }
 421 
 422         return !!(reg_val & bit);
 423 }
 424 
 425 static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val)
 426 {
 427         struct pca953x_chip *chip = gpiochip_get_data(gc);
 428         u8 outreg = pca953x_recalc_addr(chip, chip->regs->output, off,
 429                                         true, false);
 430         u8 bit = BIT(off % BANK_SZ);
 431 
 432         mutex_lock(&chip->i2c_lock);
 433         regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0);
 434         mutex_unlock(&chip->i2c_lock);
 435 }
 436 
 437 static int pca953x_gpio_get_direction(struct gpio_chip *gc, unsigned off)
 438 {
 439         struct pca953x_chip *chip = gpiochip_get_data(gc);
 440         u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off,
 441                                         true, false);
 442         u8 bit = BIT(off % BANK_SZ);
 443         u32 reg_val;
 444         int ret;
 445 
 446         mutex_lock(&chip->i2c_lock);
 447         ret = regmap_read(chip->regmap, dirreg, &reg_val);
 448         mutex_unlock(&chip->i2c_lock);
 449         if (ret < 0)
 450                 return ret;
 451 
 452         return !!(reg_val & bit);
 453 }
 454 
 455 static void pca953x_gpio_set_multiple(struct gpio_chip *gc,
 456                                       unsigned long *mask, unsigned long *bits)
 457 {
 458         struct pca953x_chip *chip = gpiochip_get_data(gc);
 459         unsigned int bank_mask, bank_val;
 460         int bank;
 461         u8 reg_val[MAX_BANK];
 462         int ret;
 463 
 464         mutex_lock(&chip->i2c_lock);
 465         ret = pca953x_read_regs(chip, chip->regs->output, reg_val);
 466         if (ret)
 467                 goto exit;
 468 
 469         for (bank = 0; bank < NBANK(chip); bank++) {
 470                 bank_mask = mask[bank / sizeof(*mask)] >>
 471                            ((bank % sizeof(*mask)) * 8);
 472                 if (bank_mask) {
 473                         bank_val = bits[bank / sizeof(*bits)] >>
 474                                   ((bank % sizeof(*bits)) * 8);
 475                         bank_val &= bank_mask;
 476                         reg_val[bank] = (reg_val[bank] & ~bank_mask) | bank_val;
 477                 }
 478         }
 479 
 480         pca953x_write_regs(chip, chip->regs->output, reg_val);
 481 exit:
 482         mutex_unlock(&chip->i2c_lock);
 483 }
 484 
 485 static int pca953x_gpio_set_pull_up_down(struct pca953x_chip *chip,
 486                                          unsigned int offset,
 487                                          unsigned long config)
 488 {
 489         u8 pull_en_reg = pca953x_recalc_addr(chip, PCAL953X_PULL_EN, offset,
 490                                              true, false);
 491         u8 pull_sel_reg = pca953x_recalc_addr(chip, PCAL953X_PULL_SEL, offset,
 492                                               true, false);
 493         u8 bit = BIT(offset % BANK_SZ);
 494         int ret;
 495 
 496         /*
 497          * pull-up/pull-down configuration requires PCAL extended
 498          * registers
 499          */
 500         if (!(chip->driver_data & PCA_PCAL))
 501                 return -ENOTSUPP;
 502 
 503         mutex_lock(&chip->i2c_lock);
 504 
 505         /* Disable pull-up/pull-down */
 506         ret = regmap_write_bits(chip->regmap, pull_en_reg, bit, 0);
 507         if (ret)
 508                 goto exit;
 509 
 510         /* Configure pull-up/pull-down */
 511         if (config == PIN_CONFIG_BIAS_PULL_UP)
 512                 ret = regmap_write_bits(chip->regmap, pull_sel_reg, bit, bit);
 513         else if (config == PIN_CONFIG_BIAS_PULL_DOWN)
 514                 ret = regmap_write_bits(chip->regmap, pull_sel_reg, bit, 0);
 515         if (ret)
 516                 goto exit;
 517 
 518         /* Enable pull-up/pull-down */
 519         ret = regmap_write_bits(chip->regmap, pull_en_reg, bit, bit);
 520 
 521 exit:
 522         mutex_unlock(&chip->i2c_lock);
 523         return ret;
 524 }
 525 
 526 static int pca953x_gpio_set_config(struct gpio_chip *gc, unsigned int offset,
 527                                    unsigned long config)
 528 {
 529         struct pca953x_chip *chip = gpiochip_get_data(gc);
 530 
 531         switch (pinconf_to_config_param(config)) {
 532         case PIN_CONFIG_BIAS_PULL_UP:
 533         case PIN_CONFIG_BIAS_PULL_DOWN:
 534                 return pca953x_gpio_set_pull_up_down(chip, offset, config);
 535         default:
 536                 return -ENOTSUPP;
 537         }
 538 }
 539 
 540 static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios)
 541 {
 542         struct gpio_chip *gc;
 543 
 544         gc = &chip->gpio_chip;
 545 
 546         gc->direction_input  = pca953x_gpio_direction_input;
 547         gc->direction_output = pca953x_gpio_direction_output;
 548         gc->get = pca953x_gpio_get_value;
 549         gc->set = pca953x_gpio_set_value;
 550         gc->get_direction = pca953x_gpio_get_direction;
 551         gc->set_multiple = pca953x_gpio_set_multiple;
 552         gc->set_config = pca953x_gpio_set_config;
 553         gc->can_sleep = true;
 554 
 555         gc->base = chip->gpio_start;
 556         gc->ngpio = gpios;
 557         gc->label = dev_name(&chip->client->dev);
 558         gc->parent = &chip->client->dev;
 559         gc->owner = THIS_MODULE;
 560         gc->names = chip->names;
 561 }
 562 
 563 #ifdef CONFIG_GPIO_PCA953X_IRQ
 564 static void pca953x_irq_mask(struct irq_data *d)
 565 {
 566         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 567         struct pca953x_chip *chip = gpiochip_get_data(gc);
 568 
 569         chip->irq_mask[d->hwirq / BANK_SZ] &= ~BIT(d->hwirq % BANK_SZ);
 570 }
 571 
 572 static void pca953x_irq_unmask(struct irq_data *d)
 573 {
 574         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 575         struct pca953x_chip *chip = gpiochip_get_data(gc);
 576 
 577         chip->irq_mask[d->hwirq / BANK_SZ] |= BIT(d->hwirq % BANK_SZ);
 578 }
 579 
 580 static int pca953x_irq_set_wake(struct irq_data *d, unsigned int on)
 581 {
 582         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 583         struct pca953x_chip *chip = gpiochip_get_data(gc);
 584 
 585         if (on)
 586                 atomic_inc(&chip->wakeup_path);
 587         else
 588                 atomic_dec(&chip->wakeup_path);
 589 
 590         return irq_set_irq_wake(chip->client->irq, on);
 591 }
 592 
 593 static void pca953x_irq_bus_lock(struct irq_data *d)
 594 {
 595         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 596         struct pca953x_chip *chip = gpiochip_get_data(gc);
 597 
 598         mutex_lock(&chip->irq_lock);
 599 }
 600 
 601 static void pca953x_irq_bus_sync_unlock(struct irq_data *d)
 602 {
 603         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 604         struct pca953x_chip *chip = gpiochip_get_data(gc);
 605         u8 new_irqs;
 606         int level, i;
 607         u8 invert_irq_mask[MAX_BANK];
 608         u8 reg_direction[MAX_BANK];
 609 
 610         pca953x_read_regs(chip, chip->regs->direction, reg_direction);
 611 
 612         if (chip->driver_data & PCA_PCAL) {
 613                 /* Enable latch on interrupt-enabled inputs */
 614                 pca953x_write_regs(chip, PCAL953X_IN_LATCH, chip->irq_mask);
 615 
 616                 for (i = 0; i < NBANK(chip); i++)
 617                         invert_irq_mask[i] = ~chip->irq_mask[i];
 618 
 619                 /* Unmask enabled interrupts */
 620                 pca953x_write_regs(chip, PCAL953X_INT_MASK, invert_irq_mask);
 621         }
 622 
 623         /* Look for any newly setup interrupt */
 624         for (i = 0; i < NBANK(chip); i++) {
 625                 new_irqs = chip->irq_trig_fall[i] | chip->irq_trig_raise[i];
 626                 new_irqs &= reg_direction[i];
 627 
 628                 while (new_irqs) {
 629                         level = __ffs(new_irqs);
 630                         pca953x_gpio_direction_input(&chip->gpio_chip,
 631                                                         level + (BANK_SZ * i));
 632                         new_irqs &= ~(1 << level);
 633                 }
 634         }
 635 
 636         mutex_unlock(&chip->irq_lock);
 637 }
 638 
 639 static int pca953x_irq_set_type(struct irq_data *d, unsigned int type)
 640 {
 641         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 642         struct pca953x_chip *chip = gpiochip_get_data(gc);
 643         int bank_nb = d->hwirq / BANK_SZ;
 644         u8 mask = BIT(d->hwirq % BANK_SZ);
 645 
 646         if (!(type & IRQ_TYPE_EDGE_BOTH)) {
 647                 dev_err(&chip->client->dev, "irq %d: unsupported type %d\n",
 648                         d->irq, type);
 649                 return -EINVAL;
 650         }
 651 
 652         if (type & IRQ_TYPE_EDGE_FALLING)
 653                 chip->irq_trig_fall[bank_nb] |= mask;
 654         else
 655                 chip->irq_trig_fall[bank_nb] &= ~mask;
 656 
 657         if (type & IRQ_TYPE_EDGE_RISING)
 658                 chip->irq_trig_raise[bank_nb] |= mask;
 659         else
 660                 chip->irq_trig_raise[bank_nb] &= ~mask;
 661 
 662         return 0;
 663 }
 664 
 665 static void pca953x_irq_shutdown(struct irq_data *d)
 666 {
 667         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 668         struct pca953x_chip *chip = gpiochip_get_data(gc);
 669         u8 mask = BIT(d->hwirq % BANK_SZ);
 670 
 671         chip->irq_trig_raise[d->hwirq / BANK_SZ] &= ~mask;
 672         chip->irq_trig_fall[d->hwirq / BANK_SZ] &= ~mask;
 673 }
 674 
 675 static bool pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending)
 676 {
 677         u8 cur_stat[MAX_BANK];
 678         u8 old_stat[MAX_BANK];
 679         bool pending_seen = false;
 680         bool trigger_seen = false;
 681         u8 trigger[MAX_BANK];
 682         u8 reg_direction[MAX_BANK];
 683         int ret, i;
 684 
 685         if (chip->driver_data & PCA_PCAL) {
 686                 /* Read the current interrupt status from the device */
 687                 ret = pca953x_read_regs(chip, PCAL953X_INT_STAT, trigger);
 688                 if (ret)
 689                         return false;
 690 
 691                 /* Check latched inputs and clear interrupt status */
 692                 ret = pca953x_read_regs(chip, PCA953X_INPUT, cur_stat);
 693                 if (ret)
 694                         return false;
 695 
 696                 for (i = 0; i < NBANK(chip); i++) {
 697                         /* Apply filter for rising/falling edge selection */
 698                         pending[i] = (~cur_stat[i] & chip->irq_trig_fall[i]) |
 699                                 (cur_stat[i] & chip->irq_trig_raise[i]);
 700                         pending[i] &= trigger[i];
 701                         if (pending[i])
 702                                 pending_seen = true;
 703                 }
 704 
 705                 return pending_seen;
 706         }
 707 
 708         ret = pca953x_read_regs(chip, chip->regs->input, cur_stat);
 709         if (ret)
 710                 return false;
 711 
 712         /* Remove output pins from the equation */
 713         pca953x_read_regs(chip, chip->regs->direction, reg_direction);
 714         for (i = 0; i < NBANK(chip); i++)
 715                 cur_stat[i] &= reg_direction[i];
 716 
 717         memcpy(old_stat, chip->irq_stat, NBANK(chip));
 718 
 719         for (i = 0; i < NBANK(chip); i++) {
 720                 trigger[i] = (cur_stat[i] ^ old_stat[i]) & chip->irq_mask[i];
 721                 if (trigger[i])
 722                         trigger_seen = true;
 723         }
 724 
 725         if (!trigger_seen)
 726                 return false;
 727 
 728         memcpy(chip->irq_stat, cur_stat, NBANK(chip));
 729 
 730         for (i = 0; i < NBANK(chip); i++) {
 731                 pending[i] = (old_stat[i] & chip->irq_trig_fall[i]) |
 732                         (cur_stat[i] & chip->irq_trig_raise[i]);
 733                 pending[i] &= trigger[i];
 734                 if (pending[i])
 735                         pending_seen = true;
 736         }
 737 
 738         return pending_seen;
 739 }
 740 
 741 static irqreturn_t pca953x_irq_handler(int irq, void *devid)
 742 {
 743         struct pca953x_chip *chip = devid;
 744         u8 pending[MAX_BANK];
 745         u8 level;
 746         unsigned nhandled = 0;
 747         int i;
 748 
 749         if (!pca953x_irq_pending(chip, pending))
 750                 return IRQ_NONE;
 751 
 752         for (i = 0; i < NBANK(chip); i++) {
 753                 while (pending[i]) {
 754                         level = __ffs(pending[i]);
 755                         handle_nested_irq(irq_find_mapping(chip->gpio_chip.irq.domain,
 756                                                         level + (BANK_SZ * i)));
 757                         pending[i] &= ~(1 << level);
 758                         nhandled++;
 759                 }
 760         }
 761 
 762         return (nhandled > 0) ? IRQ_HANDLED : IRQ_NONE;
 763 }
 764 
 765 static int pca953x_irq_setup(struct pca953x_chip *chip,
 766                              int irq_base)
 767 {
 768         struct i2c_client *client = chip->client;
 769         struct irq_chip *irq_chip = &chip->irq_chip;
 770         u8 reg_direction[MAX_BANK];
 771         int ret, i;
 772 
 773         if (!client->irq)
 774                 return 0;
 775 
 776         if (irq_base == -1)
 777                 return 0;
 778 
 779         if (!(chip->driver_data & PCA_INT))
 780                 return 0;
 781 
 782         ret = pca953x_read_regs(chip, chip->regs->input, chip->irq_stat);
 783         if (ret)
 784                 return ret;
 785 
 786         /*
 787          * There is no way to know which GPIO line generated the
 788          * interrupt.  We have to rely on the previous read for
 789          * this purpose.
 790          */
 791         pca953x_read_regs(chip, chip->regs->direction, reg_direction);
 792         for (i = 0; i < NBANK(chip); i++)
 793                 chip->irq_stat[i] &= reg_direction[i];
 794         mutex_init(&chip->irq_lock);
 795 
 796         ret = devm_request_threaded_irq(&client->dev, client->irq,
 797                                         NULL, pca953x_irq_handler,
 798                                         IRQF_TRIGGER_LOW | IRQF_ONESHOT |
 799                                         IRQF_SHARED,
 800                                         dev_name(&client->dev), chip);
 801         if (ret) {
 802                 dev_err(&client->dev, "failed to request irq %d\n",
 803                         client->irq);
 804                 return ret;
 805         }
 806 
 807         irq_chip->name = dev_name(&chip->client->dev);
 808         irq_chip->irq_mask = pca953x_irq_mask;
 809         irq_chip->irq_unmask = pca953x_irq_unmask;
 810         irq_chip->irq_set_wake = pca953x_irq_set_wake;
 811         irq_chip->irq_bus_lock = pca953x_irq_bus_lock;
 812         irq_chip->irq_bus_sync_unlock = pca953x_irq_bus_sync_unlock;
 813         irq_chip->irq_set_type = pca953x_irq_set_type;
 814         irq_chip->irq_shutdown = pca953x_irq_shutdown;
 815 
 816         ret =  gpiochip_irqchip_add_nested(&chip->gpio_chip, irq_chip,
 817                                            irq_base, handle_simple_irq,
 818                                            IRQ_TYPE_NONE);
 819         if (ret) {
 820                 dev_err(&client->dev,
 821                         "could not connect irqchip to gpiochip\n");
 822                 return ret;
 823         }
 824 
 825         gpiochip_set_nested_irqchip(&chip->gpio_chip, irq_chip, client->irq);
 826 
 827         return 0;
 828 }
 829 
 830 #else /* CONFIG_GPIO_PCA953X_IRQ */
 831 static int pca953x_irq_setup(struct pca953x_chip *chip,
 832                              int irq_base)
 833 {
 834         struct i2c_client *client = chip->client;
 835 
 836         if (client->irq && irq_base != -1 && (chip->driver_data & PCA_INT))
 837                 dev_warn(&client->dev, "interrupt support not compiled in\n");
 838 
 839         return 0;
 840 }
 841 #endif
 842 
 843 static int device_pca95xx_init(struct pca953x_chip *chip, u32 invert)
 844 {
 845         int ret;
 846         u8 val[MAX_BANK];
 847 
 848         ret = regcache_sync_region(chip->regmap, chip->regs->output,
 849                                    chip->regs->output + NBANK(chip));
 850         if (ret)
 851                 goto out;
 852 
 853         ret = regcache_sync_region(chip->regmap, chip->regs->direction,
 854                                    chip->regs->direction + NBANK(chip));
 855         if (ret)
 856                 goto out;
 857 
 858         /* set platform specific polarity inversion */
 859         if (invert)
 860                 memset(val, 0xFF, NBANK(chip));
 861         else
 862                 memset(val, 0, NBANK(chip));
 863 
 864         ret = pca953x_write_regs(chip, chip->regs->invert, val);
 865 out:
 866         return ret;
 867 }
 868 
 869 static int device_pca957x_init(struct pca953x_chip *chip, u32 invert)
 870 {
 871         int ret;
 872         u8 val[MAX_BANK];
 873 
 874         ret = device_pca95xx_init(chip, invert);
 875         if (ret)
 876                 goto out;
 877 
 878         /* To enable register 6, 7 to control pull up and pull down */
 879         memset(val, 0x02, NBANK(chip));
 880         ret = pca953x_write_regs(chip, PCA957X_BKEN, val);
 881         if (ret)
 882                 goto out;
 883 
 884         return 0;
 885 out:
 886         return ret;
 887 }
 888 
 889 static const struct of_device_id pca953x_dt_ids[];
 890 
 891 static int pca953x_probe(struct i2c_client *client,
 892                                    const struct i2c_device_id *i2c_id)
 893 {
 894         struct pca953x_platform_data *pdata;
 895         struct pca953x_chip *chip;
 896         int irq_base = 0;
 897         int ret;
 898         u32 invert = 0;
 899         struct regulator *reg;
 900 
 901         chip = devm_kzalloc(&client->dev,
 902                         sizeof(struct pca953x_chip), GFP_KERNEL);
 903         if (chip == NULL)
 904                 return -ENOMEM;
 905 
 906         pdata = dev_get_platdata(&client->dev);
 907         if (pdata) {
 908                 irq_base = pdata->irq_base;
 909                 chip->gpio_start = pdata->gpio_base;
 910                 invert = pdata->invert;
 911                 chip->names = pdata->names;
 912         } else {
 913                 struct gpio_desc *reset_gpio;
 914 
 915                 chip->gpio_start = -1;
 916                 irq_base = 0;
 917 
 918                 /*
 919                  * See if we need to de-assert a reset pin.
 920                  *
 921                  * There is no known ACPI-enabled platforms that are
 922                  * using "reset" GPIO. Otherwise any of those platform
 923                  * must use _DSD method with corresponding property.
 924                  */
 925                 reset_gpio = devm_gpiod_get_optional(&client->dev, "reset",
 926                                                      GPIOD_OUT_LOW);
 927                 if (IS_ERR(reset_gpio))
 928                         return PTR_ERR(reset_gpio);
 929         }
 930 
 931         chip->client = client;
 932 
 933         reg = devm_regulator_get(&client->dev, "vcc");
 934         if (IS_ERR(reg)) {
 935                 ret = PTR_ERR(reg);
 936                 if (ret != -EPROBE_DEFER)
 937                         dev_err(&client->dev, "reg get err: %d\n", ret);
 938                 return ret;
 939         }
 940         ret = regulator_enable(reg);
 941         if (ret) {
 942                 dev_err(&client->dev, "reg en err: %d\n", ret);
 943                 return ret;
 944         }
 945         chip->regulator = reg;
 946 
 947         if (i2c_id) {
 948                 chip->driver_data = i2c_id->driver_data;
 949         } else {
 950                 const void *match;
 951 
 952                 match = device_get_match_data(&client->dev);
 953                 if (!match) {
 954                         ret = -ENODEV;
 955                         goto err_exit;
 956                 }
 957 
 958                 chip->driver_data = (uintptr_t)match;
 959         }
 960 
 961         i2c_set_clientdata(client, chip);
 962 
 963         chip->regmap = devm_regmap_init_i2c(client, &pca953x_i2c_regmap);
 964         if (IS_ERR(chip->regmap)) {
 965                 ret = PTR_ERR(chip->regmap);
 966                 goto err_exit;
 967         }
 968 
 969         regcache_mark_dirty(chip->regmap);
 970 
 971         mutex_init(&chip->i2c_lock);
 972         /*
 973          * In case we have an i2c-mux controlled by a GPIO provided by an
 974          * expander using the same driver higher on the device tree, read the
 975          * i2c adapter nesting depth and use the retrieved value as lockdep
 976          * subclass for chip->i2c_lock.
 977          *
 978          * REVISIT: This solution is not complete. It protects us from lockdep
 979          * false positives when the expander controlling the i2c-mux is on
 980          * a different level on the device tree, but not when it's on the same
 981          * level on a different branch (in which case the subclass number
 982          * would be the same).
 983          *
 984          * TODO: Once a correct solution is developed, a similar fix should be
 985          * applied to all other i2c-controlled GPIO expanders (and potentially
 986          * regmap-i2c).
 987          */
 988         lockdep_set_subclass(&chip->i2c_lock,
 989                              i2c_adapter_depth(client->adapter));
 990 
 991         /* initialize cached registers from their original values.
 992          * we can't share this chip with another i2c master.
 993          */
 994         pca953x_setup_gpio(chip, chip->driver_data & PCA_GPIO_MASK);
 995 
 996         if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) {
 997                 chip->regs = &pca953x_regs;
 998                 ret = device_pca95xx_init(chip, invert);
 999         } else {
1000                 chip->regs = &pca957x_regs;
1001                 ret = device_pca957x_init(chip, invert);
1002         }
1003         if (ret)
1004                 goto err_exit;
1005 
1006         ret = devm_gpiochip_add_data(&client->dev, &chip->gpio_chip, chip);
1007         if (ret)
1008                 goto err_exit;
1009 
1010         ret = pca953x_irq_setup(chip, irq_base);
1011         if (ret)
1012                 goto err_exit;
1013 
1014         if (pdata && pdata->setup) {
1015                 ret = pdata->setup(client, chip->gpio_chip.base,
1016                                 chip->gpio_chip.ngpio, pdata->context);
1017                 if (ret < 0)
1018                         dev_warn(&client->dev, "setup failed, %d\n", ret);
1019         }
1020 
1021         return 0;
1022 
1023 err_exit:
1024         regulator_disable(chip->regulator);
1025         return ret;
1026 }
1027 
1028 static int pca953x_remove(struct i2c_client *client)
1029 {
1030         struct pca953x_platform_data *pdata = dev_get_platdata(&client->dev);
1031         struct pca953x_chip *chip = i2c_get_clientdata(client);
1032         int ret;
1033 
1034         if (pdata && pdata->teardown) {
1035                 ret = pdata->teardown(client, chip->gpio_chip.base,
1036                                 chip->gpio_chip.ngpio, pdata->context);
1037                 if (ret < 0)
1038                         dev_err(&client->dev, "teardown failed, %d\n", ret);
1039         } else {
1040                 ret = 0;
1041         }
1042 
1043         regulator_disable(chip->regulator);
1044 
1045         return ret;
1046 }
1047 
1048 #ifdef CONFIG_PM_SLEEP
1049 static int pca953x_regcache_sync(struct device *dev)
1050 {
1051         struct pca953x_chip *chip = dev_get_drvdata(dev);
1052         int ret;
1053 
1054         /*
1055          * The ordering between direction and output is important,
1056          * sync these registers first and only then sync the rest.
1057          */
1058         ret = regcache_sync_region(chip->regmap, chip->regs->direction,
1059                                    chip->regs->direction + NBANK(chip));
1060         if (ret) {
1061                 dev_err(dev, "Failed to sync GPIO dir registers: %d\n", ret);
1062                 return ret;
1063         }
1064 
1065         ret = regcache_sync_region(chip->regmap, chip->regs->output,
1066                                    chip->regs->output + NBANK(chip));
1067         if (ret) {
1068                 dev_err(dev, "Failed to sync GPIO out registers: %d\n", ret);
1069                 return ret;
1070         }
1071 
1072 #ifdef CONFIG_GPIO_PCA953X_IRQ
1073         if (chip->driver_data & PCA_PCAL) {
1074                 ret = regcache_sync_region(chip->regmap, PCAL953X_IN_LATCH,
1075                                            PCAL953X_IN_LATCH + NBANK(chip));
1076                 if (ret) {
1077                         dev_err(dev, "Failed to sync INT latch registers: %d\n",
1078                                 ret);
1079                         return ret;
1080                 }
1081 
1082                 ret = regcache_sync_region(chip->regmap, PCAL953X_INT_MASK,
1083                                            PCAL953X_INT_MASK + NBANK(chip));
1084                 if (ret) {
1085                         dev_err(dev, "Failed to sync INT mask registers: %d\n",
1086                                 ret);
1087                         return ret;
1088                 }
1089         }
1090 #endif
1091 
1092         return 0;
1093 }
1094 
1095 static int pca953x_suspend(struct device *dev)
1096 {
1097         struct pca953x_chip *chip = dev_get_drvdata(dev);
1098 
1099         regcache_cache_only(chip->regmap, true);
1100 
1101         if (atomic_read(&chip->wakeup_path))
1102                 device_set_wakeup_path(dev);
1103         else
1104                 regulator_disable(chip->regulator);
1105 
1106         return 0;
1107 }
1108 
1109 static int pca953x_resume(struct device *dev)
1110 {
1111         struct pca953x_chip *chip = dev_get_drvdata(dev);
1112         int ret;
1113 
1114         if (!atomic_read(&chip->wakeup_path)) {
1115                 ret = regulator_enable(chip->regulator);
1116                 if (ret) {
1117                         dev_err(dev, "Failed to enable regulator: %d\n", ret);
1118                         return 0;
1119                 }
1120         }
1121 
1122         regcache_cache_only(chip->regmap, false);
1123         regcache_mark_dirty(chip->regmap);
1124         ret = pca953x_regcache_sync(dev);
1125         if (ret)
1126                 return ret;
1127 
1128         ret = regcache_sync(chip->regmap);
1129         if (ret) {
1130                 dev_err(dev, "Failed to restore register map: %d\n", ret);
1131                 return ret;
1132         }
1133 
1134         return 0;
1135 }
1136 #endif
1137 
1138 /* convenience to stop overlong match-table lines */
1139 #define OF_953X(__nrgpio, __int) (void *)(__nrgpio | PCA953X_TYPE | __int)
1140 #define OF_957X(__nrgpio, __int) (void *)(__nrgpio | PCA957X_TYPE | __int)
1141 
1142 static const struct of_device_id pca953x_dt_ids[] = {
1143         { .compatible = "nxp,pca6416", .data = OF_953X(16, PCA_INT), },
1144         { .compatible = "nxp,pca9505", .data = OF_953X(40, PCA_INT), },
1145         { .compatible = "nxp,pca9534", .data = OF_953X( 8, PCA_INT), },
1146         { .compatible = "nxp,pca9535", .data = OF_953X(16, PCA_INT), },
1147         { .compatible = "nxp,pca9536", .data = OF_953X( 4, 0), },
1148         { .compatible = "nxp,pca9537", .data = OF_953X( 4, PCA_INT), },
1149         { .compatible = "nxp,pca9538", .data = OF_953X( 8, PCA_INT), },
1150         { .compatible = "nxp,pca9539", .data = OF_953X(16, PCA_INT), },
1151         { .compatible = "nxp,pca9554", .data = OF_953X( 8, PCA_INT), },
1152         { .compatible = "nxp,pca9555", .data = OF_953X(16, PCA_INT), },
1153         { .compatible = "nxp,pca9556", .data = OF_953X( 8, 0), },
1154         { .compatible = "nxp,pca9557", .data = OF_953X( 8, 0), },
1155         { .compatible = "nxp,pca9574", .data = OF_957X( 8, PCA_INT), },
1156         { .compatible = "nxp,pca9575", .data = OF_957X(16, PCA_INT), },
1157         { .compatible = "nxp,pca9698", .data = OF_953X(40, 0), },
1158 
1159         { .compatible = "nxp,pcal6416", .data = OF_953X(16, PCA_LATCH_INT), },
1160         { .compatible = "nxp,pcal6524", .data = OF_953X(24, PCA_LATCH_INT), },
1161         { .compatible = "nxp,pcal9555a", .data = OF_953X(16, PCA_LATCH_INT), },
1162 
1163         { .compatible = "maxim,max7310", .data = OF_953X( 8, 0), },
1164         { .compatible = "maxim,max7312", .data = OF_953X(16, PCA_INT), },
1165         { .compatible = "maxim,max7313", .data = OF_953X(16, PCA_INT), },
1166         { .compatible = "maxim,max7315", .data = OF_953X( 8, PCA_INT), },
1167         { .compatible = "maxim,max7318", .data = OF_953X(16, PCA_INT), },
1168 
1169         { .compatible = "ti,pca6107", .data = OF_953X( 8, PCA_INT), },
1170         { .compatible = "ti,pca9536", .data = OF_953X( 4, 0), },
1171         { .compatible = "ti,tca6408", .data = OF_953X( 8, PCA_INT), },
1172         { .compatible = "ti,tca6416", .data = OF_953X(16, PCA_INT), },
1173         { .compatible = "ti,tca6424", .data = OF_953X(24, PCA_INT), },
1174         { .compatible = "ti,tca9539", .data = OF_953X(16, PCA_INT), },
1175 
1176         { .compatible = "onnn,cat9554", .data = OF_953X( 8, PCA_INT), },
1177         { .compatible = "onnn,pca9654", .data = OF_953X( 8, PCA_INT), },
1178 
1179         { .compatible = "exar,xra1202", .data = OF_953X( 8, 0), },
1180         { }
1181 };
1182 
1183 MODULE_DEVICE_TABLE(of, pca953x_dt_ids);
1184 
1185 static SIMPLE_DEV_PM_OPS(pca953x_pm_ops, pca953x_suspend, pca953x_resume);
1186 
1187 static struct i2c_driver pca953x_driver = {
1188         .driver = {
1189                 .name   = "pca953x",
1190                 .pm     = &pca953x_pm_ops,
1191                 .of_match_table = pca953x_dt_ids,
1192                 .acpi_match_table = ACPI_PTR(pca953x_acpi_ids),
1193         },
1194         .probe          = pca953x_probe,
1195         .remove         = pca953x_remove,
1196         .id_table       = pca953x_id,
1197 };
1198 
1199 static int __init pca953x_init(void)
1200 {
1201         return i2c_add_driver(&pca953x_driver);
1202 }
1203 /* register after i2c postcore initcall and before
1204  * subsys initcalls that may rely on these GPIOs
1205  */
1206 subsys_initcall(pca953x_init);
1207 
1208 static void __exit pca953x_exit(void)
1209 {
1210         i2c_del_driver(&pca953x_driver);
1211 }
1212 module_exit(pca953x_exit);
1213 
1214 MODULE_AUTHOR("eric miao <eric.miao@marvell.com>");
1215 MODULE_DESCRIPTION("GPIO expander driver for PCA953x");
1216 MODULE_LICENSE("GPL");
/* [<][>][^][v][top][bottom][index][help] */
root/drivers/gpio/gpio-pca953x.c

DEFINITIONS
