root/drivers/gpio/gpio-reg.c

DEFINITIONS

1. gpio_reg_get_direction
2. gpio_reg_direction_output
3. gpio_reg_direction_input
4. gpio_reg_set
5. gpio_reg_get
6. gpio_reg_set_multiple
7. gpio_reg_to_irq
8. gpio_reg_init
9. gpio_reg_resume

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * gpio-reg: single register individually fixed-direction GPIOs
   4  *
   5  * Copyright (C) 2016 Russell King
   6  */
   7 #include <linux/gpio/driver.h>
   8 #include <linux/gpio/gpio-reg.h>
   9 #include <linux/io.h>
  10 #include <linux/slab.h>
  11 #include <linux/spinlock.h>
  12 
  13 struct gpio_reg {
  14         struct gpio_chip gc;
  15         spinlock_t lock;
  16         u32 direction;
  17         u32 out;
  18         void __iomem *reg;
  19         struct irq_domain *irqdomain;
  20         const int *irqs;
  21 };
  22 
  23 #define to_gpio_reg(x) container_of(x, struct gpio_reg, gc)
  24 
  25 static int gpio_reg_get_direction(struct gpio_chip *gc, unsigned offset)
  26 {
  27         struct gpio_reg *r = to_gpio_reg(gc);
  28 
  29         return r->direction & BIT(offset) ? 1 : 0;
  30 }
  31 
  32 static int gpio_reg_direction_output(struct gpio_chip *gc, unsigned offset,
  33         int value)
  34 {
  35         struct gpio_reg *r = to_gpio_reg(gc);
  36 
  37         if (r->direction & BIT(offset))
  38                 return -ENOTSUPP;
  39 
  40         gc->set(gc, offset, value);
  41         return 0;
  42 }
  43 
  44 static int gpio_reg_direction_input(struct gpio_chip *gc, unsigned offset)
  45 {
  46         struct gpio_reg *r = to_gpio_reg(gc);
  47 
  48         return r->direction & BIT(offset) ? 0 : -ENOTSUPP;
  49 }
  50 
  51 static void gpio_reg_set(struct gpio_chip *gc, unsigned offset, int value)
  52 {
  53         struct gpio_reg *r = to_gpio_reg(gc);
  54         unsigned long flags;
  55         u32 val, mask = BIT(offset);
  56 
  57         spin_lock_irqsave(&r->lock, flags);
  58         val = r->out;
  59         if (value)
  60                 val |= mask;
  61         else
  62                 val &= ~mask;
  63         r->out = val;
  64         writel_relaxed(val, r->reg);
  65         spin_unlock_irqrestore(&r->lock, flags);
  66 }
  67 
  68 static int gpio_reg_get(struct gpio_chip *gc, unsigned offset)
  69 {
  70         struct gpio_reg *r = to_gpio_reg(gc);
  71         u32 val, mask = BIT(offset);
  72 
  73         if (r->direction & mask) {
  74                 /*
  75                  * double-read the value, some registers latch after the
  76                  * first read.
  77                  */
  78                 readl_relaxed(r->reg);
  79                 val = readl_relaxed(r->reg);
  80         } else {
  81                 val = r->out;
  82         }
  83         return !!(val & mask);
  84 }
  85 
  86 static void gpio_reg_set_multiple(struct gpio_chip *gc, unsigned long *mask,
  87         unsigned long *bits)
  88 {
  89         struct gpio_reg *r = to_gpio_reg(gc);
  90         unsigned long flags;
  91 
  92         spin_lock_irqsave(&r->lock, flags);
  93         r->out = (r->out & ~*mask) | (*bits & *mask);
  94         writel_relaxed(r->out, r->reg);
  95         spin_unlock_irqrestore(&r->lock, flags);
  96 }
  97 
  98 static int gpio_reg_to_irq(struct gpio_chip *gc, unsigned offset)
  99 {
 100         struct gpio_reg *r = to_gpio_reg(gc);
 101         int irq = r->irqs[offset];
 102 
 103         if (irq >= 0 && r->irqdomain)
 104                 irq = irq_find_mapping(r->irqdomain, irq);
 105 
 106         return irq;
 107 }
 108 
 109 /**
 110  * gpio_reg_init - add a fixed in/out register as gpio
 111  * @dev: optional struct device associated with this register
 112  * @base: start gpio number, or -1 to allocate
 113  * @num: number of GPIOs, maximum 32
 114  * @label: GPIO chip label
 115  * @direction: bitmask of fixed direction, one per GPIO signal, 1 = in
 116  * @def_out: initial GPIO output value
 117  * @names: array of %num strings describing each GPIO signal or %NULL
 118  * @irqdom: irq domain or %NULL
 119  * @irqs: array of %num ints describing the interrupt mapping for each
 120  *        GPIO signal, or %NULL.  If @irqdom is %NULL, then this
 121  *        describes the Linux interrupt number, otherwise it describes
 122  *        the hardware interrupt number in the specified irq domain.
 123  *
 124  * Add a single-register GPIO device containing up to 32 GPIO signals,
 125  * where each GPIO has a fixed input or output configuration.  Only
 126  * input GPIOs are assumed to be readable from the register, and only
 127  * then after a double-read.  Output values are assumed not to be
 128  * readable.
 129  */
 130 struct gpio_chip *gpio_reg_init(struct device *dev, void __iomem *reg,
 131         int base, int num, const char *label, u32 direction, u32 def_out,
 132         const char *const *names, struct irq_domain *irqdom, const int *irqs)
 133 {
 134         struct gpio_reg *r;
 135         int ret;
 136 
 137         if (dev)
 138                 r = devm_kzalloc(dev, sizeof(*r), GFP_KERNEL);
 139         else
 140                 r = kzalloc(sizeof(*r), GFP_KERNEL);
 141 
 142         if (!r)
 143                 return ERR_PTR(-ENOMEM);
 144 
 145         spin_lock_init(&r->lock);
 146 
 147         r->gc.label = label;
 148         r->gc.get_direction = gpio_reg_get_direction;
 149         r->gc.direction_input = gpio_reg_direction_input;
 150         r->gc.direction_output = gpio_reg_direction_output;
 151         r->gc.set = gpio_reg_set;
 152         r->gc.get = gpio_reg_get;
 153         r->gc.set_multiple = gpio_reg_set_multiple;
 154         if (irqs)
 155                 r->gc.to_irq = gpio_reg_to_irq;
 156         r->gc.base = base;
 157         r->gc.ngpio = num;
 158         r->gc.names = names;
 159         r->direction = direction;
 160         r->out = def_out;
 161         r->reg = reg;
 162         r->irqs = irqs;
 163 
 164         if (dev)
 165                 ret = devm_gpiochip_add_data(dev, &r->gc, r);
 166         else
 167                 ret = gpiochip_add_data(&r->gc, r);
 168 
 169         return ret ? ERR_PTR(ret) : &r->gc;
 170 }
 171 
 172 int gpio_reg_resume(struct gpio_chip *gc)
 173 {
 174         struct gpio_reg *r = to_gpio_reg(gc);
 175         unsigned long flags;
 176 
 177         spin_lock_irqsave(&r->lock, flags);
 178         writel_relaxed(r->out, r->reg);
 179         spin_unlock_irqrestore(&r->lock, flags);
 180 
 181         return 0;
 182 }