root/drivers/platform/x86/intel_atomisp2_pm.c

DEFINITIONS

1. isp_set_power
2. isp_probe
3. isp_remove
4. isp_pci_suspend
5. isp_pci_resume

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Dummy driver for Intel's Image Signal Processor found on Bay and Cherry
   4  * Trail devices. The sole purpose of this driver is to allow the ISP to
   5  * be put in D3.
   6  *
   7  * Copyright (C) 2018 Hans de Goede <hdegoede@redhat.com>
   8  *
   9  * Based on various non upstream patches for ISP support:
  10  * Copyright (C) 2010-2017 Intel Corporation. All rights reserved.
  11  * Copyright (c) 2010 Silicon Hive www.siliconhive.com.
  12  */
  13 
  14 #include <linux/delay.h>
  15 #include <linux/module.h>
  16 #include <linux/mod_devicetable.h>
  17 #include <linux/pci.h>
  18 #include <linux/pm_runtime.h>
  19 #include <asm/iosf_mbi.h>
  20 
  21 /* PCI configuration regs */
  22 #define PCI_INTERRUPT_CTRL              0x9c
  23 
  24 #define PCI_CSI_CONTROL                 0xe8
  25 #define PCI_CSI_CONTROL_PORTS_OFF_MASK  0x7
  26 
  27 /* IOSF BT_MBI_UNIT_PMC regs */
  28 #define ISPSSPM0                        0x39
  29 #define ISPSSPM0_ISPSSC_OFFSET          0
  30 #define ISPSSPM0_ISPSSC_MASK            0x00000003
  31 #define ISPSSPM0_ISPSSS_OFFSET          24
  32 #define ISPSSPM0_ISPSSS_MASK            0x03000000
  33 #define ISPSSPM0_IUNIT_POWER_ON         0x0
  34 #define ISPSSPM0_IUNIT_POWER_OFF        0x3
  35 
  36 static int isp_set_power(struct pci_dev *dev, bool enable)
  37 {
  38         unsigned long timeout;
  39         u32 val = enable ? ISPSSPM0_IUNIT_POWER_ON :
  40                 ISPSSPM0_IUNIT_POWER_OFF;
  41 
  42         /* Write to ISPSSPM0 bit[1:0] to power on/off the IUNIT */
  43         iosf_mbi_modify(BT_MBI_UNIT_PMC, MBI_REG_READ, ISPSSPM0,
  44                         val, ISPSSPM0_ISPSSC_MASK);
  45 
  46         /*
  47          * There should be no IUNIT access while power-down is
  48          * in progress HW sighting: 4567865
  49          * Wait up to 50 ms for the IUNIT to shut down.
  50          * And we do the same for power on.
  51          */
  52         timeout = jiffies + msecs_to_jiffies(50);
  53         while (1) {
  54                 u32 tmp;
  55 
  56                 /* Wait until ISPSSPM0 bit[25:24] shows the right value */
  57                 iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, ISPSSPM0, &tmp);
  58                 tmp = (tmp & ISPSSPM0_ISPSSS_MASK) >> ISPSSPM0_ISPSSS_OFFSET;
  59                 if (tmp == val)
  60                         break;
  61 
  62                 if (time_after(jiffies, timeout)) {
  63                         dev_err(&dev->dev, "IUNIT power-%s timeout.\n",
  64                                 enable ? "on" : "off");
  65                         return -EBUSY;
  66                 }
  67                 usleep_range(1000, 2000);
  68         }
  69 
  70         return 0;
  71 }
  72 
  73 static int isp_probe(struct pci_dev *dev, const struct pci_device_id *id)
  74 {
  75         pm_runtime_allow(&dev->dev);
  76         pm_runtime_put_sync_suspend(&dev->dev);
  77 
  78         return 0;
  79 }
  80 
  81 static void isp_remove(struct pci_dev *dev)
  82 {
  83         pm_runtime_get_sync(&dev->dev);
  84         pm_runtime_forbid(&dev->dev);
  85 }
  86 
  87 static int isp_pci_suspend(struct device *dev)
  88 {
  89         struct pci_dev *pdev = to_pci_dev(dev);
  90         u32 val;
  91 
  92         pci_write_config_dword(pdev, PCI_INTERRUPT_CTRL, 0);
  93 
  94         /*
  95          * MRFLD IUNIT DPHY is located in an always-power-on island
  96          * MRFLD HW design need all CSI ports are disabled before
  97          * powering down the IUNIT.
  98          */
  99         pci_read_config_dword(pdev, PCI_CSI_CONTROL, &val);
 100         val |= PCI_CSI_CONTROL_PORTS_OFF_MASK;
 101         pci_write_config_dword(pdev, PCI_CSI_CONTROL, val);
 102 
 103         /*
 104          * We lose config space access when punit power gates
 105          * the ISP. Can't use pci_set_power_state() because
 106          * pmcsr won't actually change when we write to it.
 107          */
 108         pci_save_state(pdev);
 109         pdev->current_state = PCI_D3cold;
 110         isp_set_power(pdev, false);
 111 
 112         return 0;
 113 }
 114 
 115 static int isp_pci_resume(struct device *dev)
 116 {
 117         struct pci_dev *pdev = to_pci_dev(dev);
 118 
 119         isp_set_power(pdev, true);
 120         pdev->current_state = PCI_D0;
 121         pci_restore_state(pdev);
 122 
 123         return 0;
 124 }
 125 
 126 static UNIVERSAL_DEV_PM_OPS(isp_pm_ops, isp_pci_suspend,
 127                             isp_pci_resume, NULL);
 128 
 129 static const struct pci_device_id isp_id_table[] = {
 130         { PCI_VDEVICE(INTEL, 0x0f38), },
 131         { PCI_VDEVICE(INTEL, 0x22b8), },
 132         { 0, }
 133 };
 134 MODULE_DEVICE_TABLE(pci, isp_id_table);
 135 
 136 static struct pci_driver isp_pci_driver = {
 137         .name = "intel_atomisp2_pm",
 138         .id_table = isp_id_table,
 139         .probe = isp_probe,
 140         .remove = isp_remove,
 141         .driver.pm = &isp_pm_ops,
 142 };
 143 
 144 module_pci_driver(isp_pci_driver);
 145 
 146 MODULE_DESCRIPTION("Intel AtomISP2 dummy / power-management drv (for suspend)");
 147 MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>");
 148 MODULE_LICENSE("GPL v2");