This source file includes following definitions.
- pdev_is_gen1
- pdev_is_gen3
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51 #ifndef NTB_HW_INTEL_H
52 #define NTB_HW_INTEL_H
53
54 #include <linux/ntb.h>
55 #include <linux/pci.h>
56 #include <linux/io-64-nonatomic-lo-hi.h>
57
58
59 #define PCI_DEVICE_ID_INTEL_NTB_B2B_JSF 0x3725
60 #define PCI_DEVICE_ID_INTEL_NTB_PS_JSF 0x3726
61 #define PCI_DEVICE_ID_INTEL_NTB_SS_JSF 0x3727
62 #define PCI_DEVICE_ID_INTEL_NTB_B2B_SNB 0x3C0D
63 #define PCI_DEVICE_ID_INTEL_NTB_PS_SNB 0x3C0E
64 #define PCI_DEVICE_ID_INTEL_NTB_SS_SNB 0x3C0F
65 #define PCI_DEVICE_ID_INTEL_NTB_B2B_IVT 0x0E0D
66 #define PCI_DEVICE_ID_INTEL_NTB_PS_IVT 0x0E0E
67 #define PCI_DEVICE_ID_INTEL_NTB_SS_IVT 0x0E0F
68 #define PCI_DEVICE_ID_INTEL_NTB_B2B_HSX 0x2F0D
69 #define PCI_DEVICE_ID_INTEL_NTB_PS_HSX 0x2F0E
70 #define PCI_DEVICE_ID_INTEL_NTB_SS_HSX 0x2F0F
71 #define PCI_DEVICE_ID_INTEL_NTB_B2B_BDX 0x6F0D
72 #define PCI_DEVICE_ID_INTEL_NTB_PS_BDX 0x6F0E
73 #define PCI_DEVICE_ID_INTEL_NTB_SS_BDX 0x6F0F
74 #define PCI_DEVICE_ID_INTEL_NTB_B2B_SKX 0x201C
75
76
77 #define NTB_CTL_CFG_LOCK BIT(0)
78 #define NTB_CTL_DISABLE BIT(1)
79 #define NTB_CTL_S2P_BAR2_SNOOP BIT(2)
80 #define NTB_CTL_P2S_BAR2_SNOOP BIT(4)
81 #define NTB_CTL_S2P_BAR4_SNOOP BIT(6)
82 #define NTB_CTL_P2S_BAR4_SNOOP BIT(8)
83 #define NTB_CTL_S2P_BAR5_SNOOP BIT(12)
84 #define NTB_CTL_P2S_BAR5_SNOOP BIT(14)
85
86 #define NTB_LNK_STA_ACTIVE_BIT 0x2000
87 #define NTB_LNK_STA_SPEED_MASK 0x000f
88 #define NTB_LNK_STA_WIDTH_MASK 0x03f0
89 #define NTB_LNK_STA_ACTIVE(x) (!!((x) & NTB_LNK_STA_ACTIVE_BIT))
90 #define NTB_LNK_STA_SPEED(x) ((x) & NTB_LNK_STA_SPEED_MASK)
91 #define NTB_LNK_STA_WIDTH(x) (((x) & NTB_LNK_STA_WIDTH_MASK) >> 4)
92
93
94 #define NTB_UNSAFE_DB BIT_ULL(0)
95 #define NTB_UNSAFE_SPAD BIT_ULL(1)
96
97 #define NTB_BAR_MASK_64 ~(0xfull)
98 #define NTB_BAR_MASK_32 ~(0xfu)
99
100 struct intel_ntb_dev;
101
102 struct intel_ntb_reg {
103 int (*poll_link)(struct intel_ntb_dev *ndev);
104 int (*link_is_up)(struct intel_ntb_dev *ndev);
105 u64 (*db_ioread)(void __iomem *mmio);
106 void (*db_iowrite)(u64 db_bits, void __iomem *mmio);
107 unsigned long ntb_ctl;
108 resource_size_t db_size;
109 int mw_bar[];
110 };
111
112 struct intel_ntb_alt_reg {
113 unsigned long db_bell;
114 unsigned long db_mask;
115 unsigned long db_clear;
116 unsigned long spad;
117 };
118
119 struct intel_ntb_xlat_reg {
120 unsigned long bar0_base;
121 unsigned long bar2_xlat;
122 unsigned long bar2_limit;
123 };
124
125 struct intel_b2b_addr {
126 phys_addr_t bar0_addr;
127 phys_addr_t bar2_addr64;
128 phys_addr_t bar4_addr64;
129 phys_addr_t bar4_addr32;
130 phys_addr_t bar5_addr32;
131 };
132
133 struct intel_ntb_vec {
134 struct intel_ntb_dev *ndev;
135 int num;
136 };
137
138 struct intel_ntb_dev {
139 struct ntb_dev ntb;
140
141
142 unsigned long b2b_off;
143
144 unsigned int b2b_idx;
145
146
147 bool bar4_split;
148
149 u32 ntb_ctl;
150 u32 lnk_sta;
151
152 unsigned char mw_count;
153 unsigned char spad_count;
154 unsigned char db_count;
155 unsigned char db_vec_count;
156 unsigned char db_vec_shift;
157
158 u64 db_valid_mask;
159 u64 db_link_mask;
160 u64 db_mask;
161
162
163 spinlock_t db_mask_lock;
164
165 struct msix_entry *msix;
166 struct intel_ntb_vec *vec;
167
168 const struct intel_ntb_reg *reg;
169 const struct intel_ntb_alt_reg *self_reg;
170 const struct intel_ntb_alt_reg *peer_reg;
171 const struct intel_ntb_xlat_reg *xlat_reg;
172 void __iomem *self_mmio;
173 void __iomem *peer_mmio;
174 phys_addr_t peer_addr;
175
176 unsigned long last_ts;
177 struct delayed_work hb_timer;
178
179 unsigned long hwerr_flags;
180 unsigned long unsafe_flags;
181 unsigned long unsafe_flags_ignore;
182
183 struct dentry *debugfs_dir;
184 struct dentry *debugfs_info;
185 };
186
187 #define ntb_ndev(__ntb) container_of(__ntb, struct intel_ntb_dev, ntb)
188 #define hb_ndev(__work) container_of(__work, struct intel_ntb_dev, \
189 hb_timer.work)
190
191 static inline int pdev_is_gen1(struct pci_dev *pdev)
192 {
193 switch (pdev->device) {
194 case PCI_DEVICE_ID_INTEL_NTB_SS_JSF:
195 case PCI_DEVICE_ID_INTEL_NTB_SS_SNB:
196 case PCI_DEVICE_ID_INTEL_NTB_SS_IVT:
197 case PCI_DEVICE_ID_INTEL_NTB_SS_HSX:
198 case PCI_DEVICE_ID_INTEL_NTB_SS_BDX:
199 case PCI_DEVICE_ID_INTEL_NTB_PS_JSF:
200 case PCI_DEVICE_ID_INTEL_NTB_PS_SNB:
201 case PCI_DEVICE_ID_INTEL_NTB_PS_IVT:
202 case PCI_DEVICE_ID_INTEL_NTB_PS_HSX:
203 case PCI_DEVICE_ID_INTEL_NTB_PS_BDX:
204 case PCI_DEVICE_ID_INTEL_NTB_B2B_JSF:
205 case PCI_DEVICE_ID_INTEL_NTB_B2B_SNB:
206 case PCI_DEVICE_ID_INTEL_NTB_B2B_IVT:
207 case PCI_DEVICE_ID_INTEL_NTB_B2B_HSX:
208 case PCI_DEVICE_ID_INTEL_NTB_B2B_BDX:
209 return 1;
210 }
211 return 0;
212 }
213
214 static inline int pdev_is_gen3(struct pci_dev *pdev)
215 {
216 if (pdev->device == PCI_DEVICE_ID_INTEL_NTB_B2B_SKX)
217 return 1;
218
219 return 0;
220 }
221
222 #endif