This source file includes following definitions.
- sdhci_acpi_priv
- sdhci_acpi_flag
- __intel_dsm
- intel_dsm
- intel_dsm_init
- intel_start_signal_voltage_switch
- sdhci_acpi_int_hw_reset
- sdhci_acpi_byt
- sdhci_acpi_cht
- sdhci_acpi_byt_setting
- sdhci_acpi_byt_defer
- sdhci_acpi_cht_pci_wifi
- sdhci_acpi_no_fixup_child_power
- sdhci_acpi_byt_setting
- sdhci_acpi_byt_defer
- sdhci_acpi_no_fixup_child_power
- bxt_get_cd
- intel_probe_slot
- intel_setup_host
- sdhci_acpi_qcom_handler
- qcom_probe_slot
- qcom_free_slot
- amd_select_drive_strength
- sdhci_acpi_amd_hs400_dll
- amd_set_ios
- sdhci_acpi_emmc_amd_probe_slot
- sdhci_acpi_get_slot
- sdhci_acpi_probe
- sdhci_acpi_remove
- sdhci_acpi_suspend
- sdhci_acpi_resume
- sdhci_acpi_runtime_suspend
- sdhci_acpi_runtime_resume
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7
8 #include <linux/init.h>
9 #include <linux/export.h>
10 #include <linux/module.h>
11 #include <linux/device.h>
12 #include <linux/platform_device.h>
13 #include <linux/ioport.h>
14 #include <linux/io.h>
15 #include <linux/dma-mapping.h>
16 #include <linux/compiler.h>
17 #include <linux/stddef.h>
18 #include <linux/bitops.h>
19 #include <linux/types.h>
20 #include <linux/err.h>
21 #include <linux/interrupt.h>
22 #include <linux/acpi.h>
23 #include <linux/pm.h>
24 #include <linux/pm_runtime.h>
25 #include <linux/delay.h>
26
27 #include <linux/mmc/host.h>
28 #include <linux/mmc/pm.h>
29 #include <linux/mmc/slot-gpio.h>
30
31 #ifdef CONFIG_X86
32 #include <asm/cpu_device_id.h>
33 #include <asm/intel-family.h>
34 #include <asm/iosf_mbi.h>
35 #include <linux/pci.h>
36 #endif
37
38 #include "sdhci.h"
39
40 enum {
41 SDHCI_ACPI_SD_CD = BIT(0),
42 SDHCI_ACPI_RUNTIME_PM = BIT(1),
43 SDHCI_ACPI_SD_CD_OVERRIDE_LEVEL = BIT(2),
44 };
45
46 struct sdhci_acpi_chip {
47 const struct sdhci_ops *ops;
48 unsigned int quirks;
49 unsigned int quirks2;
50 unsigned long caps;
51 unsigned int caps2;
52 mmc_pm_flag_t pm_caps;
53 };
54
55 struct sdhci_acpi_slot {
56 const struct sdhci_acpi_chip *chip;
57 unsigned int quirks;
58 unsigned int quirks2;
59 unsigned long caps;
60 unsigned int caps2;
61 mmc_pm_flag_t pm_caps;
62 unsigned int flags;
63 size_t priv_size;
64 int (*probe_slot)(struct platform_device *, const char *, const char *);
65 int (*remove_slot)(struct platform_device *);
66 int (*free_slot)(struct platform_device *pdev);
67 int (*setup_host)(struct platform_device *pdev);
68 };
69
70 struct sdhci_acpi_host {
71 struct sdhci_host *host;
72 const struct sdhci_acpi_slot *slot;
73 struct platform_device *pdev;
74 bool use_runtime_pm;
75 unsigned long private[0] ____cacheline_aligned;
76 };
77
78 static inline void *sdhci_acpi_priv(struct sdhci_acpi_host *c)
79 {
80 return (void *)c->private;
81 }
82
83 static inline bool sdhci_acpi_flag(struct sdhci_acpi_host *c, unsigned int flag)
84 {
85 return c->slot && (c->slot->flags & flag);
86 }
87
88 #define INTEL_DSM_HS_CAPS_SDR25 BIT(0)
89 #define INTEL_DSM_HS_CAPS_DDR50 BIT(1)
90 #define INTEL_DSM_HS_CAPS_SDR50 BIT(2)
91 #define INTEL_DSM_HS_CAPS_SDR104 BIT(3)
92
93 enum {
94 INTEL_DSM_FNS = 0,
95 INTEL_DSM_V18_SWITCH = 3,
96 INTEL_DSM_V33_SWITCH = 4,
97 INTEL_DSM_HS_CAPS = 8,
98 };
99
100 struct intel_host {
101 u32 dsm_fns;
102 u32 hs_caps;
103 };
104
105 static const guid_t intel_dsm_guid =
106 GUID_INIT(0xF6C13EA5, 0x65CD, 0x461F,
107 0xAB, 0x7A, 0x29, 0xF7, 0xE8, 0xD5, 0xBD, 0x61);
108
109 static int __intel_dsm(struct intel_host *intel_host, struct device *dev,
110 unsigned int fn, u32 *result)
111 {
112 union acpi_object *obj;
113 int err = 0;
114
115 obj = acpi_evaluate_dsm(ACPI_HANDLE(dev), &intel_dsm_guid, 0, fn, NULL);
116 if (!obj)
117 return -EOPNOTSUPP;
118
119 if (obj->type == ACPI_TYPE_INTEGER) {
120 *result = obj->integer.value;
121 } else if (obj->type == ACPI_TYPE_BUFFER && obj->buffer.length > 0) {
122 size_t len = min_t(size_t, obj->buffer.length, 4);
123
124 *result = 0;
125 memcpy(result, obj->buffer.pointer, len);
126 } else {
127 dev_err(dev, "%s DSM fn %u obj->type %d obj->buffer.length %d\n",
128 __func__, fn, obj->type, obj->buffer.length);
129 err = -EINVAL;
130 }
131
132 ACPI_FREE(obj);
133
134 return err;
135 }
136
137 static int intel_dsm(struct intel_host *intel_host, struct device *dev,
138 unsigned int fn, u32 *result)
139 {
140 if (fn > 31 || !(intel_host->dsm_fns & (1 << fn)))
141 return -EOPNOTSUPP;
142
143 return __intel_dsm(intel_host, dev, fn, result);
144 }
145
146 static void intel_dsm_init(struct intel_host *intel_host, struct device *dev,
147 struct mmc_host *mmc)
148 {
149 int err;
150
151 intel_host->hs_caps = ~0;
152
153 err = __intel_dsm(intel_host, dev, INTEL_DSM_FNS, &intel_host->dsm_fns);
154 if (err) {
155 pr_debug("%s: DSM not supported, error %d\n",
156 mmc_hostname(mmc), err);
157 return;
158 }
159
160 pr_debug("%s: DSM function mask %#x\n",
161 mmc_hostname(mmc), intel_host->dsm_fns);
162
163 intel_dsm(intel_host, dev, INTEL_DSM_HS_CAPS, &intel_host->hs_caps);
164 }
165
166 static int intel_start_signal_voltage_switch(struct mmc_host *mmc,
167 struct mmc_ios *ios)
168 {
169 struct device *dev = mmc_dev(mmc);
170 struct sdhci_acpi_host *c = dev_get_drvdata(dev);
171 struct intel_host *intel_host = sdhci_acpi_priv(c);
172 unsigned int fn;
173 u32 result = 0;
174 int err;
175
176 err = sdhci_start_signal_voltage_switch(mmc, ios);
177 if (err)
178 return err;
179
180 switch (ios->signal_voltage) {
181 case MMC_SIGNAL_VOLTAGE_330:
182 fn = INTEL_DSM_V33_SWITCH;
183 break;
184 case MMC_SIGNAL_VOLTAGE_180:
185 fn = INTEL_DSM_V18_SWITCH;
186 break;
187 default:
188 return 0;
189 }
190
191 err = intel_dsm(intel_host, dev, fn, &result);
192 pr_debug("%s: %s DSM fn %u error %d result %u\n",
193 mmc_hostname(mmc), __func__, fn, err, result);
194
195 return 0;
196 }
197
198 static void sdhci_acpi_int_hw_reset(struct sdhci_host *host)
199 {
200 u8 reg;
201
202 reg = sdhci_readb(host, SDHCI_POWER_CONTROL);
203 reg |= 0x10;
204 sdhci_writeb(host, reg, SDHCI_POWER_CONTROL);
205
206 udelay(9);
207 reg &= ~0x10;
208 sdhci_writeb(host, reg, SDHCI_POWER_CONTROL);
209
210 usleep_range(300, 1000);
211 }
212
213 static const struct sdhci_ops sdhci_acpi_ops_dflt = {
214 .set_clock = sdhci_set_clock,
215 .set_bus_width = sdhci_set_bus_width,
216 .reset = sdhci_reset,
217 .set_uhs_signaling = sdhci_set_uhs_signaling,
218 };
219
220 static const struct sdhci_ops sdhci_acpi_ops_int = {
221 .set_clock = sdhci_set_clock,
222 .set_bus_width = sdhci_set_bus_width,
223 .reset = sdhci_reset,
224 .set_uhs_signaling = sdhci_set_uhs_signaling,
225 .hw_reset = sdhci_acpi_int_hw_reset,
226 };
227
228 static const struct sdhci_acpi_chip sdhci_acpi_chip_int = {
229 .ops = &sdhci_acpi_ops_int,
230 };
231
232 #ifdef CONFIG_X86
233
234 static bool sdhci_acpi_byt(void)
235 {
236 static const struct x86_cpu_id byt[] = {
237 { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_SILVERMONT },
238 {}
239 };
240
241 return x86_match_cpu(byt);
242 }
243
244 static bool sdhci_acpi_cht(void)
245 {
246 static const struct x86_cpu_id cht[] = {
247 { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_AIRMONT },
248 {}
249 };
250
251 return x86_match_cpu(cht);
252 }
253
254 #define BYT_IOSF_SCCEP 0x63
255 #define BYT_IOSF_OCP_NETCTRL0 0x1078
256 #define BYT_IOSF_OCP_TIMEOUT_BASE GENMASK(10, 8)
257
258 static void sdhci_acpi_byt_setting(struct device *dev)
259 {
260 u32 val = 0;
261
262 if (!sdhci_acpi_byt())
263 return;
264
265 if (iosf_mbi_read(BYT_IOSF_SCCEP, MBI_CR_READ, BYT_IOSF_OCP_NETCTRL0,
266 &val)) {
267 dev_err(dev, "%s read error\n", __func__);
268 return;
269 }
270
271 if (!(val & BYT_IOSF_OCP_TIMEOUT_BASE))
272 return;
273
274 val &= ~BYT_IOSF_OCP_TIMEOUT_BASE;
275
276 if (iosf_mbi_write(BYT_IOSF_SCCEP, MBI_CR_WRITE, BYT_IOSF_OCP_NETCTRL0,
277 val)) {
278 dev_err(dev, "%s write error\n", __func__);
279 return;
280 }
281
282 dev_dbg(dev, "%s completed\n", __func__);
283 }
284
285 static bool sdhci_acpi_byt_defer(struct device *dev)
286 {
287 if (!sdhci_acpi_byt())
288 return false;
289
290 if (!iosf_mbi_available())
291 return true;
292
293 sdhci_acpi_byt_setting(dev);
294
295 return false;
296 }
297
298 static bool sdhci_acpi_cht_pci_wifi(unsigned int vendor, unsigned int device,
299 unsigned int slot, unsigned int parent_slot)
300 {
301 struct pci_dev *dev, *parent, *from = NULL;
302
303 while (1) {
304 dev = pci_get_device(vendor, device, from);
305 pci_dev_put(from);
306 if (!dev)
307 break;
308 parent = pci_upstream_bridge(dev);
309 if (ACPI_COMPANION(&dev->dev) && PCI_SLOT(dev->devfn) == slot &&
310 parent && PCI_SLOT(parent->devfn) == parent_slot &&
311 !pci_upstream_bridge(parent)) {
312 pci_dev_put(dev);
313 return true;
314 }
315 from = dev;
316 }
317
318 return false;
319 }
320
321
322
323
324
325
326
327
328 static inline bool sdhci_acpi_no_fixup_child_power(const char *hid,
329 const char *uid)
330 {
331 return sdhci_acpi_cht() &&
332 !strcmp(hid, "80860F14") &&
333 !strcmp(uid, "2") &&
334 sdhci_acpi_cht_pci_wifi(0x14e4, 0x43ec, 0, 28);
335 }
336
337 #else
338
339 static inline void sdhci_acpi_byt_setting(struct device *dev)
340 {
341 }
342
343 static inline bool sdhci_acpi_byt_defer(struct device *dev)
344 {
345 return false;
346 }
347
348 static inline bool sdhci_acpi_no_fixup_child_power(const char *hid,
349 const char *uid)
350 {
351 return false;
352 }
353
354 #endif
355
356 static int bxt_get_cd(struct mmc_host *mmc)
357 {
358 int gpio_cd = mmc_gpio_get_cd(mmc);
359 struct sdhci_host *host = mmc_priv(mmc);
360 unsigned long flags;
361 int ret = 0;
362
363 if (!gpio_cd)
364 return 0;
365
366 spin_lock_irqsave(&host->lock, flags);
367
368 if (host->flags & SDHCI_DEVICE_DEAD)
369 goto out;
370
371 ret = !!(sdhci_readl(host, SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT);
372 out:
373 spin_unlock_irqrestore(&host->lock, flags);
374
375 return ret;
376 }
377
378 static int intel_probe_slot(struct platform_device *pdev, const char *hid,
379 const char *uid)
380 {
381 struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
382 struct intel_host *intel_host = sdhci_acpi_priv(c);
383 struct sdhci_host *host = c->host;
384
385 if (hid && uid && !strcmp(hid, "80860F14") && !strcmp(uid, "1") &&
386 sdhci_readl(host, SDHCI_CAPABILITIES) == 0x446cc8b2 &&
387 sdhci_readl(host, SDHCI_CAPABILITIES_1) == 0x00000807)
388 host->timeout_clk = 1000;
389
390 if (hid && !strcmp(hid, "80865ACA"))
391 host->mmc_host_ops.get_cd = bxt_get_cd;
392
393 intel_dsm_init(intel_host, &pdev->dev, host->mmc);
394
395 host->mmc_host_ops.start_signal_voltage_switch =
396 intel_start_signal_voltage_switch;
397
398 return 0;
399 }
400
401 static int intel_setup_host(struct platform_device *pdev)
402 {
403 struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
404 struct intel_host *intel_host = sdhci_acpi_priv(c);
405
406 if (!(intel_host->hs_caps & INTEL_DSM_HS_CAPS_SDR25))
407 c->host->mmc->caps &= ~MMC_CAP_UHS_SDR25;
408
409 if (!(intel_host->hs_caps & INTEL_DSM_HS_CAPS_SDR50))
410 c->host->mmc->caps &= ~MMC_CAP_UHS_SDR50;
411
412 if (!(intel_host->hs_caps & INTEL_DSM_HS_CAPS_DDR50))
413 c->host->mmc->caps &= ~MMC_CAP_UHS_DDR50;
414
415 if (!(intel_host->hs_caps & INTEL_DSM_HS_CAPS_SDR104))
416 c->host->mmc->caps &= ~MMC_CAP_UHS_SDR104;
417
418 return 0;
419 }
420
421 static const struct sdhci_acpi_slot sdhci_acpi_slot_int_emmc = {
422 .chip = &sdhci_acpi_chip_int,
423 .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE |
424 MMC_CAP_HW_RESET | MMC_CAP_1_8V_DDR |
425 MMC_CAP_CMD_DURING_TFR | MMC_CAP_WAIT_WHILE_BUSY,
426 .flags = SDHCI_ACPI_RUNTIME_PM,
427 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC |
428 SDHCI_QUIRK_NO_LED,
429 .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
430 SDHCI_QUIRK2_STOP_WITH_TC |
431 SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400,
432 .probe_slot = intel_probe_slot,
433 .setup_host = intel_setup_host,
434 .priv_size = sizeof(struct intel_host),
435 };
436
437 static const struct sdhci_acpi_slot sdhci_acpi_slot_int_sdio = {
438 .quirks = SDHCI_QUIRK_BROKEN_CARD_DETECTION |
439 SDHCI_QUIRK_NO_LED |
440 SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
441 .quirks2 = SDHCI_QUIRK2_HOST_OFF_CARD_ON,
442 .caps = MMC_CAP_NONREMOVABLE | MMC_CAP_POWER_OFF_CARD |
443 MMC_CAP_WAIT_WHILE_BUSY,
444 .flags = SDHCI_ACPI_RUNTIME_PM,
445 .pm_caps = MMC_PM_KEEP_POWER,
446 .probe_slot = intel_probe_slot,
447 .setup_host = intel_setup_host,
448 .priv_size = sizeof(struct intel_host),
449 };
450
451 static const struct sdhci_acpi_slot sdhci_acpi_slot_int_sd = {
452 .flags = SDHCI_ACPI_SD_CD | SDHCI_ACPI_SD_CD_OVERRIDE_LEVEL |
453 SDHCI_ACPI_RUNTIME_PM,
454 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC |
455 SDHCI_QUIRK_NO_LED,
456 .quirks2 = SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON |
457 SDHCI_QUIRK2_STOP_WITH_TC,
458 .caps = MMC_CAP_WAIT_WHILE_BUSY | MMC_CAP_AGGRESSIVE_PM,
459 .probe_slot = intel_probe_slot,
460 .setup_host = intel_setup_host,
461 .priv_size = sizeof(struct intel_host),
462 };
463
464 #define VENDOR_SPECIFIC_PWRCTL_CLEAR_REG 0x1a8
465 #define VENDOR_SPECIFIC_PWRCTL_CTL_REG 0x1ac
466 static irqreturn_t sdhci_acpi_qcom_handler(int irq, void *ptr)
467 {
468 struct sdhci_host *host = ptr;
469
470 sdhci_writel(host, 0x3, VENDOR_SPECIFIC_PWRCTL_CLEAR_REG);
471 sdhci_writel(host, 0x1, VENDOR_SPECIFIC_PWRCTL_CTL_REG);
472
473 return IRQ_HANDLED;
474 }
475
476 static int qcom_probe_slot(struct platform_device *pdev, const char *hid,
477 const char *uid)
478 {
479 struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
480 struct sdhci_host *host = c->host;
481 int *irq = sdhci_acpi_priv(c);
482
483 *irq = -EINVAL;
484
485 if (strcmp(hid, "QCOM8051"))
486 return 0;
487
488 *irq = platform_get_irq(pdev, 1);
489 if (*irq < 0)
490 return 0;
491
492 return request_threaded_irq(*irq, NULL, sdhci_acpi_qcom_handler,
493 IRQF_ONESHOT | IRQF_TRIGGER_HIGH,
494 "sdhci_qcom", host);
495 }
496
497 static int qcom_free_slot(struct platform_device *pdev)
498 {
499 struct device *dev = &pdev->dev;
500 struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
501 struct sdhci_host *host = c->host;
502 struct acpi_device *adev;
503 int *irq = sdhci_acpi_priv(c);
504 const char *hid;
505
506 adev = ACPI_COMPANION(dev);
507 if (!adev)
508 return -ENODEV;
509
510 hid = acpi_device_hid(adev);
511 if (strcmp(hid, "QCOM8051"))
512 return 0;
513
514 if (*irq < 0)
515 return 0;
516
517 free_irq(*irq, host);
518 return 0;
519 }
520
521 static const struct sdhci_acpi_slot sdhci_acpi_slot_qcom_sd_3v = {
522 .quirks = SDHCI_QUIRK_BROKEN_CARD_DETECTION,
523 .quirks2 = SDHCI_QUIRK2_NO_1_8_V,
524 .caps = MMC_CAP_NONREMOVABLE,
525 .priv_size = sizeof(int),
526 .probe_slot = qcom_probe_slot,
527 .free_slot = qcom_free_slot,
528 };
529
530 static const struct sdhci_acpi_slot sdhci_acpi_slot_qcom_sd = {
531 .quirks = SDHCI_QUIRK_BROKEN_CARD_DETECTION,
532 .caps = MMC_CAP_NONREMOVABLE,
533 };
534
535
536 #define SDHCI_AMD_RESET_DLL_REGISTER 0x908
537
538 static int amd_select_drive_strength(struct mmc_card *card,
539 unsigned int max_dtr, int host_drv,
540 int card_drv, int *drv_type)
541 {
542 return MMC_SET_DRIVER_TYPE_A;
543 }
544
545 static void sdhci_acpi_amd_hs400_dll(struct sdhci_host *host)
546 {
547
548 sdhci_writel(host, 0x40003210, SDHCI_AMD_RESET_DLL_REGISTER);
549 usleep_range(10, 20);
550 sdhci_writel(host, 0x40033210, SDHCI_AMD_RESET_DLL_REGISTER);
551 }
552
553
554
555
556
557
558 static void amd_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
559 {
560 struct sdhci_host *host = mmc_priv(mmc);
561 unsigned int old_timing = host->timing;
562
563 sdhci_set_ios(mmc, ios);
564 if (old_timing == MMC_TIMING_MMC_HS200 &&
565 ios->timing == MMC_TIMING_MMC_HS)
566 sdhci_writew(host, 0x9, SDHCI_HOST_CONTROL2);
567 if (old_timing != MMC_TIMING_MMC_HS400 &&
568 ios->timing == MMC_TIMING_MMC_HS400) {
569 sdhci_writew(host, 0x80, SDHCI_HOST_CONTROL2);
570 sdhci_acpi_amd_hs400_dll(host);
571 }
572 }
573
574 static const struct sdhci_ops sdhci_acpi_ops_amd = {
575 .set_clock = sdhci_set_clock,
576 .set_bus_width = sdhci_set_bus_width,
577 .reset = sdhci_reset,
578 .set_uhs_signaling = sdhci_set_uhs_signaling,
579 };
580
581 static const struct sdhci_acpi_chip sdhci_acpi_chip_amd = {
582 .ops = &sdhci_acpi_ops_amd,
583 };
584
585 static int sdhci_acpi_emmc_amd_probe_slot(struct platform_device *pdev,
586 const char *hid, const char *uid)
587 {
588 struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
589 struct sdhci_host *host = c->host;
590
591 sdhci_read_caps(host);
592 if (host->caps1 & SDHCI_SUPPORT_DDR50)
593 host->mmc->caps = MMC_CAP_1_8V_DDR;
594
595 if ((host->caps1 & SDHCI_SUPPORT_SDR104) &&
596 (host->mmc->caps & MMC_CAP_1_8V_DDR))
597 host->mmc->caps2 = MMC_CAP2_HS400_1_8V;
598
599 host->mmc_host_ops.select_drive_strength = amd_select_drive_strength;
600 host->mmc_host_ops.set_ios = amd_set_ios;
601 return 0;
602 }
603
604 static const struct sdhci_acpi_slot sdhci_acpi_slot_amd_emmc = {
605 .chip = &sdhci_acpi_chip_amd,
606 .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
607 .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR |
608 SDHCI_QUIRK_32BIT_DMA_SIZE |
609 SDHCI_QUIRK_32BIT_ADMA_SIZE,
610 .quirks2 = SDHCI_QUIRK2_BROKEN_64_BIT_DMA,
611 .probe_slot = sdhci_acpi_emmc_amd_probe_slot,
612 };
613
614 struct sdhci_acpi_uid_slot {
615 const char *hid;
616 const char *uid;
617 const struct sdhci_acpi_slot *slot;
618 };
619
620 static const struct sdhci_acpi_uid_slot sdhci_acpi_uids[] = {
621 { "80865ACA", NULL, &sdhci_acpi_slot_int_sd },
622 { "80865ACC", NULL, &sdhci_acpi_slot_int_emmc },
623 { "80865AD0", NULL, &sdhci_acpi_slot_int_sdio },
624 { "80860F14" , "1" , &sdhci_acpi_slot_int_emmc },
625 { "80860F14" , "2" , &sdhci_acpi_slot_int_sdio },
626 { "80860F14" , "3" , &sdhci_acpi_slot_int_sd },
627 { "80860F16" , NULL, &sdhci_acpi_slot_int_sd },
628 { "INT33BB" , "2" , &sdhci_acpi_slot_int_sdio },
629 { "INT33BB" , "3" , &sdhci_acpi_slot_int_sd },
630 { "INT33C6" , NULL, &sdhci_acpi_slot_int_sdio },
631 { "INT3436" , NULL, &sdhci_acpi_slot_int_sdio },
632 { "INT344D" , NULL, &sdhci_acpi_slot_int_sdio },
633 { "PNP0FFF" , "3" , &sdhci_acpi_slot_int_sd },
634 { "PNP0D40" },
635 { "QCOM8051", NULL, &sdhci_acpi_slot_qcom_sd_3v },
636 { "QCOM8052", NULL, &sdhci_acpi_slot_qcom_sd },
637 { "AMDI0040", NULL, &sdhci_acpi_slot_amd_emmc },
638 { },
639 };
640
641 static const struct acpi_device_id sdhci_acpi_ids[] = {
642 { "80865ACA" },
643 { "80865ACC" },
644 { "80865AD0" },
645 { "80860F14" },
646 { "80860F16" },
647 { "INT33BB" },
648 { "INT33C6" },
649 { "INT3436" },
650 { "INT344D" },
651 { "PNP0D40" },
652 { "QCOM8051" },
653 { "QCOM8052" },
654 { "AMDI0040" },
655 { },
656 };
657 MODULE_DEVICE_TABLE(acpi, sdhci_acpi_ids);
658
659 static const struct sdhci_acpi_slot *sdhci_acpi_get_slot(const char *hid,
660 const char *uid)
661 {
662 const struct sdhci_acpi_uid_slot *u;
663
664 for (u = sdhci_acpi_uids; u->hid; u++) {
665 if (strcmp(u->hid, hid))
666 continue;
667 if (!u->uid)
668 return u->slot;
669 if (uid && !strcmp(u->uid, uid))
670 return u->slot;
671 }
672 return NULL;
673 }
674
675 static int sdhci_acpi_probe(struct platform_device *pdev)
676 {
677 struct device *dev = &pdev->dev;
678 const struct sdhci_acpi_slot *slot;
679 struct acpi_device *device, *child;
680 struct sdhci_acpi_host *c;
681 struct sdhci_host *host;
682 struct resource *iomem;
683 resource_size_t len;
684 size_t priv_size;
685 const char *hid;
686 const char *uid;
687 int err;
688
689 device = ACPI_COMPANION(dev);
690 if (!device)
691 return -ENODEV;
692
693 hid = acpi_device_hid(device);
694 uid = acpi_device_uid(device);
695
696 slot = sdhci_acpi_get_slot(hid, uid);
697
698
699 acpi_device_fix_up_power(device);
700 if (!sdhci_acpi_no_fixup_child_power(hid, uid)) {
701 list_for_each_entry(child, &device->children, node)
702 if (child->status.present && child->status.enabled)
703 acpi_device_fix_up_power(child);
704 }
705
706 if (sdhci_acpi_byt_defer(dev))
707 return -EPROBE_DEFER;
708
709 iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
710 if (!iomem)
711 return -ENOMEM;
712
713 len = resource_size(iomem);
714 if (len < 0x100)
715 dev_err(dev, "Invalid iomem size!\n");
716
717 if (!devm_request_mem_region(dev, iomem->start, len, dev_name(dev)))
718 return -ENOMEM;
719
720 priv_size = slot ? slot->priv_size : 0;
721 host = sdhci_alloc_host(dev, sizeof(struct sdhci_acpi_host) + priv_size);
722 if (IS_ERR(host))
723 return PTR_ERR(host);
724
725 c = sdhci_priv(host);
726 c->host = host;
727 c->slot = slot;
728 c->pdev = pdev;
729 c->use_runtime_pm = sdhci_acpi_flag(c, SDHCI_ACPI_RUNTIME_PM);
730
731 platform_set_drvdata(pdev, c);
732
733 host->hw_name = "ACPI";
734 host->ops = &sdhci_acpi_ops_dflt;
735 host->irq = platform_get_irq(pdev, 0);
736 if (host->irq < 0) {
737 err = -EINVAL;
738 goto err_free;
739 }
740
741 host->ioaddr = devm_ioremap_nocache(dev, iomem->start,
742 resource_size(iomem));
743 if (host->ioaddr == NULL) {
744 err = -ENOMEM;
745 goto err_free;
746 }
747
748 if (c->slot) {
749 if (c->slot->probe_slot) {
750 err = c->slot->probe_slot(pdev, hid, uid);
751 if (err)
752 goto err_free;
753 }
754 if (c->slot->chip) {
755 host->ops = c->slot->chip->ops;
756 host->quirks |= c->slot->chip->quirks;
757 host->quirks2 |= c->slot->chip->quirks2;
758 host->mmc->caps |= c->slot->chip->caps;
759 host->mmc->caps2 |= c->slot->chip->caps2;
760 host->mmc->pm_caps |= c->slot->chip->pm_caps;
761 }
762 host->quirks |= c->slot->quirks;
763 host->quirks2 |= c->slot->quirks2;
764 host->mmc->caps |= c->slot->caps;
765 host->mmc->caps2 |= c->slot->caps2;
766 host->mmc->pm_caps |= c->slot->pm_caps;
767 }
768
769 host->mmc->caps2 |= MMC_CAP2_NO_PRESCAN_POWERUP;
770
771 if (sdhci_acpi_flag(c, SDHCI_ACPI_SD_CD)) {
772 bool v = sdhci_acpi_flag(c, SDHCI_ACPI_SD_CD_OVERRIDE_LEVEL);
773
774 err = mmc_gpiod_request_cd(host->mmc, NULL, 0, v, 0, NULL);
775 if (err) {
776 if (err == -EPROBE_DEFER)
777 goto err_free;
778 dev_warn(dev, "failed to setup card detect gpio\n");
779 c->use_runtime_pm = false;
780 }
781 }
782
783 err = sdhci_setup_host(host);
784 if (err)
785 goto err_free;
786
787 if (c->slot && c->slot->setup_host) {
788 err = c->slot->setup_host(pdev);
789 if (err)
790 goto err_cleanup;
791 }
792
793 err = __sdhci_add_host(host);
794 if (err)
795 goto err_cleanup;
796
797 if (c->use_runtime_pm) {
798 pm_runtime_set_active(dev);
799 pm_suspend_ignore_children(dev, 1);
800 pm_runtime_set_autosuspend_delay(dev, 50);
801 pm_runtime_use_autosuspend(dev);
802 pm_runtime_enable(dev);
803 }
804
805 device_enable_async_suspend(dev);
806
807 return 0;
808
809 err_cleanup:
810 sdhci_cleanup_host(c->host);
811 err_free:
812 if (c->slot && c->slot->free_slot)
813 c->slot->free_slot(pdev);
814
815 sdhci_free_host(c->host);
816 return err;
817 }
818
819 static int sdhci_acpi_remove(struct platform_device *pdev)
820 {
821 struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
822 struct device *dev = &pdev->dev;
823 int dead;
824
825 if (c->use_runtime_pm) {
826 pm_runtime_get_sync(dev);
827 pm_runtime_disable(dev);
828 pm_runtime_put_noidle(dev);
829 }
830
831 if (c->slot && c->slot->remove_slot)
832 c->slot->remove_slot(pdev);
833
834 dead = (sdhci_readl(c->host, SDHCI_INT_STATUS) == ~0);
835 sdhci_remove_host(c->host, dead);
836
837 if (c->slot && c->slot->free_slot)
838 c->slot->free_slot(pdev);
839
840 sdhci_free_host(c->host);
841
842 return 0;
843 }
844
845 #ifdef CONFIG_PM_SLEEP
846
847 static int sdhci_acpi_suspend(struct device *dev)
848 {
849 struct sdhci_acpi_host *c = dev_get_drvdata(dev);
850 struct sdhci_host *host = c->host;
851
852 if (host->tuning_mode != SDHCI_TUNING_MODE_3)
853 mmc_retune_needed(host->mmc);
854
855 return sdhci_suspend_host(host);
856 }
857
858 static int sdhci_acpi_resume(struct device *dev)
859 {
860 struct sdhci_acpi_host *c = dev_get_drvdata(dev);
861
862 sdhci_acpi_byt_setting(&c->pdev->dev);
863
864 return sdhci_resume_host(c->host);
865 }
866
867 #endif
868
869 #ifdef CONFIG_PM
870
871 static int sdhci_acpi_runtime_suspend(struct device *dev)
872 {
873 struct sdhci_acpi_host *c = dev_get_drvdata(dev);
874 struct sdhci_host *host = c->host;
875
876 if (host->tuning_mode != SDHCI_TUNING_MODE_3)
877 mmc_retune_needed(host->mmc);
878
879 return sdhci_runtime_suspend_host(host);
880 }
881
882 static int sdhci_acpi_runtime_resume(struct device *dev)
883 {
884 struct sdhci_acpi_host *c = dev_get_drvdata(dev);
885
886 sdhci_acpi_byt_setting(&c->pdev->dev);
887
888 return sdhci_runtime_resume_host(c->host, 0);
889 }
890
891 #endif
892
893 static const struct dev_pm_ops sdhci_acpi_pm_ops = {
894 SET_SYSTEM_SLEEP_PM_OPS(sdhci_acpi_suspend, sdhci_acpi_resume)
895 SET_RUNTIME_PM_OPS(sdhci_acpi_runtime_suspend,
896 sdhci_acpi_runtime_resume, NULL)
897 };
898
899 static struct platform_driver sdhci_acpi_driver = {
900 .driver = {
901 .name = "sdhci-acpi",
902 .acpi_match_table = sdhci_acpi_ids,
903 .pm = &sdhci_acpi_pm_ops,
904 },
905 .probe = sdhci_acpi_probe,
906 .remove = sdhci_acpi_remove,
907 };
908
909 module_platform_driver(sdhci_acpi_driver);
910
911 MODULE_DESCRIPTION("Secure Digital Host Controller Interface ACPI driver");
912 MODULE_AUTHOR("Adrian Hunter");
913 MODULE_LICENSE("GPL v2");