This source file includes following definitions.
- sdmmc_dev
- sd_clear_error
- sd_print_debug_regs
- sd_read_data
- sd_write_data
- sd_send_cmd_get_rsp
- sd_rw_multi
- sd_enable_initial_mode
- sd_disable_initial_mode
- sd_normal_rw
- sd_change_phase
- get_phase_point
- get_phase_len
- sd_search_final_phase
- sd_wait_data_idle
- sd_tuning_rx_cmd
- sd_tuning_phase
- sd_tuning_rx
- sdmmc_get_ro
- sdmmc_get_cd
- sdmmc_request
- sd_set_bus_width
- sd_pull_ctl_disable_lqfp48
- sd_pull_ctl_disable_qfn24
- sd_pull_ctl_enable_lqfp48
- sd_pull_ctl_enable_qfn24
- sd_power_on
- sd_power_off
- sd_set_power_mode
- sd_set_timing
- sdmmc_set_ios
- sdmmc_switch_voltage
- sdmmc_card_busy
- sdmmc_execute_tuning
- rtsx_usb_led_control
- rtsx_usb_update_led
- rtsx_usb_init_host
- rtsx_usb_sdmmc_drv_probe
- rtsx_usb_sdmmc_drv_remove
- rtsx_usb_sdmmc_runtime_suspend
- rtsx_usb_sdmmc_runtime_resume
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10 #include <linux/module.h>
11 #include <linux/slab.h>
12 #include <linux/delay.h>
13 #include <linux/platform_device.h>
14 #include <linux/usb.h>
15 #include <linux/mmc/host.h>
16 #include <linux/mmc/mmc.h>
17 #include <linux/mmc/sd.h>
18 #include <linux/mmc/card.h>
19 #include <linux/scatterlist.h>
20 #include <linux/pm.h>
21 #include <linux/pm_runtime.h>
22
23 #include <linux/rtsx_usb.h>
24 #include <asm/unaligned.h>
25
26 #if defined(CONFIG_LEDS_CLASS) || (defined(CONFIG_LEDS_CLASS_MODULE) && \
27 defined(CONFIG_MMC_REALTEK_USB_MODULE))
28 #include <linux/leds.h>
29 #include <linux/workqueue.h>
30 #define RTSX_USB_USE_LEDS_CLASS
31 #endif
32
33 struct rtsx_usb_sdmmc {
34 struct platform_device *pdev;
35 struct rtsx_ucr *ucr;
36 struct mmc_host *mmc;
37 struct mmc_request *mrq;
38
39 struct mutex host_mutex;
40
41 u8 ssc_depth;
42 unsigned int clock;
43 bool vpclk;
44 bool double_clk;
45 bool host_removal;
46 bool card_exist;
47 bool initial_mode;
48 bool ddr_mode;
49
50 unsigned char power_mode;
51
52 #ifdef RTSX_USB_USE_LEDS_CLASS
53 struct led_classdev led;
54 char led_name[32];
55 struct work_struct led_work;
56 #endif
57 };
58
59 static inline struct device *sdmmc_dev(struct rtsx_usb_sdmmc *host)
60 {
61 return &(host->pdev->dev);
62 }
63
64 static inline void sd_clear_error(struct rtsx_usb_sdmmc *host)
65 {
66 struct rtsx_ucr *ucr = host->ucr;
67 rtsx_usb_ep0_write_register(ucr, CARD_STOP,
68 SD_STOP | SD_CLR_ERR,
69 SD_STOP | SD_CLR_ERR);
70
71 rtsx_usb_clear_dma_err(ucr);
72 rtsx_usb_clear_fsm_err(ucr);
73 }
74
75 #ifdef DEBUG
76 static void sd_print_debug_regs(struct rtsx_usb_sdmmc *host)
77 {
78 struct rtsx_ucr *ucr = host->ucr;
79 u8 val = 0;
80
81 rtsx_usb_ep0_read_register(ucr, SD_STAT1, &val);
82 dev_dbg(sdmmc_dev(host), "SD_STAT1: 0x%x\n", val);
83 rtsx_usb_ep0_read_register(ucr, SD_STAT2, &val);
84 dev_dbg(sdmmc_dev(host), "SD_STAT2: 0x%x\n", val);
85 rtsx_usb_ep0_read_register(ucr, SD_BUS_STAT, &val);
86 dev_dbg(sdmmc_dev(host), "SD_BUS_STAT: 0x%x\n", val);
87 }
88 #else
89 #define sd_print_debug_regs(host)
90 #endif
91
92 static int sd_read_data(struct rtsx_usb_sdmmc *host, struct mmc_command *cmd,
93 u16 byte_cnt, u8 *buf, int buf_len, int timeout)
94 {
95 struct rtsx_ucr *ucr = host->ucr;
96 int err;
97 u8 trans_mode;
98
99 if (!buf)
100 buf_len = 0;
101
102 rtsx_usb_init_cmd(ucr);
103 if (cmd != NULL) {
104 dev_dbg(sdmmc_dev(host), "%s: SD/MMC CMD%d\n", __func__
105 , cmd->opcode);
106 if (cmd->opcode == MMC_SEND_TUNING_BLOCK)
107 trans_mode = SD_TM_AUTO_TUNING;
108 else
109 trans_mode = SD_TM_NORMAL_READ;
110
111 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
112 SD_CMD0, 0xFF, (u8)(cmd->opcode) | 0x40);
113 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
114 SD_CMD1, 0xFF, (u8)(cmd->arg >> 24));
115 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
116 SD_CMD2, 0xFF, (u8)(cmd->arg >> 16));
117 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
118 SD_CMD3, 0xFF, (u8)(cmd->arg >> 8));
119 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
120 SD_CMD4, 0xFF, (u8)cmd->arg);
121 } else {
122 trans_mode = SD_TM_AUTO_READ_3;
123 }
124
125 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_L, 0xFF, (u8)byte_cnt);
126 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_H,
127 0xFF, (u8)(byte_cnt >> 8));
128 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_L, 0xFF, 1);
129 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_H, 0xFF, 0);
130
131 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG2, 0xFF,
132 SD_CALCULATE_CRC7 | SD_CHECK_CRC16 |
133 SD_NO_WAIT_BUSY_END | SD_CHECK_CRC7 | SD_RSP_LEN_6);
134 if (trans_mode != SD_TM_AUTO_TUNING)
135 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
136 CARD_DATA_SOURCE, 0x01, PINGPONG_BUFFER);
137
138 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_TRANSFER,
139 0xFF, trans_mode | SD_TRANSFER_START);
140 rtsx_usb_add_cmd(ucr, CHECK_REG_CMD, SD_TRANSFER,
141 SD_TRANSFER_END, SD_TRANSFER_END);
142
143 if (cmd != NULL) {
144 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD1, 0, 0);
145 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD2, 0, 0);
146 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD3, 0, 0);
147 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD4, 0, 0);
148 }
149
150 err = rtsx_usb_send_cmd(ucr, MODE_CR, timeout);
151 if (err) {
152 dev_dbg(sdmmc_dev(host),
153 "rtsx_usb_send_cmd failed (err = %d)\n", err);
154 return err;
155 }
156
157 err = rtsx_usb_get_rsp(ucr, !cmd ? 1 : 5, timeout);
158 if (err || (ucr->rsp_buf[0] & SD_TRANSFER_ERR)) {
159 sd_print_debug_regs(host);
160
161 if (!err) {
162 dev_dbg(sdmmc_dev(host),
163 "Transfer failed (SD_TRANSFER = %02x)\n",
164 ucr->rsp_buf[0]);
165 err = -EIO;
166 } else {
167 dev_dbg(sdmmc_dev(host),
168 "rtsx_usb_get_rsp failed (err = %d)\n", err);
169 }
170
171 return err;
172 }
173
174 if (cmd != NULL) {
175 cmd->resp[0] = get_unaligned_be32(ucr->rsp_buf + 1);
176 dev_dbg(sdmmc_dev(host), "cmd->resp[0] = 0x%08x\n",
177 cmd->resp[0]);
178 }
179
180 if (buf && buf_len) {
181
182 err = rtsx_usb_read_ppbuf(ucr, buf, byte_cnt - (byte_cnt % 2));
183 if (err) {
184 dev_dbg(sdmmc_dev(host),
185 "rtsx_usb_read_ppbuf failed (err = %d)\n", err);
186 return err;
187 }
188
189
190 if (byte_cnt % 2)
191 return rtsx_usb_read_register(ucr,
192 PPBUF_BASE2 + byte_cnt,
193 buf + byte_cnt - 1);
194 }
195
196 return 0;
197 }
198
199 static int sd_write_data(struct rtsx_usb_sdmmc *host, struct mmc_command *cmd,
200 u16 byte_cnt, u8 *buf, int buf_len, int timeout)
201 {
202 struct rtsx_ucr *ucr = host->ucr;
203 int err;
204 u8 trans_mode;
205
206 if (!buf)
207 buf_len = 0;
208
209 if (buf && buf_len) {
210 err = rtsx_usb_write_ppbuf(ucr, buf, buf_len);
211 if (err) {
212 dev_dbg(sdmmc_dev(host),
213 "rtsx_usb_write_ppbuf failed (err = %d)\n",
214 err);
215 return err;
216 }
217 }
218
219 trans_mode = (cmd != NULL) ? SD_TM_AUTO_WRITE_2 : SD_TM_AUTO_WRITE_3;
220 rtsx_usb_init_cmd(ucr);
221
222 if (cmd != NULL) {
223 dev_dbg(sdmmc_dev(host), "%s: SD/MMC CMD%d\n", __func__,
224 cmd->opcode);
225 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
226 SD_CMD0, 0xFF, (u8)(cmd->opcode) | 0x40);
227 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
228 SD_CMD1, 0xFF, (u8)(cmd->arg >> 24));
229 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
230 SD_CMD2, 0xFF, (u8)(cmd->arg >> 16));
231 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
232 SD_CMD3, 0xFF, (u8)(cmd->arg >> 8));
233 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
234 SD_CMD4, 0xFF, (u8)cmd->arg);
235 }
236
237 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_L, 0xFF, (u8)byte_cnt);
238 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_H,
239 0xFF, (u8)(byte_cnt >> 8));
240 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_L, 0xFF, 1);
241 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_H, 0xFF, 0);
242
243 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG2, 0xFF,
244 SD_CALCULATE_CRC7 | SD_CHECK_CRC16 |
245 SD_NO_WAIT_BUSY_END | SD_CHECK_CRC7 | SD_RSP_LEN_6);
246 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
247 CARD_DATA_SOURCE, 0x01, PINGPONG_BUFFER);
248
249 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_TRANSFER, 0xFF,
250 trans_mode | SD_TRANSFER_START);
251 rtsx_usb_add_cmd(ucr, CHECK_REG_CMD, SD_TRANSFER,
252 SD_TRANSFER_END, SD_TRANSFER_END);
253
254 if (cmd != NULL) {
255 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD1, 0, 0);
256 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD2, 0, 0);
257 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD3, 0, 0);
258 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD4, 0, 0);
259 }
260
261 err = rtsx_usb_send_cmd(ucr, MODE_CR, timeout);
262 if (err) {
263 dev_dbg(sdmmc_dev(host),
264 "rtsx_usb_send_cmd failed (err = %d)\n", err);
265 return err;
266 }
267
268 err = rtsx_usb_get_rsp(ucr, !cmd ? 1 : 5, timeout);
269 if (err) {
270 sd_print_debug_regs(host);
271 dev_dbg(sdmmc_dev(host),
272 "rtsx_usb_get_rsp failed (err = %d)\n", err);
273 return err;
274 }
275
276 if (cmd != NULL) {
277 cmd->resp[0] = get_unaligned_be32(ucr->rsp_buf + 1);
278 dev_dbg(sdmmc_dev(host), "cmd->resp[0] = 0x%08x\n",
279 cmd->resp[0]);
280 }
281
282 return 0;
283 }
284
285 static void sd_send_cmd_get_rsp(struct rtsx_usb_sdmmc *host,
286 struct mmc_command *cmd)
287 {
288 struct rtsx_ucr *ucr = host->ucr;
289 u8 cmd_idx = (u8)cmd->opcode;
290 u32 arg = cmd->arg;
291 int err = 0;
292 int timeout = 100;
293 int i;
294 u8 *ptr;
295 int stat_idx = 0;
296 int len = 2;
297 u8 rsp_type;
298
299 dev_dbg(sdmmc_dev(host), "%s: SD/MMC CMD %d, arg = 0x%08x\n",
300 __func__, cmd_idx, arg);
301
302
303
304
305
306
307
308
309 switch (mmc_resp_type(cmd)) {
310 case MMC_RSP_NONE:
311 rsp_type = SD_RSP_TYPE_R0;
312 break;
313 case MMC_RSP_R1:
314 rsp_type = SD_RSP_TYPE_R1;
315 break;
316 case MMC_RSP_R1_NO_CRC:
317 rsp_type = SD_RSP_TYPE_R1 | SD_NO_CHECK_CRC7;
318 break;
319 case MMC_RSP_R1B:
320 rsp_type = SD_RSP_TYPE_R1b;
321 break;
322 case MMC_RSP_R2:
323 rsp_type = SD_RSP_TYPE_R2;
324 break;
325 case MMC_RSP_R3:
326 rsp_type = SD_RSP_TYPE_R3;
327 break;
328 default:
329 dev_dbg(sdmmc_dev(host), "cmd->flag is not valid\n");
330 err = -EINVAL;
331 goto out;
332 }
333
334 if (rsp_type == SD_RSP_TYPE_R1b)
335 timeout = cmd->busy_timeout ? cmd->busy_timeout : 3000;
336
337 if (cmd->opcode == SD_SWITCH_VOLTAGE) {
338 err = rtsx_usb_write_register(ucr, SD_BUS_STAT,
339 SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP,
340 SD_CLK_TOGGLE_EN);
341 if (err)
342 goto out;
343 }
344
345 rtsx_usb_init_cmd(ucr);
346
347 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD0, 0xFF, 0x40 | cmd_idx);
348 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD1, 0xFF, (u8)(arg >> 24));
349 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD2, 0xFF, (u8)(arg >> 16));
350 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD3, 0xFF, (u8)(arg >> 8));
351 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD4, 0xFF, (u8)arg);
352
353 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG2, 0xFF, rsp_type);
354 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_DATA_SOURCE,
355 0x01, PINGPONG_BUFFER);
356 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_TRANSFER,
357 0xFF, SD_TM_CMD_RSP | SD_TRANSFER_START);
358 rtsx_usb_add_cmd(ucr, CHECK_REG_CMD, SD_TRANSFER,
359 SD_TRANSFER_END | SD_STAT_IDLE,
360 SD_TRANSFER_END | SD_STAT_IDLE);
361
362 if (rsp_type == SD_RSP_TYPE_R2) {
363
364 for (i = PPBUF_BASE2; i < PPBUF_BASE2 + 16; i++)
365 rtsx_usb_add_cmd(ucr, READ_REG_CMD, (u16)i, 0, 0);
366 stat_idx = 16;
367 } else if (rsp_type != SD_RSP_TYPE_R0) {
368
369 for (i = SD_CMD0; i <= SD_CMD4; i++)
370 rtsx_usb_add_cmd(ucr, READ_REG_CMD, (u16)i, 0, 0);
371 stat_idx = 5;
372 }
373 len += stat_idx;
374
375 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_STAT1, 0, 0);
376
377 err = rtsx_usb_send_cmd(ucr, MODE_CR, 100);
378 if (err) {
379 dev_dbg(sdmmc_dev(host),
380 "rtsx_usb_send_cmd error (err = %d)\n", err);
381 goto out;
382 }
383
384 err = rtsx_usb_get_rsp(ucr, len, timeout);
385 if (err || (ucr->rsp_buf[0] & SD_TRANSFER_ERR)) {
386 sd_print_debug_regs(host);
387 sd_clear_error(host);
388
389 if (!err) {
390 dev_dbg(sdmmc_dev(host),
391 "Transfer failed (SD_TRANSFER = %02x)\n",
392 ucr->rsp_buf[0]);
393 err = -EIO;
394 } else {
395 dev_dbg(sdmmc_dev(host),
396 "rtsx_usb_get_rsp failed (err = %d)\n", err);
397 }
398
399 goto out;
400 }
401
402 if (rsp_type == SD_RSP_TYPE_R0) {
403 err = 0;
404 goto out;
405 }
406
407
408 ptr = ucr->rsp_buf + 1;
409
410
411 if ((ptr[0] & 0xC0) != 0) {
412 err = -EILSEQ;
413 dev_dbg(sdmmc_dev(host), "Invalid response bit\n");
414 goto out;
415 }
416
417
418 if (!(rsp_type & SD_NO_CHECK_CRC7)) {
419 if (ptr[stat_idx] & SD_CRC7_ERR) {
420 err = -EILSEQ;
421 dev_dbg(sdmmc_dev(host), "CRC7 error\n");
422 goto out;
423 }
424 }
425
426 if (rsp_type == SD_RSP_TYPE_R2) {
427
428
429
430
431
432 ptr[16] = 1;
433
434 for (i = 0; i < 4; i++) {
435 cmd->resp[i] = get_unaligned_be32(ptr + 1 + i * 4);
436 dev_dbg(sdmmc_dev(host), "cmd->resp[%d] = 0x%08x\n",
437 i, cmd->resp[i]);
438 }
439 } else {
440 cmd->resp[0] = get_unaligned_be32(ptr + 1);
441 dev_dbg(sdmmc_dev(host), "cmd->resp[0] = 0x%08x\n",
442 cmd->resp[0]);
443 }
444
445 out:
446 cmd->error = err;
447 }
448
449 static int sd_rw_multi(struct rtsx_usb_sdmmc *host, struct mmc_request *mrq)
450 {
451 struct rtsx_ucr *ucr = host->ucr;
452 struct mmc_data *data = mrq->data;
453 int read = (data->flags & MMC_DATA_READ) ? 1 : 0;
454 u8 cfg2, trans_mode;
455 int err;
456 u8 flag;
457 size_t data_len = data->blksz * data->blocks;
458 unsigned int pipe;
459
460 if (read) {
461 dev_dbg(sdmmc_dev(host), "%s: read %zu bytes\n",
462 __func__, data_len);
463 cfg2 = SD_CALCULATE_CRC7 | SD_CHECK_CRC16 |
464 SD_NO_WAIT_BUSY_END | SD_CHECK_CRC7 | SD_RSP_LEN_0;
465 trans_mode = SD_TM_AUTO_READ_3;
466 } else {
467 dev_dbg(sdmmc_dev(host), "%s: write %zu bytes\n",
468 __func__, data_len);
469 cfg2 = SD_NO_CALCULATE_CRC7 | SD_CHECK_CRC16 |
470 SD_NO_WAIT_BUSY_END | SD_NO_CHECK_CRC7 | SD_RSP_LEN_0;
471 trans_mode = SD_TM_AUTO_WRITE_3;
472 }
473
474 rtsx_usb_init_cmd(ucr);
475
476 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_L, 0xFF, 0x00);
477 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_H, 0xFF, 0x02);
478 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_L,
479 0xFF, (u8)data->blocks);
480 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_H,
481 0xFF, (u8)(data->blocks >> 8));
482
483 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_DATA_SOURCE,
484 0x01, RING_BUFFER);
485
486 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_TC3,
487 0xFF, (u8)(data_len >> 24));
488 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_TC2,
489 0xFF, (u8)(data_len >> 16));
490 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_TC1,
491 0xFF, (u8)(data_len >> 8));
492 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_TC0,
493 0xFF, (u8)data_len);
494 if (read) {
495 flag = MODE_CDIR;
496 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_CTL,
497 0x03 | DMA_PACK_SIZE_MASK,
498 DMA_DIR_FROM_CARD | DMA_EN | DMA_512);
499 } else {
500 flag = MODE_CDOR;
501 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_CTL,
502 0x03 | DMA_PACK_SIZE_MASK,
503 DMA_DIR_TO_CARD | DMA_EN | DMA_512);
504 }
505
506 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG2, 0xFF, cfg2);
507 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_TRANSFER, 0xFF,
508 trans_mode | SD_TRANSFER_START);
509 rtsx_usb_add_cmd(ucr, CHECK_REG_CMD, SD_TRANSFER,
510 SD_TRANSFER_END, SD_TRANSFER_END);
511
512 err = rtsx_usb_send_cmd(ucr, flag, 100);
513 if (err)
514 return err;
515
516 if (read)
517 pipe = usb_rcvbulkpipe(ucr->pusb_dev, EP_BULK_IN);
518 else
519 pipe = usb_sndbulkpipe(ucr->pusb_dev, EP_BULK_OUT);
520
521 err = rtsx_usb_transfer_data(ucr, pipe, data->sg, data_len,
522 data->sg_len, NULL, 10000);
523 if (err) {
524 dev_dbg(sdmmc_dev(host), "rtsx_usb_transfer_data error %d\n"
525 , err);
526 sd_clear_error(host);
527 return err;
528 }
529
530 return rtsx_usb_get_rsp(ucr, 1, 2000);
531 }
532
533 static inline void sd_enable_initial_mode(struct rtsx_usb_sdmmc *host)
534 {
535 rtsx_usb_write_register(host->ucr, SD_CFG1,
536 SD_CLK_DIVIDE_MASK, SD_CLK_DIVIDE_128);
537 }
538
539 static inline void sd_disable_initial_mode(struct rtsx_usb_sdmmc *host)
540 {
541 rtsx_usb_write_register(host->ucr, SD_CFG1,
542 SD_CLK_DIVIDE_MASK, SD_CLK_DIVIDE_0);
543 }
544
545 static void sd_normal_rw(struct rtsx_usb_sdmmc *host,
546 struct mmc_request *mrq)
547 {
548 struct mmc_command *cmd = mrq->cmd;
549 struct mmc_data *data = mrq->data;
550 u8 *buf;
551
552 buf = kzalloc(data->blksz, GFP_NOIO);
553 if (!buf) {
554 cmd->error = -ENOMEM;
555 return;
556 }
557
558 if (data->flags & MMC_DATA_READ) {
559 if (host->initial_mode)
560 sd_disable_initial_mode(host);
561
562 cmd->error = sd_read_data(host, cmd, (u16)data->blksz, buf,
563 data->blksz, 200);
564
565 if (host->initial_mode)
566 sd_enable_initial_mode(host);
567
568 sg_copy_from_buffer(data->sg, data->sg_len, buf, data->blksz);
569 } else {
570 sg_copy_to_buffer(data->sg, data->sg_len, buf, data->blksz);
571
572 cmd->error = sd_write_data(host, cmd, (u16)data->blksz, buf,
573 data->blksz, 200);
574 }
575
576 kfree(buf);
577 }
578
579 static int sd_change_phase(struct rtsx_usb_sdmmc *host, u8 sample_point, int tx)
580 {
581 struct rtsx_ucr *ucr = host->ucr;
582 int err;
583
584 dev_dbg(sdmmc_dev(host), "%s: %s sample_point = %d\n",
585 __func__, tx ? "TX" : "RX", sample_point);
586
587 rtsx_usb_init_cmd(ucr);
588
589 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CLK_DIV, CLK_CHANGE, CLK_CHANGE);
590
591 if (tx)
592 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK0_CTL,
593 0x0F, sample_point);
594 else
595 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK1_CTL,
596 0x0F, sample_point);
597
598 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK0_CTL, PHASE_NOT_RESET, 0);
599 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK0_CTL,
600 PHASE_NOT_RESET, PHASE_NOT_RESET);
601 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CLK_DIV, CLK_CHANGE, 0);
602 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG1, SD_ASYNC_FIFO_RST, 0);
603
604 err = rtsx_usb_send_cmd(ucr, MODE_C, 100);
605 if (err)
606 return err;
607
608 return 0;
609 }
610
611 static inline u32 get_phase_point(u32 phase_map, unsigned int idx)
612 {
613 idx &= MAX_PHASE;
614 return phase_map & (1 << idx);
615 }
616
617 static int get_phase_len(u32 phase_map, unsigned int idx)
618 {
619 int i;
620
621 for (i = 0; i < MAX_PHASE + 1; i++) {
622 if (get_phase_point(phase_map, idx + i) == 0)
623 return i;
624 }
625 return MAX_PHASE + 1;
626 }
627
628 static u8 sd_search_final_phase(struct rtsx_usb_sdmmc *host, u32 phase_map)
629 {
630 int start = 0, len = 0;
631 int start_final = 0, len_final = 0;
632 u8 final_phase = 0xFF;
633
634 if (phase_map == 0) {
635 dev_dbg(sdmmc_dev(host), "Phase: [map:%x]\n", phase_map);
636 return final_phase;
637 }
638
639 while (start < MAX_PHASE + 1) {
640 len = get_phase_len(phase_map, start);
641 if (len_final < len) {
642 start_final = start;
643 len_final = len;
644 }
645 start += len ? len : 1;
646 }
647
648 final_phase = (start_final + len_final / 2) & MAX_PHASE;
649 dev_dbg(sdmmc_dev(host), "Phase: [map:%x] [maxlen:%d] [final:%d]\n",
650 phase_map, len_final, final_phase);
651
652 return final_phase;
653 }
654
655 static void sd_wait_data_idle(struct rtsx_usb_sdmmc *host)
656 {
657 int err, i;
658 u8 val = 0;
659
660 for (i = 0; i < 100; i++) {
661 err = rtsx_usb_ep0_read_register(host->ucr,
662 SD_DATA_STATE, &val);
663 if (val & SD_DATA_IDLE)
664 return;
665
666 usleep_range(100, 1000);
667 }
668 }
669
670 static int sd_tuning_rx_cmd(struct rtsx_usb_sdmmc *host,
671 u8 opcode, u8 sample_point)
672 {
673 int err;
674 struct mmc_command cmd = {};
675
676 err = sd_change_phase(host, sample_point, 0);
677 if (err)
678 return err;
679
680 cmd.opcode = MMC_SEND_TUNING_BLOCK;
681 err = sd_read_data(host, &cmd, 0x40, NULL, 0, 100);
682 if (err) {
683
684 sd_wait_data_idle(host);
685 sd_clear_error(host);
686 return err;
687 }
688
689 return 0;
690 }
691
692 static void sd_tuning_phase(struct rtsx_usb_sdmmc *host,
693 u8 opcode, u16 *phase_map)
694 {
695 int err, i;
696 u16 raw_phase_map = 0;
697
698 for (i = MAX_PHASE; i >= 0; i--) {
699 err = sd_tuning_rx_cmd(host, opcode, (u8)i);
700 if (!err)
701 raw_phase_map |= 1 << i;
702 }
703
704 if (phase_map)
705 *phase_map = raw_phase_map;
706 }
707
708 static int sd_tuning_rx(struct rtsx_usb_sdmmc *host, u8 opcode)
709 {
710 int err, i;
711 u16 raw_phase_map[RX_TUNING_CNT] = {0}, phase_map;
712 u8 final_phase;
713
714
715 err = sd_change_phase(host, 0x01, 1);
716 if (err) {
717 dev_dbg(sdmmc_dev(host), "TX phase setting failed\n");
718 return err;
719 }
720
721
722 for (i = 0; i < RX_TUNING_CNT; i++) {
723 sd_tuning_phase(host, opcode, &(raw_phase_map[i]));
724
725 if (raw_phase_map[i] == 0)
726 break;
727 }
728
729 phase_map = 0xFFFF;
730 for (i = 0; i < RX_TUNING_CNT; i++) {
731 dev_dbg(sdmmc_dev(host), "RX raw_phase_map[%d] = 0x%04x\n",
732 i, raw_phase_map[i]);
733 phase_map &= raw_phase_map[i];
734 }
735 dev_dbg(sdmmc_dev(host), "RX phase_map = 0x%04x\n", phase_map);
736
737 if (phase_map) {
738 final_phase = sd_search_final_phase(host, phase_map);
739 if (final_phase == 0xFF)
740 return -EINVAL;
741
742 err = sd_change_phase(host, final_phase, 0);
743 if (err)
744 return err;
745 } else {
746 return -EINVAL;
747 }
748
749 return 0;
750 }
751
752 static int sdmmc_get_ro(struct mmc_host *mmc)
753 {
754 struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
755 struct rtsx_ucr *ucr = host->ucr;
756 int err;
757 u16 val;
758
759 if (host->host_removal)
760 return -ENOMEDIUM;
761
762 mutex_lock(&ucr->dev_mutex);
763
764
765 err = rtsx_usb_get_card_status(ucr, &val);
766
767 mutex_unlock(&ucr->dev_mutex);
768
769
770
771 if (err)
772 return 0;
773
774 if (val & SD_WP)
775 return 1;
776
777 return 0;
778 }
779
780 static int sdmmc_get_cd(struct mmc_host *mmc)
781 {
782 struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
783 struct rtsx_ucr *ucr = host->ucr;
784 int err;
785 u16 val;
786
787 if (host->host_removal)
788 return -ENOMEDIUM;
789
790 mutex_lock(&ucr->dev_mutex);
791
792
793 err = rtsx_usb_get_card_status(ucr, &val);
794
795 mutex_unlock(&ucr->dev_mutex);
796
797
798 if (err)
799 goto no_card;
800
801 if (val & SD_CD) {
802 host->card_exist = true;
803 return 1;
804 }
805
806 no_card:
807 host->card_exist = false;
808 return 0;
809 }
810
811 static void sdmmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
812 {
813 struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
814 struct rtsx_ucr *ucr = host->ucr;
815 struct mmc_command *cmd = mrq->cmd;
816 struct mmc_data *data = mrq->data;
817 unsigned int data_size = 0;
818
819 dev_dbg(sdmmc_dev(host), "%s\n", __func__);
820
821 if (host->host_removal) {
822 cmd->error = -ENOMEDIUM;
823 goto finish;
824 }
825
826 if ((!host->card_exist)) {
827 cmd->error = -ENOMEDIUM;
828 goto finish_detect_card;
829 }
830
831 mutex_lock(&ucr->dev_mutex);
832
833 mutex_lock(&host->host_mutex);
834 host->mrq = mrq;
835 mutex_unlock(&host->host_mutex);
836
837 if (mrq->data)
838 data_size = data->blocks * data->blksz;
839
840 if (!data_size) {
841 sd_send_cmd_get_rsp(host, cmd);
842 } else if ((!(data_size % 512) && cmd->opcode != MMC_SEND_EXT_CSD) ||
843 mmc_op_multi(cmd->opcode)) {
844 sd_send_cmd_get_rsp(host, cmd);
845
846 if (!cmd->error) {
847 sd_rw_multi(host, mrq);
848
849 if (mmc_op_multi(cmd->opcode) && mrq->stop) {
850 sd_send_cmd_get_rsp(host, mrq->stop);
851 rtsx_usb_write_register(ucr, MC_FIFO_CTL,
852 FIFO_FLUSH, FIFO_FLUSH);
853 }
854 }
855 } else {
856 sd_normal_rw(host, mrq);
857 }
858
859 if (mrq->data) {
860 if (cmd->error || data->error)
861 data->bytes_xfered = 0;
862 else
863 data->bytes_xfered = data->blocks * data->blksz;
864 }
865
866 mutex_unlock(&ucr->dev_mutex);
867
868 finish_detect_card:
869 if (cmd->error) {
870
871
872
873
874 sdmmc_get_cd(mmc);
875 dev_dbg(sdmmc_dev(host), "cmd->error = %d\n", cmd->error);
876 }
877
878 finish:
879 mutex_lock(&host->host_mutex);
880 host->mrq = NULL;
881 mutex_unlock(&host->host_mutex);
882
883 mmc_request_done(mmc, mrq);
884 }
885
886 static int sd_set_bus_width(struct rtsx_usb_sdmmc *host,
887 unsigned char bus_width)
888 {
889 int err = 0;
890 static const u8 width[] = {
891 [MMC_BUS_WIDTH_1] = SD_BUS_WIDTH_1BIT,
892 [MMC_BUS_WIDTH_4] = SD_BUS_WIDTH_4BIT,
893 [MMC_BUS_WIDTH_8] = SD_BUS_WIDTH_8BIT,
894 };
895
896 if (bus_width <= MMC_BUS_WIDTH_8)
897 err = rtsx_usb_write_register(host->ucr, SD_CFG1,
898 0x03, width[bus_width]);
899
900 return err;
901 }
902
903 static int sd_pull_ctl_disable_lqfp48(struct rtsx_ucr *ucr)
904 {
905 rtsx_usb_init_cmd(ucr);
906
907 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0x55);
908 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0x55);
909 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0x95);
910 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x55);
911 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x55);
912 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0xA5);
913
914 return rtsx_usb_send_cmd(ucr, MODE_C, 100);
915 }
916
917 static int sd_pull_ctl_disable_qfn24(struct rtsx_ucr *ucr)
918 {
919 rtsx_usb_init_cmd(ucr);
920
921 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0x65);
922 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0x55);
923 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0x95);
924 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x55);
925 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x56);
926 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0x59);
927
928 return rtsx_usb_send_cmd(ucr, MODE_C, 100);
929 }
930
931 static int sd_pull_ctl_enable_lqfp48(struct rtsx_ucr *ucr)
932 {
933 rtsx_usb_init_cmd(ucr);
934
935 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0xAA);
936 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0xAA);
937 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0xA9);
938 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x55);
939 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x55);
940 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0xA5);
941
942 return rtsx_usb_send_cmd(ucr, MODE_C, 100);
943 }
944
945 static int sd_pull_ctl_enable_qfn24(struct rtsx_ucr *ucr)
946 {
947 rtsx_usb_init_cmd(ucr);
948
949 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0xA5);
950 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0x9A);
951 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0xA5);
952 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x9A);
953 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x65);
954 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0x5A);
955
956 return rtsx_usb_send_cmd(ucr, MODE_C, 100);
957 }
958
959 static int sd_power_on(struct rtsx_usb_sdmmc *host)
960 {
961 struct rtsx_ucr *ucr = host->ucr;
962 int err;
963
964 dev_dbg(sdmmc_dev(host), "%s\n", __func__);
965 rtsx_usb_init_cmd(ucr);
966 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_SELECT, 0x07, SD_MOD_SEL);
967 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_SHARE_MODE,
968 CARD_SHARE_MASK, CARD_SHARE_SD);
969 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_EN,
970 SD_CLK_EN, SD_CLK_EN);
971 err = rtsx_usb_send_cmd(ucr, MODE_C, 100);
972 if (err)
973 return err;
974
975 if (CHECK_PKG(ucr, LQFP48))
976 err = sd_pull_ctl_enable_lqfp48(ucr);
977 else
978 err = sd_pull_ctl_enable_qfn24(ucr);
979 if (err)
980 return err;
981
982 err = rtsx_usb_write_register(ucr, CARD_PWR_CTL,
983 POWER_MASK, PARTIAL_POWER_ON);
984 if (err)
985 return err;
986
987 usleep_range(800, 1000);
988
989 rtsx_usb_init_cmd(ucr);
990 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PWR_CTL,
991 POWER_MASK|LDO3318_PWR_MASK, POWER_ON|LDO_ON);
992 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_OE,
993 SD_OUTPUT_EN, SD_OUTPUT_EN);
994
995 return rtsx_usb_send_cmd(ucr, MODE_C, 100);
996 }
997
998 static int sd_power_off(struct rtsx_usb_sdmmc *host)
999 {
1000 struct rtsx_ucr *ucr = host->ucr;
1001 int err;
1002
1003 dev_dbg(sdmmc_dev(host), "%s\n", __func__);
1004 rtsx_usb_init_cmd(ucr);
1005
1006 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_EN, SD_CLK_EN, 0);
1007 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_OE, SD_OUTPUT_EN, 0);
1008 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PWR_CTL,
1009 POWER_MASK, POWER_OFF);
1010 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PWR_CTL,
1011 POWER_MASK|LDO3318_PWR_MASK, POWER_OFF|LDO_SUSPEND);
1012
1013 err = rtsx_usb_send_cmd(ucr, MODE_C, 100);
1014 if (err)
1015 return err;
1016
1017 if (CHECK_PKG(ucr, LQFP48))
1018 return sd_pull_ctl_disable_lqfp48(ucr);
1019 return sd_pull_ctl_disable_qfn24(ucr);
1020 }
1021
1022 static int sd_set_power_mode(struct rtsx_usb_sdmmc *host,
1023 unsigned char power_mode)
1024 {
1025 int err;
1026
1027 if (power_mode != MMC_POWER_OFF)
1028 power_mode = MMC_POWER_ON;
1029
1030 if (power_mode == host->power_mode)
1031 return 0;
1032
1033 if (power_mode == MMC_POWER_OFF) {
1034 err = sd_power_off(host);
1035 pm_runtime_put_noidle(sdmmc_dev(host));
1036 } else {
1037 pm_runtime_get_noresume(sdmmc_dev(host));
1038 err = sd_power_on(host);
1039 }
1040
1041 if (!err)
1042 host->power_mode = power_mode;
1043
1044 return err;
1045 }
1046
1047 static int sd_set_timing(struct rtsx_usb_sdmmc *host,
1048 unsigned char timing, bool *ddr_mode)
1049 {
1050 struct rtsx_ucr *ucr = host->ucr;
1051 int err;
1052
1053 *ddr_mode = false;
1054
1055 rtsx_usb_init_cmd(ucr);
1056
1057 switch (timing) {
1058 case MMC_TIMING_UHS_SDR104:
1059 case MMC_TIMING_UHS_SDR50:
1060 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG1,
1061 0x0C | SD_ASYNC_FIFO_RST,
1062 SD_30_MODE | SD_ASYNC_FIFO_RST);
1063 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF,
1064 CRC_VAR_CLK0 | SD30_FIX_CLK | SAMPLE_VAR_CLK1);
1065 break;
1066
1067 case MMC_TIMING_UHS_DDR50:
1068 *ddr_mode = true;
1069
1070 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG1,
1071 0x0C | SD_ASYNC_FIFO_RST,
1072 SD_DDR_MODE | SD_ASYNC_FIFO_RST);
1073 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF,
1074 CRC_VAR_CLK0 | SD30_FIX_CLK | SAMPLE_VAR_CLK1);
1075 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_PUSH_POINT_CTL,
1076 DDR_VAR_TX_CMD_DAT, DDR_VAR_TX_CMD_DAT);
1077 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_SAMPLE_POINT_CTL,
1078 DDR_VAR_RX_DAT | DDR_VAR_RX_CMD,
1079 DDR_VAR_RX_DAT | DDR_VAR_RX_CMD);
1080 break;
1081
1082 case MMC_TIMING_MMC_HS:
1083 case MMC_TIMING_SD_HS:
1084 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG1,
1085 0x0C, SD_20_MODE);
1086 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF,
1087 CRC_FIX_CLK | SD30_VAR_CLK0 | SAMPLE_VAR_CLK1);
1088 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_PUSH_POINT_CTL,
1089 SD20_TX_SEL_MASK, SD20_TX_14_AHEAD);
1090 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_SAMPLE_POINT_CTL,
1091 SD20_RX_SEL_MASK, SD20_RX_14_DELAY);
1092 break;
1093
1094 default:
1095 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
1096 SD_CFG1, 0x0C, SD_20_MODE);
1097 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF,
1098 CRC_FIX_CLK | SD30_VAR_CLK0 | SAMPLE_VAR_CLK1);
1099 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
1100 SD_PUSH_POINT_CTL, 0xFF, 0);
1101 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_SAMPLE_POINT_CTL,
1102 SD20_RX_SEL_MASK, SD20_RX_POS_EDGE);
1103 break;
1104 }
1105
1106 err = rtsx_usb_send_cmd(ucr, MODE_C, 100);
1107
1108 return err;
1109 }
1110
1111 static void sdmmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
1112 {
1113 struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
1114 struct rtsx_ucr *ucr = host->ucr;
1115
1116 dev_dbg(sdmmc_dev(host), "%s\n", __func__);
1117 mutex_lock(&ucr->dev_mutex);
1118
1119 sd_set_power_mode(host, ios->power_mode);
1120 sd_set_bus_width(host, ios->bus_width);
1121 sd_set_timing(host, ios->timing, &host->ddr_mode);
1122
1123 host->vpclk = false;
1124 host->double_clk = true;
1125
1126 switch (ios->timing) {
1127 case MMC_TIMING_UHS_SDR104:
1128 case MMC_TIMING_UHS_SDR50:
1129 host->ssc_depth = SSC_DEPTH_2M;
1130 host->vpclk = true;
1131 host->double_clk = false;
1132 break;
1133 case MMC_TIMING_UHS_DDR50:
1134 case MMC_TIMING_UHS_SDR25:
1135 host->ssc_depth = SSC_DEPTH_1M;
1136 break;
1137 default:
1138 host->ssc_depth = SSC_DEPTH_512K;
1139 break;
1140 }
1141
1142 host->initial_mode = (ios->clock <= 1000000) ? true : false;
1143 host->clock = ios->clock;
1144
1145 rtsx_usb_switch_clock(host->ucr, host->clock, host->ssc_depth,
1146 host->initial_mode, host->double_clk, host->vpclk);
1147
1148 mutex_unlock(&ucr->dev_mutex);
1149 dev_dbg(sdmmc_dev(host), "%s end\n", __func__);
1150 }
1151
1152 static int sdmmc_switch_voltage(struct mmc_host *mmc, struct mmc_ios *ios)
1153 {
1154 struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
1155 struct rtsx_ucr *ucr = host->ucr;
1156 int err = 0;
1157
1158 dev_dbg(sdmmc_dev(host), "%s: signal_voltage = %d\n",
1159 __func__, ios->signal_voltage);
1160
1161 if (host->host_removal)
1162 return -ENOMEDIUM;
1163
1164 if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_120)
1165 return -EPERM;
1166
1167 mutex_lock(&ucr->dev_mutex);
1168
1169 err = rtsx_usb_card_exclusive_check(ucr, RTSX_USB_SD_CARD);
1170 if (err) {
1171 mutex_unlock(&ucr->dev_mutex);
1172 return err;
1173 }
1174
1175
1176
1177
1178 rtsx_usb_init_cmd(ucr);
1179
1180 if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_330) {
1181 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_PAD_CTL,
1182 SD_IO_USING_1V8, SD_IO_USING_3V3);
1183 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, LDO_POWER_CFG,
1184 TUNE_SD18_MASK, TUNE_SD18_3V3);
1185 } else {
1186 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BUS_STAT,
1187 SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP,
1188 SD_CLK_FORCE_STOP);
1189 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_PAD_CTL,
1190 SD_IO_USING_1V8, SD_IO_USING_1V8);
1191 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, LDO_POWER_CFG,
1192 TUNE_SD18_MASK, TUNE_SD18_1V8);
1193 }
1194
1195 err = rtsx_usb_send_cmd(ucr, MODE_C, 100);
1196 mutex_unlock(&ucr->dev_mutex);
1197
1198 return err;
1199 }
1200
1201 static int sdmmc_card_busy(struct mmc_host *mmc)
1202 {
1203 struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
1204 struct rtsx_ucr *ucr = host->ucr;
1205 int err;
1206 u8 stat;
1207 u8 mask = SD_DAT3_STATUS | SD_DAT2_STATUS | SD_DAT1_STATUS
1208 | SD_DAT0_STATUS;
1209
1210 dev_dbg(sdmmc_dev(host), "%s\n", __func__);
1211
1212 mutex_lock(&ucr->dev_mutex);
1213
1214 err = rtsx_usb_write_register(ucr, SD_BUS_STAT,
1215 SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP,
1216 SD_CLK_TOGGLE_EN);
1217 if (err)
1218 goto out;
1219
1220 mdelay(1);
1221
1222 err = rtsx_usb_read_register(ucr, SD_BUS_STAT, &stat);
1223 if (err)
1224 goto out;
1225
1226 err = rtsx_usb_write_register(ucr, SD_BUS_STAT,
1227 SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP, 0);
1228 out:
1229 mutex_unlock(&ucr->dev_mutex);
1230
1231 if (err)
1232 return err;
1233
1234
1235 if ((stat & mask) != mask)
1236 return 1;
1237 else
1238 return 0;
1239 }
1240
1241 static int sdmmc_execute_tuning(struct mmc_host *mmc, u32 opcode)
1242 {
1243 struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
1244 struct rtsx_ucr *ucr = host->ucr;
1245 int err = 0;
1246
1247 if (host->host_removal)
1248 return -ENOMEDIUM;
1249
1250 mutex_lock(&ucr->dev_mutex);
1251
1252 if (!host->ddr_mode)
1253 err = sd_tuning_rx(host, MMC_SEND_TUNING_BLOCK);
1254
1255 mutex_unlock(&ucr->dev_mutex);
1256
1257 return err;
1258 }
1259
1260 static const struct mmc_host_ops rtsx_usb_sdmmc_ops = {
1261 .request = sdmmc_request,
1262 .set_ios = sdmmc_set_ios,
1263 .get_ro = sdmmc_get_ro,
1264 .get_cd = sdmmc_get_cd,
1265 .start_signal_voltage_switch = sdmmc_switch_voltage,
1266 .card_busy = sdmmc_card_busy,
1267 .execute_tuning = sdmmc_execute_tuning,
1268 };
1269
1270 #ifdef RTSX_USB_USE_LEDS_CLASS
1271 static void rtsx_usb_led_control(struct led_classdev *led,
1272 enum led_brightness brightness)
1273 {
1274 struct rtsx_usb_sdmmc *host = container_of(led,
1275 struct rtsx_usb_sdmmc, led);
1276
1277 if (host->host_removal)
1278 return;
1279
1280 host->led.brightness = brightness;
1281 schedule_work(&host->led_work);
1282 }
1283
1284 static void rtsx_usb_update_led(struct work_struct *work)
1285 {
1286 struct rtsx_usb_sdmmc *host =
1287 container_of(work, struct rtsx_usb_sdmmc, led_work);
1288 struct rtsx_ucr *ucr = host->ucr;
1289
1290 pm_runtime_get_noresume(sdmmc_dev(host));
1291 mutex_lock(&ucr->dev_mutex);
1292
1293 if (host->power_mode == MMC_POWER_OFF)
1294 goto out;
1295
1296 if (host->led.brightness == LED_OFF)
1297 rtsx_usb_turn_off_led(ucr);
1298 else
1299 rtsx_usb_turn_on_led(ucr);
1300
1301 out:
1302 mutex_unlock(&ucr->dev_mutex);
1303 pm_runtime_put_sync_suspend(sdmmc_dev(host));
1304 }
1305 #endif
1306
1307 static void rtsx_usb_init_host(struct rtsx_usb_sdmmc *host)
1308 {
1309 struct mmc_host *mmc = host->mmc;
1310
1311 mmc->f_min = 250000;
1312 mmc->f_max = 208000000;
1313 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
1314 mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_SD_HIGHSPEED |
1315 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_BUS_WIDTH_TEST |
1316 MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 | MMC_CAP_UHS_SDR50 |
1317 MMC_CAP_ERASE | MMC_CAP_SYNC_RUNTIME_PM;
1318 mmc->caps2 = MMC_CAP2_NO_PRESCAN_POWERUP | MMC_CAP2_FULL_PWR_CYCLE |
1319 MMC_CAP2_NO_SDIO;
1320
1321 mmc->max_current_330 = 400;
1322 mmc->max_current_180 = 800;
1323 mmc->ops = &rtsx_usb_sdmmc_ops;
1324 mmc->max_segs = 256;
1325 mmc->max_seg_size = 65536;
1326 mmc->max_blk_size = 512;
1327 mmc->max_blk_count = 65535;
1328 mmc->max_req_size = 524288;
1329
1330 host->power_mode = MMC_POWER_OFF;
1331 }
1332
1333 static int rtsx_usb_sdmmc_drv_probe(struct platform_device *pdev)
1334 {
1335 struct mmc_host *mmc;
1336 struct rtsx_usb_sdmmc *host;
1337 struct rtsx_ucr *ucr;
1338 #ifdef RTSX_USB_USE_LEDS_CLASS
1339 int err;
1340 #endif
1341
1342 ucr = usb_get_intfdata(to_usb_interface(pdev->dev.parent));
1343 if (!ucr)
1344 return -ENXIO;
1345
1346 dev_dbg(&(pdev->dev), ": Realtek USB SD/MMC controller found\n");
1347
1348 mmc = mmc_alloc_host(sizeof(*host), &pdev->dev);
1349 if (!mmc)
1350 return -ENOMEM;
1351
1352 host = mmc_priv(mmc);
1353 host->ucr = ucr;
1354 host->mmc = mmc;
1355 host->pdev = pdev;
1356 platform_set_drvdata(pdev, host);
1357
1358 mutex_init(&host->host_mutex);
1359 rtsx_usb_init_host(host);
1360 pm_runtime_enable(&pdev->dev);
1361
1362 #ifdef RTSX_USB_USE_LEDS_CLASS
1363 snprintf(host->led_name, sizeof(host->led_name),
1364 "%s::", mmc_hostname(mmc));
1365 host->led.name = host->led_name;
1366 host->led.brightness = LED_OFF;
1367 host->led.default_trigger = mmc_hostname(mmc);
1368 host->led.brightness_set = rtsx_usb_led_control;
1369
1370 err = led_classdev_register(mmc_dev(mmc), &host->led);
1371 if (err)
1372 dev_err(&(pdev->dev),
1373 "Failed to register LED device: %d\n", err);
1374 INIT_WORK(&host->led_work, rtsx_usb_update_led);
1375
1376 #endif
1377 mmc_add_host(mmc);
1378
1379 return 0;
1380 }
1381
1382 static int rtsx_usb_sdmmc_drv_remove(struct platform_device *pdev)
1383 {
1384 struct rtsx_usb_sdmmc *host = platform_get_drvdata(pdev);
1385 struct mmc_host *mmc;
1386
1387 if (!host)
1388 return 0;
1389
1390 mmc = host->mmc;
1391 host->host_removal = true;
1392
1393 mutex_lock(&host->host_mutex);
1394 if (host->mrq) {
1395 dev_dbg(&(pdev->dev),
1396 "%s: Controller removed during transfer\n",
1397 mmc_hostname(mmc));
1398 host->mrq->cmd->error = -ENOMEDIUM;
1399 if (host->mrq->stop)
1400 host->mrq->stop->error = -ENOMEDIUM;
1401 mmc_request_done(mmc, host->mrq);
1402 }
1403 mutex_unlock(&host->host_mutex);
1404
1405 mmc_remove_host(mmc);
1406
1407 #ifdef RTSX_USB_USE_LEDS_CLASS
1408 cancel_work_sync(&host->led_work);
1409 led_classdev_unregister(&host->led);
1410 #endif
1411
1412 mmc_free_host(mmc);
1413 pm_runtime_disable(&pdev->dev);
1414 platform_set_drvdata(pdev, NULL);
1415
1416 dev_dbg(&(pdev->dev),
1417 ": Realtek USB SD/MMC module has been removed\n");
1418
1419 return 0;
1420 }
1421
1422 #ifdef CONFIG_PM
1423 static int rtsx_usb_sdmmc_runtime_suspend(struct device *dev)
1424 {
1425 struct rtsx_usb_sdmmc *host = dev_get_drvdata(dev);
1426
1427 host->mmc->caps &= ~MMC_CAP_NEEDS_POLL;
1428 return 0;
1429 }
1430
1431 static int rtsx_usb_sdmmc_runtime_resume(struct device *dev)
1432 {
1433 struct rtsx_usb_sdmmc *host = dev_get_drvdata(dev);
1434
1435 host->mmc->caps |= MMC_CAP_NEEDS_POLL;
1436 if (sdmmc_get_cd(host->mmc) == 1)
1437 mmc_detect_change(host->mmc, 0);
1438 return 0;
1439 }
1440 #endif
1441
1442 static const struct dev_pm_ops rtsx_usb_sdmmc_dev_pm_ops = {
1443 SET_RUNTIME_PM_OPS(rtsx_usb_sdmmc_runtime_suspend,
1444 rtsx_usb_sdmmc_runtime_resume, NULL)
1445 };
1446
1447 static const struct platform_device_id rtsx_usb_sdmmc_ids[] = {
1448 {
1449 .name = "rtsx_usb_sdmmc",
1450 }, {
1451
1452 }
1453 };
1454 MODULE_DEVICE_TABLE(platform, rtsx_usb_sdmmc_ids);
1455
1456 static struct platform_driver rtsx_usb_sdmmc_driver = {
1457 .probe = rtsx_usb_sdmmc_drv_probe,
1458 .remove = rtsx_usb_sdmmc_drv_remove,
1459 .id_table = rtsx_usb_sdmmc_ids,
1460 .driver = {
1461 .name = "rtsx_usb_sdmmc",
1462 .pm = &rtsx_usb_sdmmc_dev_pm_ops,
1463 },
1464 };
1465 module_platform_driver(rtsx_usb_sdmmc_driver);
1466
1467 MODULE_LICENSE("GPL v2");
1468 MODULE_AUTHOR("Roger Tseng <rogerable@realtek.com>");
1469 MODULE_DESCRIPTION("Realtek USB SD/MMC Card Host Driver");