root/arch/sparc/include/asm/iommu_64.h

INCLUDED FROM

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /* iommu.h: Definitions for the sun5 IOMMU.
   3  *
   4  * Copyright (C) 1996, 1999, 2007 David S. Miller (davem@davemloft.net)
   5  */
   6 #ifndef _SPARC64_IOMMU_H
   7 #define _SPARC64_IOMMU_H
   8 
   9 /* The format of an iopte in the page tables. */
  10 #define IOPTE_VALID   0x8000000000000000UL
  11 #define IOPTE_64K     0x2000000000000000UL
  12 #define IOPTE_STBUF   0x1000000000000000UL
  13 #define IOPTE_INTRA   0x0800000000000000UL
  14 #define IOPTE_CONTEXT 0x07ff800000000000UL
  15 #define IOPTE_PAGE    0x00007fffffffe000UL
  16 #define IOPTE_CACHE   0x0000000000000010UL
  17 #define IOPTE_WRITE   0x0000000000000002UL
  18 
  19 #define IOMMU_NUM_CTXS  4096
  20 #include <asm/iommu-common.h>
  21 
  22 struct iommu_arena {
  23         unsigned long   *map;
  24         unsigned int    hint;
  25         unsigned int    limit;
  26 };
  27 
  28 #define ATU_64_SPACE_SIZE 0x800000000 /* 32G */
  29 
  30 /* Data structures for SPARC ATU architecture */
  31 struct atu_iotsb {
  32         void    *table;         /* IOTSB table base virtual addr*/
  33         u64     ra;             /* IOTSB table real addr */
  34         u64     dvma_size;      /* ranges[3].size or OS slected 32G size */
  35         u64     dvma_base;      /* ranges[3].base */
  36         u64     table_size;     /* IOTSB table size */
  37         u64     page_size;      /* IO PAGE size for IOTSB */
  38         u32     iotsb_num;      /* tsbnum is same as iotsb_handle */
  39 };
  40 
  41 struct atu_ranges {
  42         u64     base;
  43         u64     size;
  44 };
  45 
  46 struct atu {
  47         struct  atu_ranges      *ranges;
  48         struct  atu_iotsb       *iotsb;
  49         struct  iommu_map_table tbl;
  50         u64                     base;
  51         u64                     size;
  52         u64                     dma_addr_mask;
  53 };
  54 
  55 struct iommu {
  56         struct iommu_map_table  tbl;
  57         struct atu              *atu;
  58         spinlock_t              lock;
  59         u32                     dma_addr_mask;
  60         iopte_t                 *page_table;
  61         unsigned long           iommu_control;
  62         unsigned long           iommu_tsbbase;
  63         unsigned long           iommu_flush;
  64         unsigned long           iommu_flushinv;
  65         unsigned long           iommu_tags;
  66         unsigned long           iommu_ctxflush;
  67         unsigned long           write_complete_reg;
  68         unsigned long           dummy_page;
  69         unsigned long           dummy_page_pa;
  70         unsigned long           ctx_lowest_free;
  71         DECLARE_BITMAP(ctx_bitmap, IOMMU_NUM_CTXS);
  72 };
  73 
  74 struct strbuf {
  75         int                     strbuf_enabled;
  76         unsigned long           strbuf_control;
  77         unsigned long           strbuf_pflush;
  78         unsigned long           strbuf_fsync;
  79         unsigned long           strbuf_err_stat;
  80         unsigned long           strbuf_tag_diag;
  81         unsigned long           strbuf_line_diag;
  82         unsigned long           strbuf_ctxflush;
  83         unsigned long           strbuf_ctxmatch_base;
  84         unsigned long           strbuf_flushflag_pa;
  85         volatile unsigned long *strbuf_flushflag;
  86         volatile unsigned long  __flushflag_buf[(64+(64-1)) / sizeof(long)];
  87 };
  88 
  89 int iommu_table_init(struct iommu *iommu, int tsbsize,
  90                      u32 dma_offset, u32 dma_addr_mask,
  91                      int numa_node);
  92 
  93 #endif /* !(_SPARC64_IOMMU_H) */