This source file includes following definitions.
- fh2id
- to_ivtv
- ivtv_raw_vbi
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22 #ifndef IVTV_DRIVER_H
23 #define IVTV_DRIVER_H
24
25 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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41 #include <linux/module.h>
42 #include <linux/init.h>
43 #include <linux/delay.h>
44 #include <linux/sched/signal.h>
45 #include <linux/fs.h>
46 #include <linux/pci.h>
47 #include <linux/interrupt.h>
48 #include <linux/spinlock.h>
49 #include <linux/i2c.h>
50 #include <linux/i2c-algo-bit.h>
51 #include <linux/list.h>
52 #include <linux/unistd.h>
53 #include <linux/pagemap.h>
54 #include <linux/scatterlist.h>
55 #include <linux/kthread.h>
56 #include <linux/mutex.h>
57 #include <linux/slab.h>
58 #include <linux/uaccess.h>
59 #include <asm/byteorder.h>
60
61 #include <linux/dvb/video.h>
62 #include <linux/dvb/audio.h>
63 #include <media/v4l2-common.h>
64 #include <media/v4l2-ioctl.h>
65 #include <media/v4l2-ctrls.h>
66 #include <media/v4l2-device.h>
67 #include <media/v4l2-fh.h>
68 #include <media/tuner.h>
69 #include <media/drv-intf/cx2341x.h>
70 #include <media/i2c/ir-kbd-i2c.h>
71
72 #include <linux/ivtv.h>
73
74
75 #define IVTV_ENCODER_OFFSET 0x00000000
76 #define IVTV_ENCODER_SIZE 0x00800000
77 #define IVTV_DECODER_OFFSET 0x01000000
78 #define IVTV_DECODER_SIZE 0x00800000
79 #define IVTV_REG_OFFSET 0x02000000
80 #define IVTV_REG_SIZE 0x00010000
81
82
83
84 #define IVTV_MAX_CARDS 32
85
86 #define IVTV_ENC_STREAM_TYPE_MPG 0
87 #define IVTV_ENC_STREAM_TYPE_YUV 1
88 #define IVTV_ENC_STREAM_TYPE_VBI 2
89 #define IVTV_ENC_STREAM_TYPE_PCM 3
90 #define IVTV_ENC_STREAM_TYPE_RAD 4
91 #define IVTV_DEC_STREAM_TYPE_MPG 5
92 #define IVTV_DEC_STREAM_TYPE_VBI 6
93 #define IVTV_DEC_STREAM_TYPE_VOUT 7
94 #define IVTV_DEC_STREAM_TYPE_YUV 8
95 #define IVTV_MAX_STREAMS 9
96
97 #define IVTV_DMA_SG_OSD_ENT (2883584/PAGE_SIZE)
98
99
100 #define IVTV_REG_DMAXFER (0x0000)
101 #define IVTV_REG_DMASTATUS (0x0004)
102 #define IVTV_REG_DECDMAADDR (0x0008)
103 #define IVTV_REG_ENCDMAADDR (0x000c)
104 #define IVTV_REG_DMACONTROL (0x0010)
105 #define IVTV_REG_IRQSTATUS (0x0040)
106 #define IVTV_REG_IRQMASK (0x0048)
107
108
109 #define IVTV_REG_ENC_SDRAM_REFRESH (0x07F8)
110 #define IVTV_REG_ENC_SDRAM_PRECHARGE (0x07FC)
111 #define IVTV_REG_DEC_SDRAM_REFRESH (0x08F8)
112 #define IVTV_REG_DEC_SDRAM_PRECHARGE (0x08FC)
113 #define IVTV_REG_VDM (0x2800)
114 #define IVTV_REG_AO (0x2D00)
115 #define IVTV_REG_BYTEFLUSH (0x2D24)
116 #define IVTV_REG_SPU (0x9050)
117 #define IVTV_REG_HW_BLOCKS (0x9054)
118 #define IVTV_REG_VPU (0x9058)
119 #define IVTV_REG_APU (0xA064)
120
121
122 #define IVTV_REG_DEC_LINE_FIELD (0x28C0)
123
124
125 extern int ivtv_debug;
126 #ifdef CONFIG_VIDEO_ADV_DEBUG
127 extern int ivtv_fw_debug;
128 #endif
129
130 #define IVTV_DBGFLG_WARN (1 << 0)
131 #define IVTV_DBGFLG_INFO (1 << 1)
132 #define IVTV_DBGFLG_MB (1 << 2)
133 #define IVTV_DBGFLG_IOCTL (1 << 3)
134 #define IVTV_DBGFLG_FILE (1 << 4)
135 #define IVTV_DBGFLG_DMA (1 << 5)
136 #define IVTV_DBGFLG_IRQ (1 << 6)
137 #define IVTV_DBGFLG_DEC (1 << 7)
138 #define IVTV_DBGFLG_YUV (1 << 8)
139 #define IVTV_DBGFLG_I2C (1 << 9)
140
141 #define IVTV_DBGFLG_HIGHVOL (1 << 10)
142
143 #define IVTV_DEBUG(x, type, fmt, args...) \
144 do { \
145 if ((x) & ivtv_debug) \
146 v4l2_info(&itv->v4l2_dev, " " type ": " fmt , ##args); \
147 } while (0)
148 #define IVTV_DEBUG_WARN(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_WARN, "warn", fmt , ## args)
149 #define IVTV_DEBUG_INFO(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_INFO, "info", fmt , ## args)
150 #define IVTV_DEBUG_MB(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_MB, "mb", fmt , ## args)
151 #define IVTV_DEBUG_DMA(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_DMA, "dma", fmt , ## args)
152 #define IVTV_DEBUG_IOCTL(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_IOCTL, "ioctl", fmt , ## args)
153 #define IVTV_DEBUG_FILE(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_FILE, "file", fmt , ## args)
154 #define IVTV_DEBUG_I2C(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_I2C, "i2c", fmt , ## args)
155 #define IVTV_DEBUG_IRQ(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_IRQ, "irq", fmt , ## args)
156 #define IVTV_DEBUG_DEC(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_DEC, "dec", fmt , ## args)
157 #define IVTV_DEBUG_YUV(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_YUV, "yuv", fmt , ## args)
158
159 #define IVTV_DEBUG_HIGH_VOL(x, type, fmt, args...) \
160 do { \
161 if (((x) & ivtv_debug) && (ivtv_debug & IVTV_DBGFLG_HIGHVOL)) \
162 v4l2_info(&itv->v4l2_dev, " " type ": " fmt , ##args); \
163 } while (0)
164 #define IVTV_DEBUG_HI_WARN(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_WARN, "warn", fmt , ## args)
165 #define IVTV_DEBUG_HI_INFO(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_INFO, "info", fmt , ## args)
166 #define IVTV_DEBUG_HI_MB(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_MB, "mb", fmt , ## args)
167 #define IVTV_DEBUG_HI_DMA(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_DMA, "dma", fmt , ## args)
168 #define IVTV_DEBUG_HI_IOCTL(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_IOCTL, "ioctl", fmt , ## args)
169 #define IVTV_DEBUG_HI_FILE(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_FILE, "file", fmt , ## args)
170 #define IVTV_DEBUG_HI_I2C(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_I2C, "i2c", fmt , ## args)
171 #define IVTV_DEBUG_HI_IRQ(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_IRQ, "irq", fmt , ## args)
172 #define IVTV_DEBUG_HI_DEC(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_DEC, "dec", fmt , ## args)
173 #define IVTV_DEBUG_HI_YUV(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_YUV, "yuv", fmt , ## args)
174
175
176 #define IVTV_ERR(fmt, args...) v4l2_err(&itv->v4l2_dev, fmt , ## args)
177 #define IVTV_WARN(fmt, args...) v4l2_warn(&itv->v4l2_dev, fmt , ## args)
178 #define IVTV_INFO(fmt, args...) v4l2_info(&itv->v4l2_dev, fmt , ## args)
179
180
181 #define OUT_NONE 0
182 #define OUT_MPG 1
183 #define OUT_YUV 2
184 #define OUT_UDMA_YUV 3
185 #define OUT_PASSTHROUGH 4
186
187 #define IVTV_MAX_PGM_INDEX (400)
188
189
190 #define IVTV_DEFAULT_I2C_CLOCK_PERIOD 20
191
192 struct ivtv_options {
193 int kilobytes[IVTV_MAX_STREAMS];
194 int cardtype;
195 int tuner;
196 int radio;
197 int newi2c;
198 int i2c_clock_period;
199 };
200
201
202 struct ivtv_mailbox {
203 u32 flags;
204 u32 cmd;
205 u32 retval;
206 u32 timeout;
207 u32 data[CX2341X_MBOX_MAX_DATA];
208 };
209
210 struct ivtv_api_cache {
211 unsigned long last_jiffies;
212 u32 data[CX2341X_MBOX_MAX_DATA];
213 };
214
215 struct ivtv_mailbox_data {
216 volatile struct ivtv_mailbox __iomem *mbox;
217
218
219 unsigned long busy;
220 u8 max_mbox;
221 };
222
223
224 #define IVTV_F_B_NEED_BUF_SWAP (1 << 0)
225
226
227 #define IVTV_F_S_DMA_PENDING 0
228 #define IVTV_F_S_DMA_HAS_VBI 1
229 #define IVTV_F_S_NEEDS_DATA 2
230
231 #define IVTV_F_S_CLAIMED 3
232 #define IVTV_F_S_STREAMING 4
233 #define IVTV_F_S_INTERNAL_USE 5
234 #define IVTV_F_S_PASSTHROUGH 6
235 #define IVTV_F_S_STREAMOFF 7
236 #define IVTV_F_S_APPL_IO 8
237
238 #define IVTV_F_S_PIO_PENDING 9
239 #define IVTV_F_S_PIO_HAS_VBI 1
240
241
242 #define IVTV_F_I_DMA 0
243 #define IVTV_F_I_UDMA 1
244 #define IVTV_F_I_UDMA_PENDING 2
245 #define IVTV_F_I_SPEED_CHANGE 3
246 #define IVTV_F_I_EOS 4
247 #define IVTV_F_I_RADIO_USER 5
248 #define IVTV_F_I_DIG_RST 6
249 #define IVTV_F_I_DEC_YUV 7
250 #define IVTV_F_I_UPDATE_CC 9
251 #define IVTV_F_I_UPDATE_WSS 10
252 #define IVTV_F_I_UPDATE_VPS 11
253 #define IVTV_F_I_DECODING_YUV 12
254 #define IVTV_F_I_ENC_PAUSED 13
255 #define IVTV_F_I_VALID_DEC_TIMINGS 14
256 #define IVTV_F_I_HAVE_WORK 15
257 #define IVTV_F_I_WORK_HANDLER_VBI 16
258 #define IVTV_F_I_WORK_HANDLER_YUV 17
259 #define IVTV_F_I_WORK_HANDLER_PIO 18
260 #define IVTV_F_I_PIO 19
261 #define IVTV_F_I_DEC_PAUSED 20
262 #define IVTV_F_I_INITED 21
263 #define IVTV_F_I_FAILED 22
264 #define IVTV_F_I_WORK_HANDLER_PCM 23
265
266
267 #define IVTV_F_I_EV_DEC_STOPPED 28
268 #define IVTV_F_I_EV_VSYNC 29
269 #define IVTV_F_I_EV_VSYNC_FIELD 30
270 #define IVTV_F_I_EV_VSYNC_ENABLED 31
271
272
273 struct ivtv_sg_element {
274 __le32 src;
275 __le32 dst;
276 __le32 size;
277 };
278
279 struct ivtv_sg_host_element {
280 u32 src;
281 u32 dst;
282 u32 size;
283 };
284
285 struct ivtv_user_dma {
286 struct mutex lock;
287 int page_count;
288 struct page *map[IVTV_DMA_SG_OSD_ENT];
289
290 struct page *bouncemap[IVTV_DMA_SG_OSD_ENT];
291
292
293 struct ivtv_sg_element SGarray[IVTV_DMA_SG_OSD_ENT];
294 dma_addr_t SG_handle;
295 int SG_length;
296
297
298 struct scatterlist SGlist[IVTV_DMA_SG_OSD_ENT];
299 };
300
301 struct ivtv_dma_page_info {
302 unsigned long uaddr;
303 unsigned long first;
304 unsigned long last;
305 unsigned int offset;
306 unsigned int tail;
307 int page_count;
308 };
309
310 struct ivtv_buffer {
311 struct list_head list;
312 dma_addr_t dma_handle;
313 unsigned short b_flags;
314 unsigned short dma_xfer_cnt;
315 char *buf;
316 u32 bytesused;
317 u32 readpos;
318 };
319
320 struct ivtv_queue {
321 struct list_head list;
322 u32 buffers;
323 u32 length;
324 u32 bytesused;
325 };
326
327 struct ivtv;
328
329 struct ivtv_stream {
330
331
332 struct video_device vdev;
333 struct ivtv *itv;
334 const char *name;
335 int type;
336 u32 caps;
337
338 struct v4l2_fh *fh;
339 spinlock_t qlock;
340 unsigned long s_flags;
341 int dma;
342 u32 pending_offset;
343 u32 pending_backup;
344 u64 pending_pts;
345
346 u32 dma_offset;
347 u32 dma_backup;
348 u64 dma_pts;
349
350 int subtype;
351 wait_queue_head_t waitq;
352 u32 dma_last_offset;
353
354
355 u32 buffers;
356 u32 buf_size;
357 u32 buffers_stolen;
358
359
360 struct ivtv_queue q_free;
361 struct ivtv_queue q_full;
362 struct ivtv_queue q_io;
363 struct ivtv_queue q_dma;
364 struct ivtv_queue q_predma;
365
366
367
368 u16 dma_xfer_cnt;
369
370
371 struct ivtv_sg_host_element *sg_pending;
372 struct ivtv_sg_host_element *sg_processing;
373 struct ivtv_sg_element *sg_dma;
374 dma_addr_t sg_handle;
375 int sg_pending_size;
376 int sg_processing_size;
377 int sg_processed;
378
379
380 struct scatterlist *SGlist;
381 };
382
383 struct ivtv_open_id {
384 struct v4l2_fh fh;
385 int type;
386 int yuv_frames;
387 struct ivtv *itv;
388 };
389
390 static inline struct ivtv_open_id *fh2id(struct v4l2_fh *fh)
391 {
392 return container_of(fh, struct ivtv_open_id, fh);
393 }
394
395 struct yuv_frame_info
396 {
397 u32 update;
398 s32 src_x;
399 s32 src_y;
400 u32 src_w;
401 u32 src_h;
402 s32 dst_x;
403 s32 dst_y;
404 u32 dst_w;
405 u32 dst_h;
406 s32 pan_x;
407 s32 pan_y;
408 u32 vis_w;
409 u32 vis_h;
410 u32 interlaced_y;
411 u32 interlaced_uv;
412 s32 tru_x;
413 u32 tru_w;
414 u32 tru_h;
415 u32 offset_y;
416 s32 lace_mode;
417 u32 sync_field;
418 u32 delay;
419 u32 interlaced;
420 };
421
422 #define IVTV_YUV_MODE_INTERLACED 0x00
423 #define IVTV_YUV_MODE_PROGRESSIVE 0x01
424 #define IVTV_YUV_MODE_AUTO 0x02
425 #define IVTV_YUV_MODE_MASK 0x03
426
427 #define IVTV_YUV_SYNC_EVEN 0x00
428 #define IVTV_YUV_SYNC_ODD 0x04
429 #define IVTV_YUV_SYNC_MASK 0x04
430
431 #define IVTV_YUV_BUFFERS 8
432
433 struct yuv_playback_info
434 {
435 u32 reg_2834;
436 u32 reg_2838;
437 u32 reg_283c;
438 u32 reg_2840;
439 u32 reg_2844;
440 u32 reg_2848;
441 u32 reg_2854;
442 u32 reg_285c;
443 u32 reg_2864;
444
445 u32 reg_2870;
446 u32 reg_2874;
447 u32 reg_2890;
448 u32 reg_2898;
449 u32 reg_289c;
450
451 u32 reg_2918;
452 u32 reg_291c;
453 u32 reg_2920;
454 u32 reg_2924;
455 u32 reg_2928;
456 u32 reg_292c;
457 u32 reg_2930;
458
459 u32 reg_2934;
460
461 u32 reg_2938;
462 u32 reg_293c;
463 u32 reg_2940;
464 u32 reg_2944;
465 u32 reg_2948;
466 u32 reg_294c;
467 u32 reg_2950;
468 u32 reg_2954;
469 u32 reg_2958;
470 u32 reg_295c;
471 u32 reg_2960;
472 u32 reg_2964;
473 u32 reg_2968;
474 u32 reg_296c;
475
476 u32 reg_2970;
477
478 int v_filter_1;
479 int v_filter_2;
480 int h_filter;
481
482 u8 track_osd;
483
484 u32 osd_x_offset;
485 u32 osd_y_offset;
486
487 u32 osd_x_pan;
488 u32 osd_y_pan;
489
490 u32 osd_vis_w;
491 u32 osd_vis_h;
492
493 u32 osd_full_w;
494 u32 osd_full_h;
495
496 int decode_height;
497
498 int lace_mode;
499 int lace_threshold;
500 int lace_sync_field;
501
502 atomic_t next_dma_frame;
503 atomic_t next_fill_frame;
504
505 u32 yuv_forced_update;
506 int update_frame;
507
508 u8 fields_lapsed;
509
510 struct yuv_frame_info new_frame_info[IVTV_YUV_BUFFERS];
511 struct yuv_frame_info old_frame_info;
512 struct yuv_frame_info old_frame_info_args;
513
514 void *blanking_ptr;
515 dma_addr_t blanking_dmaptr;
516
517 int stream_size;
518
519 u8 draw_frame;
520 u8 max_frames_buffered;
521
522 struct v4l2_rect main_rect;
523 u32 v4l2_src_w;
524 u32 v4l2_src_h;
525
526 u8 running;
527 };
528
529 #define IVTV_VBI_FRAMES 32
530
531
532 struct vbi_cc {
533 u8 odd[2];
534 u8 even[2]; ;
535 };
536
537 struct vbi_vps {
538 u8 data[5];
539 };
540
541 struct vbi_info {
542
543
544 u32 raw_decoder_line_size;
545 u8 raw_decoder_sav_odd_field;
546 u8 raw_decoder_sav_even_field;
547 u32 sliced_decoder_line_size;
548 u8 sliced_decoder_sav_odd_field;
549 u8 sliced_decoder_sav_even_field;
550
551 u32 start[2];
552 u32 count;
553 u32 raw_size;
554 u32 sliced_size;
555
556 u32 dec_start;
557 u32 enc_start;
558 u32 enc_size;
559 int fpi;
560
561 struct v4l2_format in;
562 struct v4l2_sliced_vbi_format *sliced_in;
563 int insert_mpeg;
564
565
566
567 u32 frame;
568
569
570
571
572 struct vbi_cc cc_payload[256];
573
574
575 int cc_payload_idx;
576 u8 cc_missing_cnt;
577 int wss_payload;
578 u8 wss_missing_cnt;
579 struct vbi_vps vps_payload;
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581
582
583 struct v4l2_sliced_vbi_data sliced_data[36];
584 struct v4l2_sliced_vbi_data sliced_dec_data[36];
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599
600
601 u8 *sliced_mpeg_data[IVTV_VBI_FRAMES];
602 u32 sliced_mpeg_size[IVTV_VBI_FRAMES];
603 struct ivtv_buffer sliced_mpeg_buf;
604 u32 inserted_frame;
605
606 };
607
608
609 struct ivtv_card;
610
611
612 struct ivtv {
613
614 struct pci_dev *pdev;
615 const struct ivtv_card *card;
616 const char *card_name;
617 const struct ivtv_card_tuner_i2c *card_i2c;
618 u8 has_cx23415;
619 u8 pvr150_workaround;
620 u8 nof_inputs;
621 u8 nof_audio_inputs;
622 u32 v4l2_cap;
623 u32 hw_flags;
624 v4l2_std_id tuner_std;
625 struct v4l2_subdev *sd_video;
626 struct v4l2_subdev *sd_audio;
627 struct v4l2_subdev *sd_muxer;
628 resource_size_t base_addr;
629 volatile void __iomem *enc_mem;
630 volatile void __iomem *dec_mem;
631 volatile void __iomem *reg_mem;
632 struct ivtv_options options;
633
634 struct v4l2_device v4l2_dev;
635 struct cx2341x_handler cxhdl;
636 struct {
637
638 struct v4l2_ctrl *ctrl_pts;
639 struct v4l2_ctrl *ctrl_frame;
640 };
641 struct {
642
643 struct v4l2_ctrl *ctrl_audio_playback;
644 struct v4l2_ctrl *ctrl_audio_multilingual_playback;
645 };
646 struct v4l2_ctrl_handler hdl_gpio;
647 struct v4l2_subdev sd_gpio;
648 u16 instance;
649
650
651 unsigned long i_flags;
652 u8 is_50hz;
653 u8 is_60hz ;
654 u8 is_out_50hz ;
655 u8 is_out_60hz ;
656 int output_mode;
657 u32 audio_input;
658 u32 active_input;
659 u32 active_output;
660 v4l2_std_id std;
661 v4l2_std_id std_out;
662 u8 audio_stereo_mode;
663 u8 audio_bilingual_mode;
664
665
666 spinlock_t lock;
667 struct mutex serialize_lock;
668
669
670 int stream_buf_size[IVTV_MAX_STREAMS];
671 struct ivtv_stream streams[IVTV_MAX_STREAMS];
672 atomic_t capturing;
673 atomic_t decoding;
674
675
676 struct snd_ivtv_card *alsa;
677 void (*pcm_announce_callback)(struct snd_ivtv_card *card, u8 *pcm_data,
678 size_t num_bytes);
679
680
681 struct work_struct request_module_wk;
682
683
684 u32 irqmask;
685 u32 irq_rr_idx;
686 struct kthread_worker irq_worker;
687 struct task_struct *irq_worker_task;
688 struct kthread_work irq_work;
689 spinlock_t dma_reg_lock;
690 int cur_dma_stream;
691 int cur_pio_stream;
692 u32 dma_data_req_offset;
693 u32 dma_data_req_size;
694 int dma_retries;
695 struct ivtv_user_dma udma;
696 struct timer_list dma_timer;
697 u32 last_vsync_field;
698 wait_queue_head_t dma_waitq;
699 wait_queue_head_t eos_waitq;
700 wait_queue_head_t event_waitq;
701 wait_queue_head_t vsync_waitq;
702
703
704
705 struct ivtv_mailbox_data enc_mbox;
706 struct ivtv_mailbox_data dec_mbox;
707 struct ivtv_api_cache api_cache[256];
708
709
710
711 struct i2c_adapter i2c_adap;
712 struct i2c_algo_bit_data i2c_algo;
713 struct i2c_client i2c_client;
714 int i2c_state;
715 struct mutex i2c_bus_lock;
716
717 struct IR_i2c_init_data ir_i2c_init_data;
718
719
720 u32 pgm_info_offset;
721 u32 pgm_info_num;
722 u32 pgm_info_write_idx;
723 u32 pgm_info_read_idx;
724 struct v4l2_enc_idx_entry pgm_info[IVTV_MAX_PGM_INDEX];
725
726
727
728 u32 open_id;
729 int search_pack_header;
730 int speed;
731 u8 speed_mute_audio;
732 u64 mpg_data_received;
733 u64 vbi_data_inserted;
734 u32 last_dec_timing[3];
735 unsigned long dualwatch_jiffies;
736 u32 dualwatch_stereo_mode;
737
738
739
740 struct vbi_info vbi;
741
742
743
744 struct yuv_playback_info yuv_info;
745
746
747
748 unsigned long osd_video_pbase;
749 int osd_global_alpha_state;
750 int osd_local_alpha_state;
751 int osd_chroma_key_state;
752 u8 osd_global_alpha;
753 u32 osd_chroma_key;
754 struct v4l2_rect osd_rect;
755 struct v4l2_rect main_rect;
756 struct osd_info *osd_info;
757 void (*ivtvfb_restore)(struct ivtv *itv);
758 };
759
760 static inline struct ivtv *to_ivtv(struct v4l2_device *v4l2_dev)
761 {
762 return container_of(v4l2_dev, struct ivtv, v4l2_dev);
763 }
764
765
766 extern int (*ivtv_ext_init)(struct ivtv *);
767
768
769 extern int ivtv_first_minor;
770
771
772
773
774 void ivtv_set_irq_mask(struct ivtv *itv, u32 mask);
775 void ivtv_clear_irq_mask(struct ivtv *itv, u32 mask);
776
777
778 int ivtv_set_output_mode(struct ivtv *itv, int mode);
779
780
781 struct ivtv_stream *ivtv_get_output_stream(struct ivtv *itv);
782
783
784 int ivtv_msleep_timeout(unsigned int msecs, int intr);
785
786
787 int ivtv_waitq(wait_queue_head_t *waitq);
788
789
790 struct tveeprom;
791 void ivtv_read_eeprom(struct ivtv *itv, struct tveeprom *tv);
792
793
794 int ivtv_init_on_first_open(struct ivtv *itv);
795
796
797 static inline int ivtv_raw_vbi(const struct ivtv *itv)
798 {
799 return itv->vbi.in.type == V4L2_BUF_TYPE_VBI_CAPTURE;
800 }
801
802
803
804
805
806
807
808
809
810
811 #define write_sync(val, reg) \
812 do { writel(val, reg); readl(reg); } while (0)
813
814 #define read_reg(reg) readl(itv->reg_mem + (reg))
815 #define write_reg(val, reg) writel(val, itv->reg_mem + (reg))
816 #define write_reg_sync(val, reg) \
817 do { write_reg(val, reg); read_reg(reg); } while (0)
818
819 #define read_enc(addr) readl(itv->enc_mem + (u32)(addr))
820 #define write_enc(val, addr) writel(val, itv->enc_mem + (u32)(addr))
821 #define write_enc_sync(val, addr) \
822 do { write_enc(val, addr); read_enc(addr); } while (0)
823
824 #define read_dec(addr) readl(itv->dec_mem + (u32)(addr))
825 #define write_dec(val, addr) writel(val, itv->dec_mem + (u32)(addr))
826 #define write_dec_sync(val, addr) \
827 do { write_dec(val, addr); read_dec(addr); } while (0)
828
829
830
831 #define ivtv_call_hw(itv, hw, o, f, args...) \
832 v4l2_device_mask_call_all(&(itv)->v4l2_dev, hw, o, f, ##args)
833
834 #define ivtv_call_all(itv, o, f, args...) ivtv_call_hw(itv, 0, o, f , ##args)
835
836
837
838
839 #define ivtv_call_hw_err(itv, hw, o, f, args...) \
840 v4l2_device_mask_call_until_err(&(itv)->v4l2_dev, hw, o, f, ##args)
841
842 #define ivtv_call_all_err(itv, o, f, args...) ivtv_call_hw_err(itv, 0, o, f , ##args)
843
844 #endif