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   7 #ifndef LTQ_DMA_H__
   8 #define LTQ_DMA_H__
   9 
  10 #define LTQ_DESC_SIZE           0x08    
  11 #define LTQ_DESC_NUM            0x40    
  12 
  13 #define LTQ_DMA_OWN             BIT(31) 
  14 #define LTQ_DMA_C               BIT(30) 
  15 #define LTQ_DMA_SOP             BIT(29) 
  16 #define LTQ_DMA_EOP             BIT(28) 
  17 #define LTQ_DMA_TX_OFFSET(x)    ((x & 0x1f) << 23) 
  18 #define LTQ_DMA_RX_OFFSET(x)    ((x & 0x7) << 23) 
  19 #define LTQ_DMA_SIZE_MASK       (0xffff) 
  20 
  21 struct ltq_dma_desc {
  22         u32 ctl;
  23         u32 addr;
  24 };
  25 
  26 struct ltq_dma_channel {
  27         int nr;                         
  28         int irq;                        
  29         int desc;                       
  30         struct ltq_dma_desc *desc_base; 
  31         int phys;                       
  32         struct device *dev;
  33 };
  34 
  35 enum {
  36         DMA_PORT_ETOP = 0,
  37         DMA_PORT_DEU,
  38 };
  39 
  40 extern void ltq_dma_enable_irq(struct ltq_dma_channel *ch);
  41 extern void ltq_dma_disable_irq(struct ltq_dma_channel *ch);
  42 extern void ltq_dma_ack_irq(struct ltq_dma_channel *ch);
  43 extern void ltq_dma_open(struct ltq_dma_channel *ch);
  44 extern void ltq_dma_close(struct ltq_dma_channel *ch);
  45 extern void ltq_dma_alloc_tx(struct ltq_dma_channel *ch);
  46 extern void ltq_dma_alloc_rx(struct ltq_dma_channel *ch);
  47 extern void ltq_dma_free(struct ltq_dma_channel *ch);
  48 extern void ltq_dma_init_port(int p);
  49 
  50 #endif