1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * Copyright 2014-2015 Cisco Systems, Inc. and/or its affiliates.
4 * All rights reserved.
5 */
6
7 #ifndef M00235_FDMA_PACKER_MEMMAP_PACKAGE_H
8 #define M00235_FDMA_PACKER_MEMMAP_PACKAGE_H
9
10 /*******************************************************************
11 * Register Block
12 * M00235_FDMA_PACKER_MEMMAP_PACKAGE_VHD_REGMAP
13 *******************************************************************/
14 struct m00235_fdma_packer_regmap {
15 uint32_t control; /* Reg 0x0000, Default=0x0 */
16 };
17
18 #define M00235_FDMA_PACKER_REG_CONTROL_OFST 0
19
20 /*******************************************************************
21 * Bit Mask for register
22 * M00235_FDMA_PACKER_MEMMAP_PACKAGE_VHD_BITMAP
23 *******************************************************************/
24 /* control [3:0] */
25 #define M00235_CONTROL_BITMAP_ENABLE_OFST (0)
26 #define M00235_CONTROL_BITMAP_ENABLE_MSK (0x1 << M00235_CONTROL_BITMAP_ENABLE_OFST)
27 #define M00235_CONTROL_BITMAP_PACK_FORMAT_OFST (1)
28 #define M00235_CONTROL_BITMAP_PACK_FORMAT_MSK (0x3 << M00235_CONTROL_BITMAP_PACK_FORMAT_OFST)
29 #define M00235_CONTROL_BITMAP_ENDIAN_FORMAT_OFST (3)
30 #define M00235_CONTROL_BITMAP_ENDIAN_FORMAT_MSK (0x1 << M00235_CONTROL_BITMAP_ENDIAN_FORMAT_OFST)
31
32 #endif /*M00235_FDMA_PACKER_MEMMAP_PACKAGE_H*/