This source file includes following definitions.
- cxd2820r_wr_reg_val_mask_tab
- cxd2820r_gpio
- cxd2820r_set_frontend
- cxd2820r_read_status
- cxd2820r_get_frontend
- cxd2820r_read_ber
- cxd2820r_read_signal_strength
- cxd2820r_read_snr
- cxd2820r_read_ucblocks
- cxd2820r_init
- cxd2820r_sleep
- cxd2820r_get_tune_settings
- cxd2820r_search
- cxd2820r_get_frontend_algo
- cxd2820r_release
- cxd2820r_i2c_gate_ctrl
- cxd2820r_gpio_direction_output
- cxd2820r_gpio_set
- cxd2820r_gpio_get
- cxd2820r_attach
- cxd2820r_get_dvb_frontend
- cxd2820r_probe
- cxd2820r_remove
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7
8
9 #include "cxd2820r_priv.h"
10
11
12 int cxd2820r_wr_reg_val_mask_tab(struct cxd2820r_priv *priv,
13 const struct reg_val_mask *tab, int tab_len)
14 {
15 struct i2c_client *client = priv->client[0];
16 int ret;
17 unsigned int i, reg, mask, val;
18 struct regmap *regmap;
19
20 dev_dbg(&client->dev, "tab_len=%d\n", tab_len);
21
22 for (i = 0; i < tab_len; i++) {
23 if ((tab[i].reg >> 16) & 0x1)
24 regmap = priv->regmap[1];
25 else
26 regmap = priv->regmap[0];
27
28 reg = (tab[i].reg >> 0) & 0xffff;
29 val = tab[i].val;
30 mask = tab[i].mask;
31
32 if (mask == 0xff)
33 ret = regmap_write(regmap, reg, val);
34 else
35 ret = regmap_write_bits(regmap, reg, mask, val);
36 if (ret)
37 goto error;
38 }
39
40 return 0;
41 error:
42 dev_dbg(&client->dev, "failed=%d\n", ret);
43 return ret;
44 }
45
46 int cxd2820r_gpio(struct dvb_frontend *fe, u8 *gpio)
47 {
48 struct cxd2820r_priv *priv = fe->demodulator_priv;
49 struct i2c_client *client = priv->client[0];
50 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
51 int ret, i;
52 u8 tmp0, tmp1;
53
54 dev_dbg(&client->dev, "delivery_system=%d\n", c->delivery_system);
55
56
57 if (!memcmp(gpio, priv->gpio, sizeof(priv->gpio)))
58 return 0;
59
60 tmp0 = 0x00;
61 tmp1 = 0x00;
62 for (i = 0; i < sizeof(priv->gpio); i++) {
63
64 if (gpio[i] & CXD2820R_GPIO_E)
65 tmp0 |= (2 << 6) >> (2 * i);
66 else
67 tmp0 |= (1 << 6) >> (2 * i);
68
69
70 if (gpio[i] & CXD2820R_GPIO_I)
71 tmp1 |= (1 << (3 + i));
72 else
73 tmp1 |= (0 << (3 + i));
74
75
76 if (gpio[i] & CXD2820R_GPIO_H)
77 tmp1 |= (1 << (0 + i));
78 else
79 tmp1 |= (0 << (0 + i));
80
81 dev_dbg(&client->dev, "gpio i=%d %02x %02x\n", i, tmp0, tmp1);
82 }
83
84 dev_dbg(&client->dev, "wr gpio=%02x %02x\n", tmp0, tmp1);
85
86
87 ret = regmap_update_bits(priv->regmap[0], 0x0089, 0xfc, tmp0);
88 if (ret)
89 goto error;
90
91
92 ret = regmap_update_bits(priv->regmap[0], 0x008e, 0x3f, tmp1);
93 if (ret)
94 goto error;
95
96 memcpy(priv->gpio, gpio, sizeof(priv->gpio));
97
98 return ret;
99 error:
100 dev_dbg(&client->dev, "failed=%d\n", ret);
101 return ret;
102 }
103
104 static int cxd2820r_set_frontend(struct dvb_frontend *fe)
105 {
106 struct cxd2820r_priv *priv = fe->demodulator_priv;
107 struct i2c_client *client = priv->client[0];
108 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
109 int ret;
110
111 dev_dbg(&client->dev, "delivery_system=%d\n", c->delivery_system);
112
113 switch (c->delivery_system) {
114 case SYS_DVBT:
115 ret = cxd2820r_init_t(fe);
116 if (ret < 0)
117 goto err;
118 ret = cxd2820r_set_frontend_t(fe);
119 if (ret < 0)
120 goto err;
121 break;
122 case SYS_DVBT2:
123 ret = cxd2820r_init_t(fe);
124 if (ret < 0)
125 goto err;
126 ret = cxd2820r_set_frontend_t2(fe);
127 if (ret < 0)
128 goto err;
129 break;
130 case SYS_DVBC_ANNEX_A:
131 ret = cxd2820r_init_c(fe);
132 if (ret < 0)
133 goto err;
134 ret = cxd2820r_set_frontend_c(fe);
135 if (ret < 0)
136 goto err;
137 break;
138 default:
139 dev_dbg(&client->dev, "invalid delivery_system\n");
140 ret = -EINVAL;
141 break;
142 }
143 err:
144 return ret;
145 }
146
147 static int cxd2820r_read_status(struct dvb_frontend *fe, enum fe_status *status)
148 {
149 struct cxd2820r_priv *priv = fe->demodulator_priv;
150 struct i2c_client *client = priv->client[0];
151 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
152 int ret;
153
154 dev_dbg(&client->dev, "delivery_system=%d\n", c->delivery_system);
155
156 switch (c->delivery_system) {
157 case SYS_DVBT:
158 ret = cxd2820r_read_status_t(fe, status);
159 break;
160 case SYS_DVBT2:
161 ret = cxd2820r_read_status_t2(fe, status);
162 break;
163 case SYS_DVBC_ANNEX_A:
164 ret = cxd2820r_read_status_c(fe, status);
165 break;
166 default:
167 ret = -EINVAL;
168 break;
169 }
170 return ret;
171 }
172
173 static int cxd2820r_get_frontend(struct dvb_frontend *fe,
174 struct dtv_frontend_properties *p)
175 {
176 struct cxd2820r_priv *priv = fe->demodulator_priv;
177 struct i2c_client *client = priv->client[0];
178 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
179 int ret;
180
181 dev_dbg(&client->dev, "delivery_system=%d\n", c->delivery_system);
182
183 if (priv->delivery_system == SYS_UNDEFINED)
184 return 0;
185
186 switch (c->delivery_system) {
187 case SYS_DVBT:
188 ret = cxd2820r_get_frontend_t(fe, p);
189 break;
190 case SYS_DVBT2:
191 ret = cxd2820r_get_frontend_t2(fe, p);
192 break;
193 case SYS_DVBC_ANNEX_A:
194 ret = cxd2820r_get_frontend_c(fe, p);
195 break;
196 default:
197 ret = -EINVAL;
198 break;
199 }
200 return ret;
201 }
202
203 static int cxd2820r_read_ber(struct dvb_frontend *fe, u32 *ber)
204 {
205 struct cxd2820r_priv *priv = fe->demodulator_priv;
206 struct i2c_client *client = priv->client[0];
207 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
208
209 dev_dbg(&client->dev, "delivery_system=%d\n", c->delivery_system);
210
211 *ber = (priv->post_bit_error - priv->post_bit_error_prev_dvbv3);
212 priv->post_bit_error_prev_dvbv3 = priv->post_bit_error;
213
214 return 0;
215 }
216
217 static int cxd2820r_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
218 {
219 struct cxd2820r_priv *priv = fe->demodulator_priv;
220 struct i2c_client *client = priv->client[0];
221 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
222
223 dev_dbg(&client->dev, "delivery_system=%d\n", c->delivery_system);
224
225 if (c->strength.stat[0].scale == FE_SCALE_RELATIVE)
226 *strength = c->strength.stat[0].uvalue;
227 else
228 *strength = 0;
229
230 return 0;
231 }
232
233 static int cxd2820r_read_snr(struct dvb_frontend *fe, u16 *snr)
234 {
235 struct cxd2820r_priv *priv = fe->demodulator_priv;
236 struct i2c_client *client = priv->client[0];
237 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
238
239 dev_dbg(&client->dev, "delivery_system=%d\n", c->delivery_system);
240
241 if (c->cnr.stat[0].scale == FE_SCALE_DECIBEL)
242 *snr = div_s64(c->cnr.stat[0].svalue, 100);
243 else
244 *snr = 0;
245
246 return 0;
247 }
248
249 static int cxd2820r_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
250 {
251 struct cxd2820r_priv *priv = fe->demodulator_priv;
252 struct i2c_client *client = priv->client[0];
253 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
254
255 dev_dbg(&client->dev, "delivery_system=%d\n", c->delivery_system);
256
257 *ucblocks = 0;
258
259 return 0;
260 }
261
262 static int cxd2820r_init(struct dvb_frontend *fe)
263 {
264 return 0;
265 }
266
267 static int cxd2820r_sleep(struct dvb_frontend *fe)
268 {
269 struct cxd2820r_priv *priv = fe->demodulator_priv;
270 struct i2c_client *client = priv->client[0];
271 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
272 int ret;
273
274 dev_dbg(&client->dev, "delivery_system=%d\n", c->delivery_system);
275
276 switch (c->delivery_system) {
277 case SYS_DVBT:
278 ret = cxd2820r_sleep_t(fe);
279 break;
280 case SYS_DVBT2:
281 ret = cxd2820r_sleep_t2(fe);
282 break;
283 case SYS_DVBC_ANNEX_A:
284 ret = cxd2820r_sleep_c(fe);
285 break;
286 default:
287 ret = -EINVAL;
288 break;
289 }
290 return ret;
291 }
292
293 static int cxd2820r_get_tune_settings(struct dvb_frontend *fe,
294 struct dvb_frontend_tune_settings *s)
295 {
296 struct cxd2820r_priv *priv = fe->demodulator_priv;
297 struct i2c_client *client = priv->client[0];
298 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
299 int ret;
300
301 dev_dbg(&client->dev, "delivery_system=%d\n", c->delivery_system);
302
303 switch (c->delivery_system) {
304 case SYS_DVBT:
305 ret = cxd2820r_get_tune_settings_t(fe, s);
306 break;
307 case SYS_DVBT2:
308 ret = cxd2820r_get_tune_settings_t2(fe, s);
309 break;
310 case SYS_DVBC_ANNEX_A:
311 ret = cxd2820r_get_tune_settings_c(fe, s);
312 break;
313 default:
314 ret = -EINVAL;
315 break;
316 }
317 return ret;
318 }
319
320 static enum dvbfe_search cxd2820r_search(struct dvb_frontend *fe)
321 {
322 struct cxd2820r_priv *priv = fe->demodulator_priv;
323 struct i2c_client *client = priv->client[0];
324 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
325 int ret, i;
326 enum fe_status status = 0;
327
328 dev_dbg(&client->dev, "delivery_system=%d\n", c->delivery_system);
329
330
331 if (priv->last_tune_failed) {
332 if (priv->delivery_system == SYS_DVBT) {
333 ret = cxd2820r_sleep_t(fe);
334 if (ret)
335 goto error;
336
337 c->delivery_system = SYS_DVBT2;
338 } else if (priv->delivery_system == SYS_DVBT2) {
339 ret = cxd2820r_sleep_t2(fe);
340 if (ret)
341 goto error;
342
343 c->delivery_system = SYS_DVBT;
344 }
345 }
346
347
348 ret = cxd2820r_set_frontend(fe);
349 if (ret)
350 goto error;
351
352
353 switch (priv->delivery_system) {
354 case SYS_DVBT:
355 case SYS_DVBC_ANNEX_A:
356 i = 20;
357 break;
358 case SYS_DVBT2:
359 i = 40;
360 break;
361 case SYS_UNDEFINED:
362 default:
363 i = 0;
364 break;
365 }
366
367
368 for (; i > 0; i--) {
369 dev_dbg(&client->dev, "loop=%d\n", i);
370 msleep(50);
371 ret = cxd2820r_read_status(fe, &status);
372 if (ret)
373 goto error;
374
375 if (status & FE_HAS_LOCK)
376 break;
377 }
378
379
380 if (status & FE_HAS_LOCK) {
381 priv->last_tune_failed = false;
382 return DVBFE_ALGO_SEARCH_SUCCESS;
383 } else {
384 priv->last_tune_failed = true;
385 return DVBFE_ALGO_SEARCH_AGAIN;
386 }
387
388 error:
389 dev_dbg(&client->dev, "failed=%d\n", ret);
390 return DVBFE_ALGO_SEARCH_ERROR;
391 }
392
393 static enum dvbfe_algo cxd2820r_get_frontend_algo(struct dvb_frontend *fe)
394 {
395 return DVBFE_ALGO_CUSTOM;
396 }
397
398 static void cxd2820r_release(struct dvb_frontend *fe)
399 {
400 struct cxd2820r_priv *priv = fe->demodulator_priv;
401 struct i2c_client *client = priv->client[0];
402
403 dev_dbg(&client->dev, "\n");
404
405 i2c_unregister_device(client);
406
407 return;
408 }
409
410 static int cxd2820r_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
411 {
412 struct cxd2820r_priv *priv = fe->demodulator_priv;
413 struct i2c_client *client = priv->client[0];
414
415 dev_dbg_ratelimited(&client->dev, "enable=%d\n", enable);
416
417 return regmap_update_bits(priv->regmap[0], 0x00db, 0x01, enable ? 1 : 0);
418 }
419
420 #ifdef CONFIG_GPIOLIB
421 static int cxd2820r_gpio_direction_output(struct gpio_chip *chip, unsigned nr,
422 int val)
423 {
424 struct cxd2820r_priv *priv = gpiochip_get_data(chip);
425 struct i2c_client *client = priv->client[0];
426 u8 gpio[GPIO_COUNT];
427
428 dev_dbg(&client->dev, "nr=%u val=%d\n", nr, val);
429
430 memcpy(gpio, priv->gpio, sizeof(gpio));
431 gpio[nr] = CXD2820R_GPIO_E | CXD2820R_GPIO_O | (val << 2);
432
433 return cxd2820r_gpio(&priv->fe, gpio);
434 }
435
436 static void cxd2820r_gpio_set(struct gpio_chip *chip, unsigned nr, int val)
437 {
438 struct cxd2820r_priv *priv = gpiochip_get_data(chip);
439 struct i2c_client *client = priv->client[0];
440 u8 gpio[GPIO_COUNT];
441
442 dev_dbg(&client->dev, "nr=%u val=%d\n", nr, val);
443
444 memcpy(gpio, priv->gpio, sizeof(gpio));
445 gpio[nr] = CXD2820R_GPIO_E | CXD2820R_GPIO_O | (val << 2);
446
447 (void) cxd2820r_gpio(&priv->fe, gpio);
448
449 return;
450 }
451
452 static int cxd2820r_gpio_get(struct gpio_chip *chip, unsigned nr)
453 {
454 struct cxd2820r_priv *priv = gpiochip_get_data(chip);
455 struct i2c_client *client = priv->client[0];
456
457 dev_dbg(&client->dev, "nr=%u\n", nr);
458
459 return (priv->gpio[nr] >> 2) & 0x01;
460 }
461 #endif
462
463 static const struct dvb_frontend_ops cxd2820r_ops = {
464 .delsys = { SYS_DVBT, SYS_DVBT2, SYS_DVBC_ANNEX_A },
465
466 .info = {
467 .name = "Sony CXD2820R",
468
469 .caps = FE_CAN_FEC_1_2 |
470 FE_CAN_FEC_2_3 |
471 FE_CAN_FEC_3_4 |
472 FE_CAN_FEC_5_6 |
473 FE_CAN_FEC_7_8 |
474 FE_CAN_FEC_AUTO |
475 FE_CAN_QPSK |
476 FE_CAN_QAM_16 |
477 FE_CAN_QAM_32 |
478 FE_CAN_QAM_64 |
479 FE_CAN_QAM_128 |
480 FE_CAN_QAM_256 |
481 FE_CAN_QAM_AUTO |
482 FE_CAN_TRANSMISSION_MODE_AUTO |
483 FE_CAN_GUARD_INTERVAL_AUTO |
484 FE_CAN_HIERARCHY_AUTO |
485 FE_CAN_MUTE_TS |
486 FE_CAN_2G_MODULATION |
487 FE_CAN_MULTISTREAM
488 },
489
490 .release = cxd2820r_release,
491 .init = cxd2820r_init,
492 .sleep = cxd2820r_sleep,
493
494 .get_tune_settings = cxd2820r_get_tune_settings,
495 .i2c_gate_ctrl = cxd2820r_i2c_gate_ctrl,
496
497 .get_frontend = cxd2820r_get_frontend,
498
499 .get_frontend_algo = cxd2820r_get_frontend_algo,
500 .search = cxd2820r_search,
501
502 .read_status = cxd2820r_read_status,
503 .read_snr = cxd2820r_read_snr,
504 .read_ber = cxd2820r_read_ber,
505 .read_ucblocks = cxd2820r_read_ucblocks,
506 .read_signal_strength = cxd2820r_read_signal_strength,
507 };
508
509
510
511
512
513
514 struct dvb_frontend *cxd2820r_attach(const struct cxd2820r_config *config,
515 struct i2c_adapter *adapter,
516 int *gpio_chip_base)
517 {
518 struct i2c_client *client;
519 struct i2c_board_info board_info;
520 struct cxd2820r_platform_data pdata;
521
522 pdata.ts_mode = config->ts_mode;
523 pdata.ts_clk_inv = config->ts_clock_inv;
524 pdata.if_agc_polarity = config->if_agc_polarity;
525 pdata.spec_inv = config->spec_inv;
526 pdata.gpio_chip_base = &gpio_chip_base;
527 pdata.attach_in_use = true;
528
529 memset(&board_info, 0, sizeof(board_info));
530 strscpy(board_info.type, "cxd2820r", I2C_NAME_SIZE);
531 board_info.addr = config->i2c_address;
532 board_info.platform_data = &pdata;
533 client = i2c_new_device(adapter, &board_info);
534 if (!client || !client->dev.driver)
535 return NULL;
536
537 return pdata.get_dvb_frontend(client);
538 }
539 EXPORT_SYMBOL(cxd2820r_attach);
540
541 static struct dvb_frontend *cxd2820r_get_dvb_frontend(struct i2c_client *client)
542 {
543 struct cxd2820r_priv *priv = i2c_get_clientdata(client);
544
545 dev_dbg(&client->dev, "\n");
546
547 return &priv->fe;
548 }
549
550 static int cxd2820r_probe(struct i2c_client *client,
551 const struct i2c_device_id *id)
552 {
553 struct cxd2820r_platform_data *pdata = client->dev.platform_data;
554 struct cxd2820r_priv *priv;
555 int ret, *gpio_chip_base;
556 unsigned int utmp;
557 static const struct regmap_range_cfg regmap_range_cfg0[] = {
558 {
559 .range_min = 0x0000,
560 .range_max = 0x3fff,
561 .selector_reg = 0x00,
562 .selector_mask = 0xff,
563 .selector_shift = 0,
564 .window_start = 0x00,
565 .window_len = 0x100,
566 },
567 };
568 static const struct regmap_range_cfg regmap_range_cfg1[] = {
569 {
570 .range_min = 0x0000,
571 .range_max = 0x01ff,
572 .selector_reg = 0x00,
573 .selector_mask = 0xff,
574 .selector_shift = 0,
575 .window_start = 0x00,
576 .window_len = 0x100,
577 },
578 };
579 static const struct regmap_config regmap_config0 = {
580 .reg_bits = 8,
581 .val_bits = 8,
582 .max_register = 0x3fff,
583 .ranges = regmap_range_cfg0,
584 .num_ranges = ARRAY_SIZE(regmap_range_cfg0),
585 .cache_type = REGCACHE_NONE,
586 };
587 static const struct regmap_config regmap_config1 = {
588 .reg_bits = 8,
589 .val_bits = 8,
590 .max_register = 0x01ff,
591 .ranges = regmap_range_cfg1,
592 .num_ranges = ARRAY_SIZE(regmap_range_cfg1),
593 .cache_type = REGCACHE_NONE,
594 };
595
596 dev_dbg(&client->dev, "\n");
597
598 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
599 if (!priv) {
600 ret = -ENOMEM;
601 goto err;
602 }
603
604 priv->client[0] = client;
605 priv->fe.demodulator_priv = priv;
606 priv->i2c = client->adapter;
607 priv->ts_mode = pdata->ts_mode;
608 priv->ts_clk_inv = pdata->ts_clk_inv;
609 priv->if_agc_polarity = pdata->if_agc_polarity;
610 priv->spec_inv = pdata->spec_inv;
611 gpio_chip_base = *pdata->gpio_chip_base;
612 priv->regmap[0] = regmap_init_i2c(priv->client[0], ®map_config0);
613 if (IS_ERR(priv->regmap[0])) {
614 ret = PTR_ERR(priv->regmap[0]);
615 goto err_kfree;
616 }
617
618
619 ret = regmap_read(priv->regmap[0], 0x00fd, &utmp);
620 if (ret)
621 goto err_regmap_0_regmap_exit;
622
623 dev_dbg(&client->dev, "chip_id=%02x\n", utmp);
624
625 if (utmp != 0xe1) {
626 ret = -ENODEV;
627 goto err_regmap_0_regmap_exit;
628 }
629
630
631
632
633
634
635 priv->client[1] = i2c_new_dummy_device(client->adapter, client->addr | (1 << 1));
636 if (IS_ERR(priv->client[1])) {
637 ret = PTR_ERR(priv->client[1]);
638 dev_err(&client->dev, "I2C registration failed\n");
639 goto err_regmap_0_regmap_exit;
640 }
641
642 priv->regmap[1] = regmap_init_i2c(priv->client[1], ®map_config1);
643 if (IS_ERR(priv->regmap[1])) {
644 ret = PTR_ERR(priv->regmap[1]);
645 goto err_client_1_i2c_unregister_device;
646 }
647
648 if (gpio_chip_base) {
649 #ifdef CONFIG_GPIOLIB
650
651 priv->gpio_chip.label = KBUILD_MODNAME;
652 priv->gpio_chip.parent = &client->dev;
653 priv->gpio_chip.owner = THIS_MODULE;
654 priv->gpio_chip.direction_output = cxd2820r_gpio_direction_output;
655 priv->gpio_chip.set = cxd2820r_gpio_set;
656 priv->gpio_chip.get = cxd2820r_gpio_get;
657 priv->gpio_chip.base = -1;
658 priv->gpio_chip.ngpio = GPIO_COUNT;
659 priv->gpio_chip.can_sleep = 1;
660 ret = gpiochip_add_data(&priv->gpio_chip, priv);
661 if (ret)
662 goto err_regmap_1_regmap_exit;
663
664 dev_dbg(&client->dev, "gpio_chip.base=%d\n",
665 priv->gpio_chip.base);
666
667 *gpio_chip_base = priv->gpio_chip.base;
668 #else
669
670
671
672
673 u8 gpio[GPIO_COUNT];
674 gpio[0] = (*gpio_chip_base >> 0) & 0x07;
675 gpio[1] = (*gpio_chip_base >> 3) & 0x07;
676 gpio[2] = 0;
677 ret = cxd2820r_gpio(&priv->fe, gpio);
678 if (ret)
679 goto err_regmap_1_regmap_exit;
680 #endif
681 }
682
683
684 memcpy(&priv->fe.ops, &cxd2820r_ops, sizeof(priv->fe.ops));
685 if (!pdata->attach_in_use)
686 priv->fe.ops.release = NULL;
687 i2c_set_clientdata(client, priv);
688
689
690 pdata->get_dvb_frontend = cxd2820r_get_dvb_frontend;
691
692 dev_info(&client->dev, "Sony CXD2820R successfully identified\n");
693
694 return 0;
695 err_regmap_1_regmap_exit:
696 regmap_exit(priv->regmap[1]);
697 err_client_1_i2c_unregister_device:
698 i2c_unregister_device(priv->client[1]);
699 err_regmap_0_regmap_exit:
700 regmap_exit(priv->regmap[0]);
701 err_kfree:
702 kfree(priv);
703 err:
704 dev_dbg(&client->dev, "failed=%d\n", ret);
705 return ret;
706 }
707
708 static int cxd2820r_remove(struct i2c_client *client)
709 {
710 struct cxd2820r_priv *priv = i2c_get_clientdata(client);
711
712 dev_dbg(&client->dev, "\n");
713
714 #ifdef CONFIG_GPIOLIB
715 if (priv->gpio_chip.label)
716 gpiochip_remove(&priv->gpio_chip);
717 #endif
718 regmap_exit(priv->regmap[1]);
719 i2c_unregister_device(priv->client[1]);
720
721 regmap_exit(priv->regmap[0]);
722
723 kfree(priv);
724
725 return 0;
726 }
727
728 static const struct i2c_device_id cxd2820r_id_table[] = {
729 {"cxd2820r", 0},
730 {}
731 };
732 MODULE_DEVICE_TABLE(i2c, cxd2820r_id_table);
733
734 static struct i2c_driver cxd2820r_driver = {
735 .driver = {
736 .name = "cxd2820r",
737 .suppress_bind_attrs = true,
738 },
739 .probe = cxd2820r_probe,
740 .remove = cxd2820r_remove,
741 .id_table = cxd2820r_id_table,
742 };
743
744 module_i2c_driver(cxd2820r_driver);
745
746 MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
747 MODULE_DESCRIPTION("Sony CXD2820R demodulator driver");
748 MODULE_LICENSE("GPL");