root/drivers/media/dvb-frontends/bsbe1.h

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INCLUDED FROM


DEFINITIONS

This source file includes following definitions.
  1. alps_bsbe1_set_symbol_rate
  2. alps_bsbe1_tuner_set_params

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2 /*
   3  * bsbe1.h - ALPS BSBE1 tuner support
   4  *
   5  * the project's page is at https://linuxtv.org
   6  */
   7 
   8 #ifndef BSBE1_H
   9 #define BSBE1_H
  10 
  11 static u8 alps_bsbe1_inittab[] = {
  12         0x01, 0x15,   /* XTAL = 4MHz, VCO = 352 MHz */
  13         0x02, 0x30,   /* MCLK = 88 MHz */
  14         0x03, 0x00,   /* ACR output 0 */
  15         0x04, 0x7d,   /* F22FR = 0x7d, F22 = f_VCO / 128 / 0x7d = 22 kHz */
  16         0x05, 0x05,   /* I2CT = 0, SCLT = 1, SDAT = 1 */
  17         0x06, 0x00,   /* DAC output 0 */
  18         0x08, 0x40,   /* DiSEqC off, LNB power on OP2/LOCK pin on */
  19         0x09, 0x00,   /* FIFO */
  20         0x0c, 0x51,   /* OP1/OP0 normal, val = 1 (LNB power on) */
  21         0x0d, 0x82,   /* DC offset compensation = on, beta_agc1 = 2 */
  22         0x0f, 0x92,   /* AGC1R */
  23         0x10, 0x34,   /* AGC2O */
  24         0x11, 0x84,   /* TLSR */
  25         0x12, 0xb9,   /* CFD */
  26         0x15, 0xc9,   /* lock detector threshold */
  27         0x28, 0x00,   /* out imp: normal, type: parallel, FEC mode: QPSK */
  28         0x33, 0xfc,   /* RS control */
  29         0x34, 0x93,   /* count viterbi bit errors per 2E18 bytes */
  30         0xff, 0xff
  31 };
  32 
  33 
  34 static int alps_bsbe1_set_symbol_rate(struct dvb_frontend* fe, u32 srate, u32 ratio)
  35 {
  36         u8 aclk = 0;
  37         u8 bclk = 0;
  38 
  39         if (srate < 1500000) { aclk = 0xb7; bclk = 0x47; }
  40         else if (srate < 3000000) { aclk = 0xb7; bclk = 0x4b; }
  41         else if (srate < 7000000) { aclk = 0xb7; bclk = 0x4f; }
  42         else if (srate < 14000000) { aclk = 0xb7; bclk = 0x53; }
  43         else if (srate < 30000000) { aclk = 0xb6; bclk = 0x53; }
  44         else if (srate < 45000000) { aclk = 0xb4; bclk = 0x51; }
  45 
  46         stv0299_writereg(fe, 0x13, aclk);
  47         stv0299_writereg(fe, 0x14, bclk);
  48         stv0299_writereg(fe, 0x1f, (ratio >> 16) & 0xff);
  49         stv0299_writereg(fe, 0x20, (ratio >>  8) & 0xff);
  50         stv0299_writereg(fe, 0x21, (ratio      ) & 0xf0);
  51 
  52         return 0;
  53 }
  54 
  55 static int alps_bsbe1_tuner_set_params(struct dvb_frontend *fe)
  56 {
  57         struct dtv_frontend_properties *p = &fe->dtv_property_cache;
  58         int ret;
  59         u8 data[4];
  60         u32 div;
  61         struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) };
  62         struct i2c_adapter *i2c = fe->tuner_priv;
  63 
  64         if ((p->frequency < 950000) || (p->frequency > 2150000))
  65                 return -EINVAL;
  66 
  67         div = p->frequency / 1000;
  68         data[0] = (div >> 8) & 0x7f;
  69         data[1] = div & 0xff;
  70         data[2] = 0x80 | ((div & 0x18000) >> 10) | 0x1;
  71         data[3] = 0xe0;
  72 
  73         if (fe->ops.i2c_gate_ctrl)
  74                 fe->ops.i2c_gate_ctrl(fe, 1);
  75         ret = i2c_transfer(i2c, &msg, 1);
  76         return (ret != 1) ? -EIO : 0;
  77 }
  78 
  79 static struct stv0299_config alps_bsbe1_config = {
  80         .demod_address = 0x68,
  81         .inittab = alps_bsbe1_inittab,
  82         .mclk = 88000000UL,
  83         .invert = 1,
  84         .skip_reinit = 0,
  85         .min_delay_ms = 100,
  86         .set_symbol_rate = alps_bsbe1_set_symbol_rate,
  87 };
  88 
  89 #endif

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