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8 #ifndef TDA10071_PRIV
9 #define TDA10071_PRIV
10
11 #include <media/dvb_frontend.h>
12 #include "tda10071.h"
13 #include <linux/firmware.h>
14 #include <linux/regmap.h>
15
16 struct tda10071_dev {
17 struct dvb_frontend fe;
18 struct i2c_client *client;
19 struct regmap *regmap;
20 struct mutex cmd_execute_mutex;
21 u32 clk;
22 u16 i2c_wr_max;
23 u8 ts_mode;
24 bool spec_inv;
25 u8 pll_multiplier;
26 u8 tuner_i2c_addr;
27
28 u8 meas_count;
29 u32 dvbv3_ber;
30 enum fe_status fe_status;
31 enum fe_delivery_system delivery_system;
32 bool warm;
33 u64 post_bit_error;
34 u64 block_error;
35 };
36
37 static struct tda10071_modcod {
38 enum fe_delivery_system delivery_system;
39 enum fe_modulation modulation;
40 enum fe_code_rate fec;
41 u8 val;
42 } TDA10071_MODCOD[] = {
43
44 { SYS_DVBS2, QPSK, FEC_AUTO, 0x00 },
45 { SYS_DVBS2, QPSK, FEC_1_2, 0x04 },
46 { SYS_DVBS2, QPSK, FEC_3_5, 0x05 },
47 { SYS_DVBS2, QPSK, FEC_2_3, 0x06 },
48 { SYS_DVBS2, QPSK, FEC_3_4, 0x07 },
49 { SYS_DVBS2, QPSK, FEC_4_5, 0x08 },
50 { SYS_DVBS2, QPSK, FEC_5_6, 0x09 },
51 { SYS_DVBS2, QPSK, FEC_8_9, 0x0a },
52 { SYS_DVBS2, QPSK, FEC_9_10, 0x0b },
53
54 { SYS_DVBS2, PSK_8, FEC_AUTO, 0x00 },
55 { SYS_DVBS2, PSK_8, FEC_3_5, 0x0c },
56 { SYS_DVBS2, PSK_8, FEC_2_3, 0x0d },
57 { SYS_DVBS2, PSK_8, FEC_3_4, 0x0e },
58 { SYS_DVBS2, PSK_8, FEC_5_6, 0x0f },
59 { SYS_DVBS2, PSK_8, FEC_8_9, 0x10 },
60 { SYS_DVBS2, PSK_8, FEC_9_10, 0x11 },
61
62 { SYS_DVBS, QPSK, FEC_AUTO, 0x2d },
63 { SYS_DVBS, QPSK, FEC_1_2, 0x2e },
64 { SYS_DVBS, QPSK, FEC_2_3, 0x2f },
65 { SYS_DVBS, QPSK, FEC_3_4, 0x30 },
66 { SYS_DVBS, QPSK, FEC_5_6, 0x31 },
67 { SYS_DVBS, QPSK, FEC_7_8, 0x32 },
68 };
69
70 struct tda10071_reg_val_mask {
71 u8 reg;
72 u8 val;
73 u8 mask;
74 };
75
76
77 #define TDA10071_FIRMWARE "dvb-fe-tda10071.fw"
78
79
80 #define CMD_DEMOD_INIT 0x10
81 #define CMD_CHANGE_CHANNEL 0x11
82 #define CMD_MPEG_CONFIG 0x13
83 #define CMD_TUNER_INIT 0x15
84 #define CMD_GET_AGCACC 0x1a
85
86 #define CMD_LNB_CONFIG 0x20
87 #define CMD_LNB_SEND_DISEQC 0x21
88 #define CMD_LNB_SET_DC_LEVEL 0x22
89 #define CMD_LNB_PCB_CONFIG 0x23
90 #define CMD_LNB_SEND_TONEBURST 0x24
91 #define CMD_LNB_UPDATE_REPLY 0x25
92
93 #define CMD_GET_FW_VERSION 0x35
94 #define CMD_SET_SLEEP_MODE 0x36
95 #define CMD_BER_CONTROL 0x3e
96 #define CMD_BER_UPDATE_COUNTERS 0x3f
97
98
99 #define TDA10071_ARGLEN 30
100 struct tda10071_cmd {
101 u8 args[TDA10071_ARGLEN];
102 u8 len;
103 };
104
105
106 #endif