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9 #ifndef __ASM_MACH_IP27_KERNEL_ENTRY_H
10 #define __ASM_MACH_IP27_KERNEL_ENTRY_H
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12 #include <asm/sn/addrs.h>
13 #include <asm/sn/sn0/hubni.h>
14 #include <asm/sn/klkernvars.h>
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19 .macro GET_NASID_ASM res
20 dli \res, LOCAL_HUB_ADDR(NI_STATUS_REV_ID)
21 ld \res, (\res)
22 and \res, NSRI_NODEID_MASK
23 dsrl \res, NSRI_NODEID_SHFT
24 .endm
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29 #define PAGE_GLOBAL (1 << 6)
30 #define PAGE_VALID (1 << 7)
31 #define PAGE_DIRTY (1 << 8)
32 #define CACHE_CACHABLE_COW (5 << 9)
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36
37 .macro MAPPED_KERNEL_SETUP_TLB
38 #ifdef CONFIG_MAPPED_KERNEL
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43
44 dli t0, 0xffffffffc0000000
45 dmtc0 t0, CP0_ENTRYHI
46 li t0, 0x1c000 # Offset of text into node memory
47 dsll t1, NASID_SHFT # Shift text nasid into place
48 dsll t2, NASID_SHFT # Same for data nasid
49 or t1, t1, t0 # Physical load address of kernel text
50 or t2, t2, t0 # Physical load address of kernel data
51 dsrl t1, 12 # 4K pfn
52 dsrl t2, 12 # 4K pfn
53 dsll t1, 6 # Get pfn into place
54 dsll t2, 6 # Get pfn into place
55 li t0, ((PAGE_GLOBAL | PAGE_VALID | CACHE_CACHABLE_COW) >> 6)
56 or t0, t0, t1
57 mtc0 t0, CP0_ENTRYLO0 # physaddr, VG, cach exlwr
58 li t0, ((PAGE_GLOBAL | PAGE_VALID | PAGE_DIRTY | CACHE_CACHABLE_COW) >> 6)
59 or t0, t0, t2
60 mtc0 t0, CP0_ENTRYLO1 # physaddr, DVG, cach exlwr
61 li t0, 0x1ffe000 # MAPPED_KERN_TLBMASK, TLBPGMASK_16M
62 mtc0 t0, CP0_PAGEMASK
63 li t0, 0 # KMAP_INX
64 mtc0 t0, CP0_INDEX
65 li t0, 1
66 mtc0 t0, CP0_WIRED
67 tlbwi
68 #else
69 mtc0 zero, CP0_WIRED
70 #endif
71 .endm
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77 .macro kernel_entry_setup
78 GET_NASID_ASM t1
79 move t2, t1 # text and data are here
80 MAPPED_KERNEL_SETUP_TLB
81 .endm
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86 .macro smp_slave_setup
87 GET_NASID_ASM t1
88 dli t0, KLDIR_OFFSET + (KLI_KERN_VARS * KLDIR_ENT_SIZE) + \
89 KLDIR_OFF_POINTER + CAC_BASE
90 dsll t1, NASID_SHFT
91 or t0, t0, t1
92 ld t0, 0(t0) # t0 points to kern_vars struct
93 lh t1, KV_RO_NASID_OFFSET(t0)
94 lh t2, KV_RW_NASID_OFFSET(t0)
95 MAPPED_KERNEL_SETUP_TLB
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101 PTR_LA t0, 0f
102 jr t0
103 0:
104 .endm
105
106 #endif