root/drivers/media/usb/cpia2/cpia2_registers.h

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   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2 /****************************************************************************
   3  *
   4  *  Filename: cpia2registers.h
   5  *
   6  *  Copyright 2001, STMicrolectronics, Inc.
   7  *
   8  *  Description:
   9  *     Definitions for the CPia2 register set
  10  *
  11  ****************************************************************************/
  12 
  13 #ifndef CPIA2_REGISTER_HEADER
  14 #define CPIA2_REGISTER_HEADER
  15 
  16 /***
  17  * System register set (Bank 0)
  18  ***/
  19 #define CPIA2_SYSTEM_DEVICE_HI                     0x00
  20 #define CPIA2_SYSTEM_DEVICE_LO                     0x01
  21 
  22 #define CPIA2_SYSTEM_SYSTEM_CONTROL                0x02
  23 #define CPIA2_SYSTEM_CONTROL_LOW_POWER       0x00
  24 #define CPIA2_SYSTEM_CONTROL_HIGH_POWER      0x01
  25 #define CPIA2_SYSTEM_CONTROL_SUSPEND         0x02
  26 #define CPIA2_SYSTEM_CONTROL_V2W_ERR         0x10
  27 #define CPIA2_SYSTEM_CONTROL_RB_ERR          0x10
  28 #define CPIA2_SYSTEM_CONTROL_CLEAR_ERR       0x80
  29 
  30 #define CPIA2_SYSTEM_INT_PACKET_CTRL                0x04
  31 #define CPIA2_SYSTEM_INT_PACKET_CTRL_ENABLE_SW_XX 0x01
  32 #define CPIA2_SYSTEM_INT_PACKET_CTRL_ENABLE_EOF   0x02
  33 #define CPIA2_SYSTEM_INT_PACKET_CTRL_ENABLE_INT1  0x04
  34 
  35 #define CPIA2_SYSTEM_CACHE_CTRL                     0x05
  36 #define CPIA2_SYSTEM_CACHE_CTRL_CACHE_RESET      0x01
  37 #define CPIA2_SYSTEM_CACHE_CTRL_CACHE_FLUSH      0x02
  38 
  39 #define CPIA2_SYSTEM_SERIAL_CTRL                    0x06
  40 #define CPIA2_SYSTEM_SERIAL_CTRL_NULL_CMD        0x00
  41 #define CPIA2_SYSTEM_SERIAL_CTRL_START_CMD       0x01
  42 #define CPIA2_SYSTEM_SERIAL_CTRL_STOP_CMD        0x02
  43 #define CPIA2_SYSTEM_SERIAL_CTRL_WRITE_CMD       0x03
  44 #define CPIA2_SYSTEM_SERIAL_CTRL_READ_ACK_CMD    0x04
  45 #define CPIA2_SYSTEM_SERIAL_CTRL_READ_NACK_CMD   0x05
  46 
  47 #define CPIA2_SYSTEM_SERIAL_DATA                     0x07
  48 
  49 #define CPIA2_SYSTEM_VP_SERIAL_ADDR                  0x08
  50 
  51 /***
  52  * I2C addresses for various devices in CPiA2
  53  ***/
  54 #define CPIA2_SYSTEM_VP_SERIAL_ADDR_SENSOR           0x20
  55 #define CPIA2_SYSTEM_VP_SERIAL_ADDR_VP               0x88
  56 #define CPIA2_SYSTEM_VP_SERIAL_ADDR_676_VP           0x8A
  57 
  58 #define CPIA2_SYSTEM_SPARE_REG1                      0x09
  59 #define CPIA2_SYSTEM_SPARE_REG2                      0x0A
  60 #define CPIA2_SYSTEM_SPARE_REG3                      0x0B
  61 
  62 #define CPIA2_SYSTEM_MC_PORT_0                       0x0C
  63 #define CPIA2_SYSTEM_MC_PORT_1                       0x0D
  64 #define CPIA2_SYSTEM_MC_PORT_2                       0x0E
  65 #define CPIA2_SYSTEM_MC_PORT_3                       0x0F
  66 
  67 #define CPIA2_SYSTEM_STATUS_PKT                      0x20
  68 #define CPIA2_SYSTEM_STATUS_PKT_END                  0x27
  69 
  70 #define CPIA2_SYSTEM_DESCRIP_VID_HI                  0x30
  71 #define CPIA2_SYSTEM_DESCRIP_VID_LO                  0x31
  72 #define CPIA2_SYSTEM_DESCRIP_PID_HI                  0x32
  73 #define CPIA2_SYSTEM_DESCRIP_PID_LO                  0x33
  74 
  75 #define CPIA2_SYSTEM_FW_VERSION_HI                   0x34
  76 #define CPIA2_SYSTEM_FW_VERSION_LO                   0x35
  77 
  78 #define CPIA2_SYSTEM_CACHE_START_INDEX               0x80
  79 #define CPIA2_SYSTEM_CACHE_MAX_WRITES                0x10
  80 
  81 /***
  82  * VC register set (Bank 1)
  83  ***/
  84 #define CPIA2_VC_ASIC_ID                 0x80
  85 
  86 #define CPIA2_VC_ASIC_REV                0x81
  87 
  88 #define CPIA2_VC_PW_CTRL                 0x82
  89 #define CPIA2_VC_PW_CTRL_COLDSTART      0x01
  90 #define CPIA2_VC_PW_CTRL_CP_CLK_EN      0x02
  91 #define CPIA2_VC_PW_CTRL_VP_RESET_N     0x04
  92 #define CPIA2_VC_PW_CTRL_VC_CLK_EN      0x08
  93 #define CPIA2_VC_PW_CTRL_VC_RESET_N     0x10
  94 #define CPIA2_VC_PW_CTRL_GOTO_SUSPEND   0x20
  95 #define CPIA2_VC_PW_CTRL_UDC_SUSPEND    0x40
  96 #define CPIA2_VC_PW_CTRL_PWR_DOWN       0x80
  97 
  98 #define CPIA2_VC_WAKEUP                   0x83
  99 #define CPIA2_VC_WAKEUP_SW_ENABLE       0x01
 100 #define CPIA2_VC_WAKEUP_XX_ENABLE       0x02
 101 #define CPIA2_VC_WAKEUP_SW_ATWAKEUP     0x04
 102 #define CPIA2_VC_WAKEUP_XX_ATWAKEUP     0x08
 103 
 104 #define CPIA2_VC_CLOCK_CTRL               0x84
 105 #define CPIA2_VC_CLOCK_CTRL_TESTUP72    0x01
 106 
 107 #define CPIA2_VC_INT_ENABLE                0x88
 108 #define CPIA2_VC_INT_ENABLE_XX_IE       0x01
 109 #define CPIA2_VC_INT_ENABLE_SW_IE       0x02
 110 #define CPIA2_VC_INT_ENABLE_VC_IE       0x04
 111 #define CPIA2_VC_INT_ENABLE_USBDATA_IE  0x08
 112 #define CPIA2_VC_INT_ENABLE_USBSETUP_IE 0x10
 113 #define CPIA2_VC_INT_ENABLE_USBCFG_IE   0x20
 114 
 115 #define CPIA2_VC_INT_FLAG                  0x89
 116 #define CPIA2_VC_INT_ENABLE_XX_FLAG       0x01
 117 #define CPIA2_VC_INT_ENABLE_SW_FLAG       0x02
 118 #define CPIA2_VC_INT_ENABLE_VC_FLAG       0x04
 119 #define CPIA2_VC_INT_ENABLE_USBDATA_FLAG  0x08
 120 #define CPIA2_VC_INT_ENABLE_USBSETUP_FLAG 0x10
 121 #define CPIA2_VC_INT_ENABLE_USBCFG_FLAG   0x20
 122 #define CPIA2_VC_INT_ENABLE_SET_RESET_BIT 0x80
 123 
 124 #define CPIA2_VC_INT_STATE                 0x8A
 125 #define CPIA2_VC_INT_STATE_XX_STATE     0x01
 126 #define CPIA2_VC_INT_STATE_SW_STATE     0x02
 127 
 128 #define CPIA2_VC_MP_DIR                    0x90
 129 #define CPIA2_VC_MP_DIR_INPUT           0x00
 130 #define CPIA2_VC_MP_DIR_OUTPUT          0x01
 131 
 132 #define CPIA2_VC_MP_DATA                   0x91
 133 
 134 #define CPIA2_VC_DP_CTRL                   0x98
 135 #define CPIA2_VC_DP_CTRL_MODE_0         0x00
 136 #define CPIA2_VC_DP_CTRL_MODE_A         0x01
 137 #define CPIA2_VC_DP_CTRL_MODE_B         0x02
 138 #define CPIA2_VC_DP_CTRL_MODE_C         0x03
 139 #define CPIA2_VC_DP_CTRL_FAKE_FST       0x04
 140 
 141 #define CPIA2_VC_AD_CTRL                   0x99
 142 #define CPIA2_VC_AD_CTRL_SRC_0          0x00
 143 #define CPIA2_VC_AD_CTRL_SRC_DIGI_A     0x01
 144 #define CPIA2_VC_AD_CTRL_SRC_REG        0x02
 145 #define CPIA2_VC_AD_CTRL_DST_USB        0x00
 146 #define CPIA2_VC_AD_CTRL_DST_REG        0x04
 147 
 148 #define CPIA2_VC_AD_TEST_IN                0x9B
 149 
 150 #define CPIA2_VC_AD_TEST_OUT               0x9C
 151 
 152 #define CPIA2_VC_AD_STATUS                 0x9D
 153 #define CPIA2_VC_AD_STATUS_EMPTY        0x01
 154 #define CPIA2_VC_AD_STATUS_FULL         0x02
 155 
 156 #define CPIA2_VC_DP_DATA                   0x9E
 157 
 158 #define CPIA2_VC_ST_CTRL                   0xA0
 159 #define CPIA2_VC_ST_CTRL_SRC_VC         0x00
 160 #define CPIA2_VC_ST_CTRL_SRC_DP         0x01
 161 #define CPIA2_VC_ST_CTRL_SRC_REG        0x02
 162 
 163 #define CPIA2_VC_ST_CTRL_RAW_SELECT     0x04
 164 
 165 #define CPIA2_VC_ST_CTRL_DST_USB        0x00
 166 #define CPIA2_VC_ST_CTRL_DST_DP         0x08
 167 #define CPIA2_VC_ST_CTRL_DST_REG        0x10
 168 
 169 #define CPIA2_VC_ST_CTRL_FIFO_ENABLE    0x20
 170 #define CPIA2_VC_ST_CTRL_EOF_DETECT     0x40
 171 
 172 #define CPIA2_VC_ST_TEST                   0xA1
 173 #define CPIA2_VC_ST_TEST_MODE_MANUAL    0x00
 174 #define CPIA2_VC_ST_TEST_MODE_INCREMENT 0x02
 175 
 176 #define CPIA2_VC_ST_TEST_AUTO_FILL      0x08
 177 
 178 #define CPIA2_VC_ST_TEST_REPEAT_FIFO    0x10
 179 
 180 #define CPIA2_VC_ST_TEST_IN                0xA2
 181 
 182 #define CPIA2_VC_ST_TEST_OUT               0xA3
 183 
 184 #define CPIA2_VC_ST_STATUS                 0xA4
 185 #define CPIA2_VC_ST_STATUS_EMPTY        0x01
 186 #define CPIA2_VC_ST_STATUS_FULL         0x02
 187 
 188 #define CPIA2_VC_ST_FRAME_DETECT_1         0xA5
 189 
 190 #define CPIA2_VC_ST_FRAME_DETECT_2         0xA6
 191 
 192 #define CPIA2_VC_USB_CTRL                    0xA8
 193 #define CPIA2_VC_USB_CTRL_CMD_STALLED      0x01
 194 #define CPIA2_VC_USB_CTRL_CMD_READY        0x02
 195 #define CPIA2_VC_USB_CTRL_CMD_STATUS       0x04
 196 #define CPIA2_VC_USB_CTRL_CMD_STATUS_DIR   0x08
 197 #define CPIA2_VC_USB_CTRL_CMD_NO_CLASH     0x10
 198 #define CPIA2_VC_USB_CTRL_CMD_MICRO_ACCESS 0x80
 199 
 200 #define CPIA2_VC_USB_STRM                  0xA9
 201 #define CPIA2_VC_USB_STRM_ISO_ENABLE    0x01
 202 #define CPIA2_VC_USB_STRM_BLK_ENABLE    0x02
 203 #define CPIA2_VC_USB_STRM_INT_ENABLE    0x04
 204 #define CPIA2_VC_USB_STRM_AUD_ENABLE    0x08
 205 
 206 #define CPIA2_VC_USB_STATUS                   0xAA
 207 #define CPIA2_VC_USB_STATUS_CMD_IN_PROGRESS  0x01
 208 #define CPIA2_VC_USB_STATUS_CMD_STATUS_STALL 0x02
 209 #define CPIA2_VC_USB_STATUS_CMD_HANDSHAKE    0x04
 210 #define CPIA2_VC_USB_STATUS_CMD_OVERRIDE     0x08
 211 #define CPIA2_VC_USB_STATUS_CMD_FIFO_BUSY    0x10
 212 #define CPIA2_VC_USB_STATUS_BULK_REPEAT_TXN  0x20
 213 #define CPIA2_VC_USB_STATUS_CONFIG_DONE      0x40
 214 #define CPIA2_VC_USB_STATUS_USB_SUSPEND      0x80
 215 
 216 #define CPIA2_VC_USB_CMDW                   0xAB
 217 
 218 #define CPIA2_VC_USB_DATARW                 0xAC
 219 
 220 #define CPIA2_VC_USB_INFO                   0xAD
 221 
 222 #define CPIA2_VC_USB_CONFIG                 0xAE
 223 
 224 #define CPIA2_VC_USB_SETTINGS                  0xAF
 225 #define CPIA2_VC_USB_SETTINGS_CONFIG_MASK    0x03
 226 #define CPIA2_VC_USB_SETTINGS_INTERFACE_MASK 0x0C
 227 #define CPIA2_VC_USB_SETTINGS_ALTERNATE_MASK 0x70
 228 
 229 #define CPIA2_VC_USB_ISOLIM                  0xB0
 230 
 231 #define CPIA2_VC_USB_ISOFAILS                0xB1
 232 
 233 #define CPIA2_VC_USB_ISOMAXPKTHI             0xB2
 234 
 235 #define CPIA2_VC_USB_ISOMAXPKTLO             0xB3
 236 
 237 #define CPIA2_VC_V2W_CTRL                    0xB8
 238 #define CPIA2_VC_V2W_SELECT               0x01
 239 
 240 #define CPIA2_VC_V2W_SCL                     0xB9
 241 
 242 #define CPIA2_VC_V2W_SDA                     0xBA
 243 
 244 #define CPIA2_VC_VC_CTRL                     0xC0
 245 #define CPIA2_VC_VC_CTRL_RUN              0x01
 246 #define CPIA2_VC_VC_CTRL_SINGLESHOT       0x02
 247 #define CPIA2_VC_VC_CTRL_IDLING           0x04
 248 #define CPIA2_VC_VC_CTRL_INHIBIT_H_TABLES 0x10
 249 #define CPIA2_VC_VC_CTRL_INHIBIT_Q_TABLES 0x20
 250 #define CPIA2_VC_VC_CTRL_INHIBIT_PRIVATE  0x40
 251 
 252 #define CPIA2_VC_VC_RESTART_IVAL_HI          0xC1
 253 
 254 #define CPIA2_VC_VC_RESTART_IVAL_LO          0xC2
 255 
 256 #define CPIA2_VC_VC_FORMAT                   0xC3
 257 #define CPIA2_VC_VC_FORMAT_UFIRST         0x01
 258 #define CPIA2_VC_VC_FORMAT_MONO           0x02
 259 #define CPIA2_VC_VC_FORMAT_DECIMATING     0x04
 260 #define CPIA2_VC_VC_FORMAT_SHORTLINE      0x08
 261 #define CPIA2_VC_VC_FORMAT_SELFTEST       0x10
 262 
 263 #define CPIA2_VC_VC_CLOCKS                         0xC4
 264 #define CPIA2_VC_VC_CLOCKS_CLKDIV_MASK        0x03
 265 #define CPIA2_VC_VC_672_CLOCKS_CIF_DIV_BY_3   0x04
 266 #define CPIA2_VC_VC_672_CLOCKS_SCALING        0x08
 267 #define CPIA2_VC_VC_CLOCKS_LOGDIV0        0x00
 268 #define CPIA2_VC_VC_CLOCKS_LOGDIV1        0x01
 269 #define CPIA2_VC_VC_CLOCKS_LOGDIV2        0x02
 270 #define CPIA2_VC_VC_CLOCKS_LOGDIV3        0x03
 271 #define CPIA2_VC_VC_676_CLOCKS_CIF_DIV_BY_3   0x08
 272 #define CPIA2_VC_VC_676_CLOCKS_SCALING        0x10
 273 
 274 #define CPIA2_VC_VC_IHSIZE_LO                0xC5
 275 
 276 #define CPIA2_VC_VC_XLIM_HI                  0xC6
 277 
 278 #define CPIA2_VC_VC_XLIM_LO                  0xC7
 279 
 280 #define CPIA2_VC_VC_YLIM_HI                  0xC8
 281 
 282 #define CPIA2_VC_VC_YLIM_LO                  0xC9
 283 
 284 #define CPIA2_VC_VC_OHSIZE                   0xCA
 285 
 286 #define CPIA2_VC_VC_OVSIZE                   0xCB
 287 
 288 #define CPIA2_VC_VC_HCROP                    0xCC
 289 
 290 #define CPIA2_VC_VC_VCROP                    0xCD
 291 
 292 #define CPIA2_VC_VC_HPHASE                   0xCE
 293 
 294 #define CPIA2_VC_VC_VPHASE                   0xCF
 295 
 296 #define CPIA2_VC_VC_HISPAN                   0xD0
 297 
 298 #define CPIA2_VC_VC_VISPAN                   0xD1
 299 
 300 #define CPIA2_VC_VC_HICROP                   0xD2
 301 
 302 #define CPIA2_VC_VC_VICROP                   0xD3
 303 
 304 #define CPIA2_VC_VC_HFRACT                   0xD4
 305 #define CPIA2_VC_VC_HFRACT_DEN_MASK       0x0F
 306 #define CPIA2_VC_VC_HFRACT_NUM_MASK       0xF0
 307 
 308 #define CPIA2_VC_VC_VFRACT                   0xD5
 309 #define CPIA2_VC_VC_VFRACT_DEN_MASK       0x0F
 310 #define CPIA2_VC_VC_VFRACT_NUM_MASK       0xF0
 311 
 312 #define CPIA2_VC_VC_JPEG_OPT                      0xD6
 313 #define CPIA2_VC_VC_JPEG_OPT_DOUBLE_SQUEEZE     0x01
 314 #define CPIA2_VC_VC_JPEG_OPT_NO_DC_AUTO_SQUEEZE 0x02
 315 #define CPIA2_VC_VC_JPEG_OPT_AUTO_SQUEEZE       0x04
 316 #define CPIA2_VC_VC_JPEG_OPT_DEFAULT      (CPIA2_VC_VC_JPEG_OPT_DOUBLE_SQUEEZE|\
 317                                            CPIA2_VC_VC_JPEG_OPT_AUTO_SQUEEZE)
 318 
 319 
 320 #define CPIA2_VC_VC_CREEP_PERIOD             0xD7
 321 #define CPIA2_VC_VC_USER_SQUEEZE             0xD8
 322 #define CPIA2_VC_VC_TARGET_KB                0xD9
 323 
 324 #define CPIA2_VC_VC_AUTO_SQUEEZE             0xE6
 325 
 326 
 327 /***
 328  * VP register set (Bank 2)
 329  ***/
 330 #define CPIA2_VP_DEVICEH                             0
 331 #define CPIA2_VP_DEVICEL                             1
 332 
 333 #define CPIA2_VP_SYSTEMSTATE                         0x02
 334 #define CPIA2_VP_SYSTEMSTATE_HK_ALIVE             0x01
 335 
 336 #define CPIA2_VP_SYSTEMCTRL                          0x03
 337 #define CPIA2_VP_SYSTEMCTRL_REQ_CLEAR_ERROR       0x80
 338 #define CPIA2_VP_SYSTEMCTRL_POWER_DOWN_PLL        0x20
 339 #define CPIA2_VP_SYSTEMCTRL_REQ_SUSPEND_STATE     0x10
 340 #define CPIA2_VP_SYSTEMCTRL_REQ_SERIAL_WAKEUP     0x08
 341 #define CPIA2_VP_SYSTEMCTRL_REQ_AUTOLOAD          0x04
 342 #define CPIA2_VP_SYSTEMCTRL_HK_CONTROL            0x02
 343 #define CPIA2_VP_SYSTEMCTRL_POWER_CONTROL         0x01
 344 
 345 #define CPIA2_VP_SENSOR_FLAGS                        0x05
 346 #define CPIA2_VP_SENSOR_FLAGS_404                 0x01
 347 #define CPIA2_VP_SENSOR_FLAGS_407                 0x02
 348 #define CPIA2_VP_SENSOR_FLAGS_409                 0x04
 349 #define CPIA2_VP_SENSOR_FLAGS_410                 0x08
 350 #define CPIA2_VP_SENSOR_FLAGS_500                 0x10
 351 
 352 #define CPIA2_VP_SENSOR_REV                          0x06
 353 
 354 #define CPIA2_VP_DEVICE_CONFIG                       0x07
 355 #define CPIA2_VP_DEVICE_CONFIG_SERIAL_BRIDGE      0x01
 356 
 357 #define CPIA2_VP_GPIO_DIRECTION                      0x08
 358 #define CPIA2_VP_GPIO_READ                        0xFF
 359 #define CPIA2_VP_GPIO_WRITE                       0x00
 360 
 361 #define CPIA2_VP_GPIO_DATA                           0x09
 362 
 363 #define CPIA2_VP_RAM_ADDR_H                          0x0A
 364 #define CPIA2_VP_RAM_ADDR_L                          0x0B
 365 #define CPIA2_VP_RAM_DATA                            0x0C
 366 
 367 #define CPIA2_VP_PATCH_REV                           0x0F
 368 
 369 #define CPIA2_VP4_USER_MODE                           0x10
 370 #define CPIA2_VP5_USER_MODE                           0x13
 371 #define CPIA2_VP_USER_MODE_CIF                    0x01
 372 #define CPIA2_VP_USER_MODE_QCIFDS                 0x02
 373 #define CPIA2_VP_USER_MODE_QCIFPTC                0x04
 374 #define CPIA2_VP_USER_MODE_QVGADS                 0x08
 375 #define CPIA2_VP_USER_MODE_QVGAPTC                0x10
 376 #define CPIA2_VP_USER_MODE_VGA                    0x20
 377 
 378 #define CPIA2_VP4_FRAMERATE_REQUEST                    0x11
 379 #define CPIA2_VP5_FRAMERATE_REQUEST                    0x14
 380 #define CPIA2_VP_FRAMERATE_60                     0x80
 381 #define CPIA2_VP_FRAMERATE_50                     0x40
 382 #define CPIA2_VP_FRAMERATE_30                     0x20
 383 #define CPIA2_VP_FRAMERATE_25                     0x10
 384 #define CPIA2_VP_FRAMERATE_15                     0x08
 385 #define CPIA2_VP_FRAMERATE_12_5                   0x04
 386 #define CPIA2_VP_FRAMERATE_7_5                    0x02
 387 #define CPIA2_VP_FRAMERATE_6_25                   0x01
 388 
 389 #define CPIA2_VP4_USER_EFFECTS                         0x12
 390 #define CPIA2_VP5_USER_EFFECTS                         0x15
 391 #define CPIA2_VP_USER_EFFECTS_COLBARS             0x01
 392 #define CPIA2_VP_USER_EFFECTS_COLBARS_GRAD        0x02
 393 #define CPIA2_VP_USER_EFFECTS_MIRROR              0x04
 394 #define CPIA2_VP_USER_EFFECTS_FLIP                0x40  // VP5 only
 395 
 396 /* NOTE: CPIA2_VP_EXPOSURE_MODES shares the same register as VP5 User
 397  * Effects */
 398 #define CPIA2_VP_EXPOSURE_MODES                       0x15
 399 #define CPIA2_VP_EXPOSURE_MODES_INHIBIT_FLICKER   0x20
 400 #define CPIA2_VP_EXPOSURE_MODES_COMPILE_EXP       0x10
 401 
 402 #define CPIA2_VP4_EXPOSURE_TARGET                     0x16    // VP4
 403 #define CPIA2_VP5_EXPOSURE_TARGET                     0x20    // VP5
 404 
 405 #define CPIA2_VP_FLICKER_MODES                        0x1B
 406 #define CPIA2_VP_FLICKER_MODES_50HZ               0x80
 407 #define CPIA2_VP_FLICKER_MODES_CUSTOM_FLT_FFREQ   0x40
 408 #define CPIA2_VP_FLICKER_MODES_NEVER_FLICKER      0x20
 409 #define CPIA2_VP_FLICKER_MODES_INHIBIT_RUB        0x10
 410 #define CPIA2_VP_FLICKER_MODES_ADJUST_LINE_FREQ   0x08
 411 #define CPIA2_VP_FLICKER_MODES_CUSTOM_INT_FFREQ   0x04
 412 
 413 #define CPIA2_VP_UMISC                                0x1D
 414 #define CPIA2_VP_UMISC_FORCE_MONO                 0x80
 415 #define CPIA2_VP_UMISC_FORCE_ID_MASK              0x40
 416 #define CPIA2_VP_UMISC_INHIBIT_AUTO_FGS           0x20
 417 #define CPIA2_VP_UMISC_INHIBIT_AUTO_DIMS          0x08
 418 #define CPIA2_VP_UMISC_OPT_FOR_SENSOR_DS          0x04
 419 #define CPIA2_VP_UMISC_INHIBIT_AUTO_MODE_INT      0x02
 420 
 421 #define CPIA2_VP5_ANTIFLKRSETUP                       0x22  //34
 422 
 423 #define CPIA2_VP_INTERPOLATION                        0x24
 424 #define CPIA2_VP_INTERPOLATION_EVEN_FIRST         0x40
 425 #define CPIA2_VP_INTERPOLATION_HJOG               0x20
 426 #define CPIA2_VP_INTERPOLATION_VJOG               0x10
 427 
 428 #define CPIA2_VP_GAMMA                                0x25
 429 #define CPIA2_VP_DEFAULT_GAMMA                    0x10
 430 
 431 #define CPIA2_VP_YRANGE                               0x26
 432 
 433 #define CPIA2_VP_SATURATION                           0x27
 434 
 435 #define CPIA2_VP5_MYBLACK_LEVEL                       0x3A   //58
 436 #define CPIA2_VP5_MCYRANGE                            0x3B   //59
 437 #define CPIA2_VP5_MYCEILING                           0x3C   //60
 438 #define CPIA2_VP5_MCUVSATURATION                      0x3D   //61
 439 
 440 
 441 #define CPIA2_VP_REHASH_VALUES                        0x60
 442 
 443 
 444 /***
 445  * Common sensor registers
 446  ***/
 447 #define CPIA2_SENSOR_DEVICE_H                         0x00
 448 #define CPIA2_SENSOR_DEVICE_L                         0x01
 449 
 450 #define CPIA2_SENSOR_DATA_FORMAT                      0x16
 451 #define CPIA2_SENSOR_DATA_FORMAT_HMIRROR      0x08
 452 #define CPIA2_SENSOR_DATA_FORMAT_VMIRROR      0x10
 453 
 454 #define CPIA2_SENSOR_CR1                              0x76
 455 #define CPIA2_SENSOR_CR1_STAND_BY             0x01
 456 #define CPIA2_SENSOR_CR1_DOWN_RAMP_GEN        0x02
 457 #define CPIA2_SENSOR_CR1_DOWN_COLUMN_ADC      0x04
 458 #define CPIA2_SENSOR_CR1_DOWN_CAB_REGULATOR   0x08
 459 #define CPIA2_SENSOR_CR1_DOWN_AUDIO_REGULATOR 0x10
 460 #define CPIA2_SENSOR_CR1_DOWN_VRT_AMP         0x20
 461 #define CPIA2_SENSOR_CR1_DOWN_BAND_GAP        0x40
 462 
 463 #endif

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