root/drivers/media/platform/s5p-g2d/g2d-hw.c

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DEFINITIONS

This source file includes following definitions.
  1. g2d_reset
  2. g2d_set_src_size
  3. g2d_set_src_addr
  4. g2d_set_dst_size
  5. g2d_set_dst_addr
  6. g2d_set_rop4
  7. g2d_set_flip
  8. g2d_set_v41_stretch
  9. g2d_set_cmd
  10. g2d_start
  11. g2d_clear_int

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * Samsung S5P G2D - 2D Graphics Accelerator Driver
   4  *
   5  * Copyright (c) 2011 Samsung Electronics Co., Ltd.
   6  * Kamil Debski, <k.debski@samsung.com>
   7  */
   8 
   9 #include <linux/io.h>
  10 
  11 #include "g2d.h"
  12 #include "g2d-regs.h"
  13 
  14 #define w(x, a) writel((x), d->regs + (a))
  15 #define r(a)    readl(d->regs + (a))
  16 
  17 /* g2d_reset clears all g2d registers */
  18 void g2d_reset(struct g2d_dev *d)
  19 {
  20         w(1, SOFT_RESET_REG);
  21 }
  22 
  23 void g2d_set_src_size(struct g2d_dev *d, struct g2d_frame *f)
  24 {
  25         u32 n;
  26 
  27         w(0, SRC_SELECT_REG);
  28         w(f->stride & 0xFFFF, SRC_STRIDE_REG);
  29 
  30         n = f->o_height & 0xFFF;
  31         n <<= 16;
  32         n |= f->o_width & 0xFFF;
  33         w(n, SRC_LEFT_TOP_REG);
  34 
  35         n = f->bottom & 0xFFF;
  36         n <<= 16;
  37         n |= f->right & 0xFFF;
  38         w(n, SRC_RIGHT_BOTTOM_REG);
  39 
  40         w(f->fmt->hw, SRC_COLOR_MODE_REG);
  41 }
  42 
  43 void g2d_set_src_addr(struct g2d_dev *d, dma_addr_t a)
  44 {
  45         w(a, SRC_BASE_ADDR_REG);
  46 }
  47 
  48 void g2d_set_dst_size(struct g2d_dev *d, struct g2d_frame *f)
  49 {
  50         u32 n;
  51 
  52         w(0, DST_SELECT_REG);
  53         w(f->stride & 0xFFFF, DST_STRIDE_REG);
  54 
  55         n = f->o_height & 0xFFF;
  56         n <<= 16;
  57         n |= f->o_width & 0xFFF;
  58         w(n, DST_LEFT_TOP_REG);
  59 
  60         n = f->bottom & 0xFFF;
  61         n <<= 16;
  62         n |= f->right & 0xFFF;
  63         w(n, DST_RIGHT_BOTTOM_REG);
  64 
  65         w(f->fmt->hw, DST_COLOR_MODE_REG);
  66 }
  67 
  68 void g2d_set_dst_addr(struct g2d_dev *d, dma_addr_t a)
  69 {
  70         w(a, DST_BASE_ADDR_REG);
  71 }
  72 
  73 void g2d_set_rop4(struct g2d_dev *d, u32 r)
  74 {
  75         w(r, ROP4_REG);
  76 }
  77 
  78 void g2d_set_flip(struct g2d_dev *d, u32 r)
  79 {
  80         w(r, SRC_MSK_DIRECT_REG);
  81 }
  82 
  83 void g2d_set_v41_stretch(struct g2d_dev *d, struct g2d_frame *src,
  84                                         struct g2d_frame *dst)
  85 {
  86         w(DEFAULT_SCALE_MODE, SRC_SCALE_CTRL_REG);
  87 
  88         /* inversed scaling factor: src is numerator */
  89         w((src->c_width << 16) / dst->c_width, SRC_XSCALE_REG);
  90         w((src->c_height << 16) / dst->c_height, SRC_YSCALE_REG);
  91 }
  92 
  93 void g2d_set_cmd(struct g2d_dev *d, u32 c)
  94 {
  95         w(c, BITBLT_COMMAND_REG);
  96 }
  97 
  98 void g2d_start(struct g2d_dev *d)
  99 {
 100         /* Clear cache */
 101         if (d->variant->hw_rev == TYPE_G2D_3X)
 102                 w(0x7, CACHECTL_REG);
 103 
 104         /* Enable interrupt */
 105         w(1, INTEN_REG);
 106         /* Start G2D engine */
 107         w(1, BITBLT_START_REG);
 108 }
 109 
 110 void g2d_clear_int(struct g2d_dev *d)
 111 {
 112         w(1, INTC_PEND_REG);
 113 }

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