root/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h

INCLUDED FROM

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 #ifndef BCM63XX_IO_H_
   3 #define BCM63XX_IO_H_
   4 
   5 #include <asm/mach-bcm63xx/bcm63xx_cpu.h>
   6 
   7 /*
   8  * Physical memory map, RAM is mapped at 0x0.
   9  *
  10  * Note that size MUST be a power of two.
  11  */
  12 #define BCM_PCMCIA_COMMON_BASE_PA       (0x20000000)
  13 #define BCM_PCMCIA_COMMON_SIZE          (16 * 1024 * 1024)
  14 #define BCM_PCMCIA_COMMON_END_PA        (BCM_PCMCIA_COMMON_BASE_PA +    \
  15                                          BCM_PCMCIA_COMMON_SIZE - 1)
  16 
  17 #define BCM_PCMCIA_ATTR_BASE_PA         (0x21000000)
  18 #define BCM_PCMCIA_ATTR_SIZE            (16 * 1024 * 1024)
  19 #define BCM_PCMCIA_ATTR_END_PA          (BCM_PCMCIA_ATTR_BASE_PA +      \
  20                                          BCM_PCMCIA_ATTR_SIZE - 1)
  21 
  22 #define BCM_PCMCIA_IO_BASE_PA           (0x22000000)
  23 #define BCM_PCMCIA_IO_SIZE              (64 * 1024)
  24 #define BCM_PCMCIA_IO_END_PA            (BCM_PCMCIA_IO_BASE_PA +        \
  25                                         BCM_PCMCIA_IO_SIZE - 1)
  26 
  27 #define BCM_PCI_MEM_BASE_PA             (0x30000000)
  28 #define BCM_PCI_MEM_SIZE                (128 * 1024 * 1024)
  29 #define BCM_PCI_MEM_END_PA              (BCM_PCI_MEM_BASE_PA +          \
  30                                         BCM_PCI_MEM_SIZE - 1)
  31 
  32 #define BCM_PCI_IO_BASE_PA              (0x08000000)
  33 #define BCM_PCI_IO_SIZE                 (64 * 1024)
  34 #define BCM_PCI_IO_END_PA               (BCM_PCI_IO_BASE_PA +           \
  35                                         BCM_PCI_IO_SIZE - 1)
  36 #define BCM_PCI_IO_HALF_PA              (BCM_PCI_IO_BASE_PA +           \
  37                                         (BCM_PCI_IO_SIZE / 2) - 1)
  38 
  39 #define BCM_CB_MEM_BASE_PA              (0x38000000)
  40 #define BCM_CB_MEM_SIZE                 (128 * 1024 * 1024)
  41 #define BCM_CB_MEM_END_PA               (BCM_CB_MEM_BASE_PA +           \
  42                                         BCM_CB_MEM_SIZE - 1)
  43 
  44 #define BCM_PCIE_MEM_BASE_PA            0x10f00000
  45 #define BCM_PCIE_MEM_SIZE               (16 * 1024 * 1024)
  46 #define BCM_PCIE_MEM_END_PA             (BCM_PCIE_MEM_BASE_PA +         \
  47                                         BCM_PCIE_MEM_SIZE - 1)
  48 
  49 /*
  50  * Internal registers are accessed through KSEG3
  51  */
  52 #define BCM_REGS_VA(x)  ((void __iomem *)(x))
  53 
  54 #define bcm_readb(a)    (*(volatile unsigned char *)    BCM_REGS_VA(a))
  55 #define bcm_readw(a)    (*(volatile unsigned short *)   BCM_REGS_VA(a))
  56 #define bcm_readl(a)    (*(volatile unsigned int *)     BCM_REGS_VA(a))
  57 #define bcm_readq(a)    (*(volatile u64 *)              BCM_REGS_VA(a))
  58 #define bcm_writeb(v, a) (*(volatile unsigned char *) BCM_REGS_VA((a)) = (v))
  59 #define bcm_writew(v, a) (*(volatile unsigned short *) BCM_REGS_VA((a)) = (v))
  60 #define bcm_writel(v, a) (*(volatile unsigned int *) BCM_REGS_VA((a)) = (v))
  61 #define bcm_writeq(v, a) (*(volatile u64 *) BCM_REGS_VA((a)) = (v))
  62 
  63 /*
  64  * IO helpers to access register set for current CPU
  65  */
  66 #define bcm_rset_readb(s, o)    bcm_readb(bcm63xx_regset_address(s) + (o))
  67 #define bcm_rset_readw(s, o)    bcm_readw(bcm63xx_regset_address(s) + (o))
  68 #define bcm_rset_readl(s, o)    bcm_readl(bcm63xx_regset_address(s) + (o))
  69 #define bcm_rset_writeb(s, v, o)        bcm_writeb((v), \
  70                                         bcm63xx_regset_address(s) + (o))
  71 #define bcm_rset_writew(s, v, o)        bcm_writew((v), \
  72                                         bcm63xx_regset_address(s) + (o))
  73 #define bcm_rset_writel(s, v, o)        bcm_writel((v), \
  74                                         bcm63xx_regset_address(s) + (o))
  75 
  76 /*
  77  * helpers for frequently used register sets
  78  */
  79 #define bcm_perf_readl(o)       bcm_rset_readl(RSET_PERF, (o))
  80 #define bcm_perf_writel(v, o)   bcm_rset_writel(RSET_PERF, (v), (o))
  81 #define bcm_timer_readl(o)      bcm_rset_readl(RSET_TIMER, (o))
  82 #define bcm_timer_writel(v, o)  bcm_rset_writel(RSET_TIMER, (v), (o))
  83 #define bcm_wdt_readl(o)        bcm_rset_readl(RSET_WDT, (o))
  84 #define bcm_wdt_writel(v, o)    bcm_rset_writel(RSET_WDT, (v), (o))
  85 #define bcm_gpio_readl(o)       bcm_rset_readl(RSET_GPIO, (o))
  86 #define bcm_gpio_writel(v, o)   bcm_rset_writel(RSET_GPIO, (v), (o))
  87 #define bcm_uart0_readl(o)      bcm_rset_readl(RSET_UART0, (o))
  88 #define bcm_uart0_writel(v, o)  bcm_rset_writel(RSET_UART0, (v), (o))
  89 #define bcm_mpi_readl(o)        bcm_rset_readl(RSET_MPI, (o))
  90 #define bcm_mpi_writel(v, o)    bcm_rset_writel(RSET_MPI, (v), (o))
  91 #define bcm_pcmcia_readl(o)     bcm_rset_readl(RSET_PCMCIA, (o))
  92 #define bcm_pcmcia_writel(v, o) bcm_rset_writel(RSET_PCMCIA, (v), (o))
  93 #define bcm_pcie_readl(o)       bcm_rset_readl(RSET_PCIE, (o))
  94 #define bcm_pcie_writel(v, o)   bcm_rset_writel(RSET_PCIE, (v), (o))
  95 #define bcm_sdram_readl(o)      bcm_rset_readl(RSET_SDRAM, (o))
  96 #define bcm_sdram_writel(v, o)  bcm_rset_writel(RSET_SDRAM, (v), (o))
  97 #define bcm_memc_readl(o)       bcm_rset_readl(RSET_MEMC, (o))
  98 #define bcm_memc_writel(v, o)   bcm_rset_writel(RSET_MEMC, (v), (o))
  99 #define bcm_ddr_readl(o)        bcm_rset_readl(RSET_DDR, (o))
 100 #define bcm_ddr_writel(v, o)    bcm_rset_writel(RSET_DDR, (v), (o))
 101 #define bcm_misc_readl(o)       bcm_rset_readl(RSET_MISC, (o))
 102 #define bcm_misc_writel(v, o)   bcm_rset_writel(RSET_MISC, (v), (o))
 103 
 104 #endif /* ! BCM63XX_IO_H_ */