drivers/infiniband/hw/i40iw/i40iw

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This source file includes following definitions.
i40iw_query_device
i40iw_query_port
i40iw_alloc_ucontext
i40iw_dealloc_ucontext
i40iw_mmap
i40iw_alloc_push_page
i40iw_dealloc_push_page
i40iw_alloc_pd
i40iw_dealloc_pd
i40iw_get_pbl
i40iw_free_qp_resources
i40iw_clean_cqes
i40iw_destroy_qp
i40iw_setup_virt_qp
i40iw_setup_kmode_qp
i40iw_create_qp
i40iw_query_qp
i40iw_hw_modify_qp
i40iw_modify_qp
cq_free_resources
i40iw_cq_wq_destroy
i40iw_destroy_cq
i40iw_create_cq
i40iw_get_user_access
i40iw_free_stag
i40iw_create_stag
i40iw_next_pbl_addr
i40iw_copy_user_pgaddrs
i40iw_check_mem_contiguous
i40iw_check_mr_contiguous
i40iw_setup_pbles
i40iw_handle_q_mem
i40iw_hw_alloc_stag
i40iw_alloc_mr
i40iw_set_page
i40iw_map_mr_sg
i40iw_drain_sq
i40iw_drain_rq
i40iw_hwreg_mr
i40iw_reg_user_mr
i40iw_reg_phys_mr
i40iw_get_dma_mr
i40iw_del_memlist
i40iw_dereg_mr
hw_rev_show
hca_type_show
board_id_show
i40iw_copy_sg_list
i40iw_post_send
i40iw_post_recv
i40iw_poll_cq
i40iw_req_notify_cq
i40iw_port_immutable
i40iw_get_dev_fw_str
i40iw_alloc_hw_stats
i40iw_get_hw_stats
i40iw_query_gid
i40iw_query_pkey
i40iw_init_rdma_device
i40iw_port_ibevent
i40iw_destroy_rdma_device
i40iw_register_rdma_device
   1 /*******************************************************************************
   2 *
   3 * Copyright (c) 2015-2016 Intel Corporation.  All rights reserved.
   4 *
   5 * This software is available to you under a choice of one of two
   6 * licenses.  You may choose to be licensed under the terms of the GNU
   7 * General Public License (GPL) Version 2, available from the file
   8 * COPYING in the main directory of this source tree, or the
   9 * OpenFabrics.org BSD license below:
  10 *
  11 *   Redistribution and use in source and binary forms, with or
  12 *   without modification, are permitted provided that the following
  13 *   conditions are met:
  14 *
  15 *    - Redistributions of source code must retain the above
  16 *       copyright notice, this list of conditions and the following
  17 *       disclaimer.
  18 *
  19 *    - Redistributions in binary form must reproduce the above
  20 *       copyright notice, this list of conditions and the following
  21 *       disclaimer in the documentation and/or other materials
  22 *       provided with the distribution.
  23 *
  24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31 * SOFTWARE.
  32 *
  33 *******************************************************************************/
  34 
  35 #include <linux/module.h>
  36 #include <linux/moduleparam.h>
  37 #include <linux/random.h>
  38 #include <linux/highmem.h>
  39 #include <linux/time.h>
  40 #include <linux/hugetlb.h>
  41 #include <linux/irq.h>
  42 #include <asm/byteorder.h>
  43 #include <net/ip.h>
  44 #include <rdma/ib_verbs.h>
  45 #include <rdma/iw_cm.h>
  46 #include <rdma/ib_user_verbs.h>
  47 #include <rdma/ib_umem.h>
  48 #include <rdma/uverbs_ioctl.h>
  49 #include "i40iw.h"
  50 
  51 /**
  52  * i40iw_query_device - get device attributes
  53  * @ibdev: device pointer from stack
  54  * @props: returning device attributes
  55  * @udata: user data
  56  */
  57 static int i40iw_query_device(struct ib_device *ibdev,
  58                               struct ib_device_attr *props,
  59                               struct ib_udata *udata)
  60 {
  61         struct i40iw_device *iwdev = to_iwdev(ibdev);
  62 
  63         if (udata->inlen || udata->outlen)
  64                 return -EINVAL;
  65         memset(props, 0, sizeof(*props));
  66         ether_addr_copy((u8 *)&props->sys_image_guid, iwdev->netdev->dev_addr);
  67         props->fw_ver = I40IW_FW_VERSION;
  68         props->device_cap_flags = iwdev->device_cap_flags;
  69         props->vendor_id = iwdev->ldev->pcidev->vendor;
  70         props->vendor_part_id = iwdev->ldev->pcidev->device;
  71         props->hw_ver = (u32)iwdev->sc_dev.hw_rev;
  72         props->max_mr_size = I40IW_MAX_OUTBOUND_MESSAGE_SIZE;
  73         props->max_qp = iwdev->max_qp - iwdev->used_qps;
  74         props->max_qp_wr = I40IW_MAX_QP_WRS;
  75         props->max_send_sge = I40IW_MAX_WQ_FRAGMENT_COUNT;
  76         props->max_recv_sge = I40IW_MAX_WQ_FRAGMENT_COUNT;
  77         props->max_cq = iwdev->max_cq - iwdev->used_cqs;
  78         props->max_cqe = iwdev->max_cqe;
  79         props->max_mr = iwdev->max_mr - iwdev->used_mrs;
  80         props->max_pd = iwdev->max_pd - iwdev->used_pds;
  81         props->max_sge_rd = I40IW_MAX_SGE_RD;
  82         props->max_qp_rd_atom = I40IW_MAX_IRD_SIZE;
  83         props->max_qp_init_rd_atom = props->max_qp_rd_atom;
  84         props->atomic_cap = IB_ATOMIC_NONE;
  85         props->max_map_per_fmr = 1;
  86         props->max_fast_reg_page_list_len = I40IW_MAX_PAGES_PER_FMR;
  87         return 0;
  88 }
  89 
  90 /**
  91  * i40iw_query_port - get port attrubutes
  92  * @ibdev: device pointer from stack
  93  * @port: port number for query
  94  * @props: returning device attributes
  95  */
  96 static int i40iw_query_port(struct ib_device *ibdev,
  97                             u8 port,
  98                             struct ib_port_attr *props)
  99 {
 100         props->lid = 1;
 101         props->port_cap_flags = IB_PORT_CM_SUP | IB_PORT_REINIT_SUP |
 102                 IB_PORT_VENDOR_CLASS_SUP | IB_PORT_BOOT_MGMT_SUP;
 103         props->gid_tbl_len = 1;
 104         props->pkey_tbl_len = 1;
 105         props->active_width = IB_WIDTH_4X;
 106         props->active_speed = 1;
 107         props->max_msg_sz = I40IW_MAX_OUTBOUND_MESSAGE_SIZE;
 108         return 0;
 109 }
 110 
 111 /**
 112  * i40iw_alloc_ucontext - Allocate the user context data structure
 113  * @uctx: Uverbs context pointer from stack
 114  * @udata: user data
 115  *
 116  * This keeps track of all objects associated with a particular
 117  * user-mode client.
 118  */
 119 static int i40iw_alloc_ucontext(struct ib_ucontext *uctx,
 120                                 struct ib_udata *udata)
 121 {
 122         struct ib_device *ibdev = uctx->device;
 123         struct i40iw_device *iwdev = to_iwdev(ibdev);
 124         struct i40iw_alloc_ucontext_req req;
 125         struct i40iw_alloc_ucontext_resp uresp = {};
 126         struct i40iw_ucontext *ucontext = to_ucontext(uctx);
 127 
 128         if (ib_copy_from_udata(&req, udata, sizeof(req)))
 129                 return -EINVAL;
 130 
 131         if (req.userspace_ver < 4 || req.userspace_ver > I40IW_ABI_VER) {
 132                 i40iw_pr_err("Unsupported provider library version %u.\n", req.userspace_ver);
 133                 return -EINVAL;
 134         }
 135 
 136         uresp.max_qps = iwdev->max_qp;
 137         uresp.max_pds = iwdev->max_pd;
 138         uresp.wq_size = iwdev->max_qp_wr * 2;
 139         uresp.kernel_ver = req.userspace_ver;
 140 
 141         ucontext->iwdev = iwdev;
 142         ucontext->abi_ver = req.userspace_ver;
 143 
 144         if (ib_copy_to_udata(udata, &uresp, sizeof(uresp)))
 145                 return -EFAULT;
 146 
 147         INIT_LIST_HEAD(&ucontext->cq_reg_mem_list);
 148         spin_lock_init(&ucontext->cq_reg_mem_list_lock);
 149         INIT_LIST_HEAD(&ucontext->qp_reg_mem_list);
 150         spin_lock_init(&ucontext->qp_reg_mem_list_lock);
 151 
 152         return 0;
 153 }
 154 
 155 /**
 156  * i40iw_dealloc_ucontext - deallocate the user context data structure
 157  * @context: user context created during alloc
 158  */
 159 static void i40iw_dealloc_ucontext(struct ib_ucontext *context)
 160 {
 161         return;
 162 }
 163 
 164 /**
 165  * i40iw_mmap - user memory map
 166  * @context: context created during alloc
 167  * @vma: kernel info for user memory map
 168  */
 169 static int i40iw_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
 170 {
 171         struct i40iw_ucontext *ucontext;
 172         u64 db_addr_offset;
 173         u64 push_offset;
 174 
 175         ucontext = to_ucontext(context);
 176         if (ucontext->iwdev->sc_dev.is_pf) {
 177                 db_addr_offset = I40IW_DB_ADDR_OFFSET;
 178                 push_offset = I40IW_PUSH_OFFSET;
 179                 if (vma->vm_pgoff)
 180                         vma->vm_pgoff += I40IW_PF_FIRST_PUSH_PAGE_INDEX - 1;
 181         } else {
 182                 db_addr_offset = I40IW_VF_DB_ADDR_OFFSET;
 183                 push_offset = I40IW_VF_PUSH_OFFSET;
 184                 if (vma->vm_pgoff)
 185                         vma->vm_pgoff += I40IW_VF_FIRST_PUSH_PAGE_INDEX - 1;
 186         }
 187 
 188         vma->vm_pgoff += db_addr_offset >> PAGE_SHIFT;
 189 
 190         if (vma->vm_pgoff == (db_addr_offset >> PAGE_SHIFT)) {
 191                 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
 192                 vma->vm_private_data = ucontext;
 193         } else {
 194                 if ((vma->vm_pgoff - (push_offset >> PAGE_SHIFT)) % 2)
 195                         vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
 196                 else
 197                         vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
 198         }
 199 
 200         if (io_remap_pfn_range(vma, vma->vm_start,
 201                                vma->vm_pgoff + (pci_resource_start(ucontext->iwdev->ldev->pcidev, 0) >> PAGE_SHIFT),
 202                                PAGE_SIZE, vma->vm_page_prot))
 203                 return -EAGAIN;
 204 
 205         return 0;
 206 }
 207 
 208 /**
 209  * i40iw_alloc_push_page - allocate a push page for qp
 210  * @iwdev: iwarp device
 211  * @qp: hardware control qp
 212  */
 213 static void i40iw_alloc_push_page(struct i40iw_device *iwdev, struct i40iw_sc_qp *qp)
 214 {
 215         struct i40iw_cqp_request *cqp_request;
 216         struct cqp_commands_info *cqp_info;
 217         enum i40iw_status_code status;
 218 
 219         if (qp->push_idx != I40IW_INVALID_PUSH_PAGE_INDEX)
 220                 return;
 221 
 222         cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
 223         if (!cqp_request)
 224                 return;
 225 
 226         atomic_inc(&cqp_request->refcount);
 227 
 228         cqp_info = &cqp_request->info;
 229         cqp_info->cqp_cmd = OP_MANAGE_PUSH_PAGE;
 230         cqp_info->post_sq = 1;
 231 
 232         cqp_info->in.u.manage_push_page.info.qs_handle = qp->qs_handle;
 233         cqp_info->in.u.manage_push_page.info.free_page = 0;
 234         cqp_info->in.u.manage_push_page.cqp = &iwdev->cqp.sc_cqp;
 235         cqp_info->in.u.manage_push_page.scratch = (uintptr_t)cqp_request;
 236 
 237         status = i40iw_handle_cqp_op(iwdev, cqp_request);
 238         if (!status)
 239                 qp->push_idx = cqp_request->compl_info.op_ret_val;
 240         else
 241                 i40iw_pr_err("CQP-OP Push page fail");
 242         i40iw_put_cqp_request(&iwdev->cqp, cqp_request);
 243 }
 244 
 245 /**
 246  * i40iw_dealloc_push_page - free a push page for qp
 247  * @iwdev: iwarp device
 248  * @qp: hardware control qp
 249  */
 250 static void i40iw_dealloc_push_page(struct i40iw_device *iwdev, struct i40iw_sc_qp *qp)
 251 {
 252         struct i40iw_cqp_request *cqp_request;
 253         struct cqp_commands_info *cqp_info;
 254         enum i40iw_status_code status;
 255 
 256         if (qp->push_idx == I40IW_INVALID_PUSH_PAGE_INDEX)
 257                 return;
 258 
 259         cqp_request = i40iw_get_cqp_request(&iwdev->cqp, false);
 260         if (!cqp_request)
 261                 return;
 262 
 263         cqp_info = &cqp_request->info;
 264         cqp_info->cqp_cmd = OP_MANAGE_PUSH_PAGE;
 265         cqp_info->post_sq = 1;
 266 
 267         cqp_info->in.u.manage_push_page.info.push_idx = qp->push_idx;
 268         cqp_info->in.u.manage_push_page.info.qs_handle = qp->qs_handle;
 269         cqp_info->in.u.manage_push_page.info.free_page = 1;
 270         cqp_info->in.u.manage_push_page.cqp = &iwdev->cqp.sc_cqp;
 271         cqp_info->in.u.manage_push_page.scratch = (uintptr_t)cqp_request;
 272 
 273         status = i40iw_handle_cqp_op(iwdev, cqp_request);
 274         if (!status)
 275                 qp->push_idx = I40IW_INVALID_PUSH_PAGE_INDEX;
 276         else
 277                 i40iw_pr_err("CQP-OP Push page fail");
 278 }
 279 
 280 /**
 281  * i40iw_alloc_pd - allocate protection domain
 282  * @pd: PD pointer
 283  * @udata: user data
 284  */
 285 static int i40iw_alloc_pd(struct ib_pd *pd, struct ib_udata *udata)
 286 {
 287         struct i40iw_pd *iwpd = to_iwpd(pd);
 288         struct i40iw_device *iwdev = to_iwdev(pd->device);
 289         struct i40iw_sc_dev *dev = &iwdev->sc_dev;
 290         struct i40iw_alloc_pd_resp uresp;
 291         struct i40iw_sc_pd *sc_pd;
 292         u32 pd_id = 0;
 293         int err;
 294 
 295         if (iwdev->closing)
 296                 return -ENODEV;
 297 
 298         err = i40iw_alloc_resource(iwdev, iwdev->allocated_pds,
 299                                    iwdev->max_pd, &pd_id, &iwdev->next_pd);
 300         if (err) {
 301                 i40iw_pr_err("alloc resource failed\n");
 302                 return err;
 303         }
 304 
 305         sc_pd = &iwpd->sc_pd;
 306 
 307         if (udata) {
 308                 struct i40iw_ucontext *ucontext = rdma_udata_to_drv_context(
 309                         udata, struct i40iw_ucontext, ibucontext);
 310                 dev->iw_pd_ops->pd_init(dev, sc_pd, pd_id, ucontext->abi_ver);
 311                 memset(&uresp, 0, sizeof(uresp));
 312                 uresp.pd_id = pd_id;
 313                 if (ib_copy_to_udata(udata, &uresp, sizeof(uresp))) {
 314                         err = -EFAULT;
 315                         goto error;
 316                 }
 317         } else {
 318                 dev->iw_pd_ops->pd_init(dev, sc_pd, pd_id, -1);
 319         }
 320 
 321         i40iw_add_pdusecount(iwpd);
 322         return 0;
 323 
 324 error:
 325         i40iw_free_resource(iwdev, iwdev->allocated_pds, pd_id);
 326         return err;
 327 }
 328 
 329 /**
 330  * i40iw_dealloc_pd - deallocate pd
 331  * @ibpd: ptr of pd to be deallocated
 332  * @udata: user data or null for kernel object
 333  */
 334 static void i40iw_dealloc_pd(struct ib_pd *ibpd, struct ib_udata *udata)
 335 {
 336         struct i40iw_pd *iwpd = to_iwpd(ibpd);
 337         struct i40iw_device *iwdev = to_iwdev(ibpd->device);
 338 
 339         i40iw_rem_pdusecount(iwpd, iwdev);
 340 }
 341 
 342 /**
 343  * i40iw_get_pbl - Retrieve pbl from a list given a virtual
 344  * address
 345  * @va: user virtual address
 346  * @pbl_list: pbl list to search in (QP's or CQ's)
 347  */
 348 static struct i40iw_pbl *i40iw_get_pbl(unsigned long va,
 349                                        struct list_head *pbl_list)
 350 {
 351         struct i40iw_pbl *iwpbl;
 352 
 353         list_for_each_entry(iwpbl, pbl_list, list) {
 354                 if (iwpbl->user_base == va) {
 355                         iwpbl->on_list = false;
 356                         list_del(&iwpbl->list);
 357                         return iwpbl;
 358                 }
 359         }
 360         return NULL;
 361 }
 362 
 363 /**
 364  * i40iw_free_qp_resources - free up memory resources for qp
 365  * @iwdev: iwarp device
 366  * @iwqp: qp ptr (user or kernel)
 367  * @qp_num: qp number assigned
 368  */
 369 void i40iw_free_qp_resources(struct i40iw_device *iwdev,
 370                              struct i40iw_qp *iwqp,
 371                              u32 qp_num)
 372 {
 373         struct i40iw_pbl *iwpbl = &iwqp->iwpbl;
 374 
 375         i40iw_ieq_cleanup_qp(iwdev->vsi.ieq, &iwqp->sc_qp);
 376         i40iw_dealloc_push_page(iwdev, &iwqp->sc_qp);
 377         if (qp_num)
 378                 i40iw_free_resource(iwdev, iwdev->allocated_qps, qp_num);
 379         if (iwpbl->pbl_allocated)
 380                 i40iw_free_pble(iwdev->pble_rsrc, &iwpbl->pble_alloc);
 381         i40iw_free_dma_mem(iwdev->sc_dev.hw, &iwqp->q2_ctx_mem);
 382         i40iw_free_dma_mem(iwdev->sc_dev.hw, &iwqp->kqp.dma_mem);
 383         kfree(iwqp->kqp.wrid_mem);
 384         iwqp->kqp.wrid_mem = NULL;
 385         kfree(iwqp->allocated_buffer);
 386 }
 387 
 388 /**
 389  * i40iw_clean_cqes - clean cq entries for qp
 390  * @iwqp: qp ptr (user or kernel)
 391  * @iwcq: cq ptr
 392  */
 393 static void i40iw_clean_cqes(struct i40iw_qp *iwqp, struct i40iw_cq *iwcq)
 394 {
 395         struct i40iw_cq_uk *ukcq = &iwcq->sc_cq.cq_uk;
 396 
 397         ukcq->ops.iw_cq_clean(&iwqp->sc_qp.qp_uk, ukcq);
 398 }
 399 
 400 /**
 401  * i40iw_destroy_qp - destroy qp
 402  * @ibqp: qp's ib pointer also to get to device's qp address
 403  */
 404 static int i40iw_destroy_qp(struct ib_qp *ibqp, struct ib_udata *udata)
 405 {
 406         struct i40iw_qp *iwqp = to_iwqp(ibqp);
 407 
 408         iwqp->destroyed = 1;
 409 
 410         if (iwqp->ibqp_state >= IB_QPS_INIT && iwqp->ibqp_state < IB_QPS_RTS)
 411                 i40iw_next_iw_state(iwqp, I40IW_QP_STATE_ERROR, 0, 0, 0);
 412 
 413         if (!iwqp->user_mode) {
 414                 if (iwqp->iwscq) {
 415                         i40iw_clean_cqes(iwqp, iwqp->iwscq);
 416                         if (iwqp->iwrcq != iwqp->iwscq)
 417                                 i40iw_clean_cqes(iwqp, iwqp->iwrcq);
 418                 }
 419         }
 420 
 421         i40iw_rem_ref(&iwqp->ibqp);
 422         return 0;
 423 }
 424 
 425 /**
 426  * i40iw_setup_virt_qp - setup for allocation of virtual qp
 427  * @dev: iwarp device
 428  * @qp: qp ptr
 429  * @init_info: initialize info to return
 430  */
 431 static int i40iw_setup_virt_qp(struct i40iw_device *iwdev,
 432                                struct i40iw_qp *iwqp,
 433                                struct i40iw_qp_init_info *init_info)
 434 {
 435         struct i40iw_pbl *iwpbl = &iwqp->iwpbl;
 436         struct i40iw_qp_mr *qpmr = &iwpbl->qp_mr;
 437 
 438         iwqp->page = qpmr->sq_page;
 439         init_info->shadow_area_pa = cpu_to_le64(qpmr->shadow);
 440         if (iwpbl->pbl_allocated) {
 441                 init_info->virtual_map = true;
 442                 init_info->sq_pa = qpmr->sq_pbl.idx;
 443                 init_info->rq_pa = qpmr->rq_pbl.idx;
 444         } else {
 445                 init_info->sq_pa = qpmr->sq_pbl.addr;
 446                 init_info->rq_pa = qpmr->rq_pbl.addr;
 447         }
 448         return 0;
 449 }
 450 
 451 /**
 452  * i40iw_setup_kmode_qp - setup initialization for kernel mode qp
 453  * @iwdev: iwarp device
 454  * @iwqp: qp ptr (user or kernel)
 455  * @info: initialize info to return
 456  */
 457 static int i40iw_setup_kmode_qp(struct i40iw_device *iwdev,
 458                                 struct i40iw_qp *iwqp,
 459                                 struct i40iw_qp_init_info *info)
 460 {
 461         struct i40iw_dma_mem *mem = &iwqp->kqp.dma_mem;
 462         u32 sqdepth, rqdepth;
 463         u8 sqshift;
 464         u32 size;
 465         enum i40iw_status_code status;
 466         struct i40iw_qp_uk_init_info *ukinfo = &info->qp_uk_init_info;
 467 
 468         i40iw_get_wqe_shift(ukinfo->max_sq_frag_cnt, ukinfo->max_inline_data, &sqshift);
 469         status = i40iw_get_sqdepth(ukinfo->sq_size, sqshift, &sqdepth);
 470         if (status)
 471                 return -ENOMEM;
 472 
 473         status = i40iw_get_rqdepth(ukinfo->rq_size, I40IW_MAX_RQ_WQE_SHIFT, &rqdepth);
 474         if (status)
 475                 return -ENOMEM;
 476 
 477         size = sqdepth * sizeof(struct i40iw_sq_uk_wr_trk_info) + (rqdepth << 3);
 478         iwqp->kqp.wrid_mem = kzalloc(size, GFP_KERNEL);
 479 
 480         ukinfo->sq_wrtrk_array = (struct i40iw_sq_uk_wr_trk_info *)iwqp->kqp.wrid_mem;
 481         if (!ukinfo->sq_wrtrk_array)
 482                 return -ENOMEM;
 483 
 484         ukinfo->rq_wrid_array = (u64 *)&ukinfo->sq_wrtrk_array[sqdepth];
 485 
 486         size = (sqdepth + rqdepth) * I40IW_QP_WQE_MIN_SIZE;
 487         size += (I40IW_SHADOW_AREA_SIZE << 3);
 488 
 489         status = i40iw_allocate_dma_mem(iwdev->sc_dev.hw, mem, size, 256);
 490         if (status) {
 491                 kfree(ukinfo->sq_wrtrk_array);
 492                 ukinfo->sq_wrtrk_array = NULL;
 493                 return -ENOMEM;
 494         }
 495 
 496         ukinfo->sq = mem->va;
 497         info->sq_pa = mem->pa;
 498 
 499         ukinfo->rq = &ukinfo->sq[sqdepth];
 500         info->rq_pa = info->sq_pa + (sqdepth * I40IW_QP_WQE_MIN_SIZE);
 501 
 502         ukinfo->shadow_area = ukinfo->rq[rqdepth].elem;
 503         info->shadow_area_pa = info->rq_pa + (rqdepth * I40IW_QP_WQE_MIN_SIZE);
 504 
 505         ukinfo->sq_size = sqdepth >> sqshift;
 506         ukinfo->rq_size = rqdepth >> I40IW_MAX_RQ_WQE_SHIFT;
 507         ukinfo->qp_id = iwqp->ibqp.qp_num;
 508         return 0;
 509 }
 510 
 511 /**
 512  * i40iw_create_qp - create qp
 513  * @ibpd: ptr of pd
 514  * @init_attr: attributes for qp
 515  * @udata: user data for create qp
 516  */
 517 static struct ib_qp *i40iw_create_qp(struct ib_pd *ibpd,
 518                                      struct ib_qp_init_attr *init_attr,
 519                                      struct ib_udata *udata)
 520 {
 521         struct i40iw_pd *iwpd = to_iwpd(ibpd);
 522         struct i40iw_device *iwdev = to_iwdev(ibpd->device);
 523         struct i40iw_cqp *iwcqp = &iwdev->cqp;
 524         struct i40iw_qp *iwqp;
 525         struct i40iw_ucontext *ucontext = rdma_udata_to_drv_context(
 526                 udata, struct i40iw_ucontext, ibucontext);
 527         struct i40iw_create_qp_req req;
 528         struct i40iw_create_qp_resp uresp;
 529         u32 qp_num = 0;
 530         void *mem;
 531         enum i40iw_status_code ret;
 532         int err_code;
 533         int sq_size;
 534         int rq_size;
 535         struct i40iw_sc_qp *qp;
 536         struct i40iw_sc_dev *dev = &iwdev->sc_dev;
 537         struct i40iw_qp_init_info init_info;
 538         struct i40iw_create_qp_info *qp_info;
 539         struct i40iw_cqp_request *cqp_request;
 540         struct cqp_commands_info *cqp_info;
 541 
 542         struct i40iw_qp_host_ctx_info *ctx_info;
 543         struct i40iwarp_offload_info *iwarp_info;
 544         unsigned long flags;
 545 
 546         if (iwdev->closing)
 547                 return ERR_PTR(-ENODEV);
 548 
 549         if (init_attr->create_flags)
 550                 return ERR_PTR(-EINVAL);
 551         if (init_attr->cap.max_inline_data > I40IW_MAX_INLINE_DATA_SIZE)
 552                 init_attr->cap.max_inline_data = I40IW_MAX_INLINE_DATA_SIZE;
 553 
 554         if (init_attr->cap.max_send_sge > I40IW_MAX_WQ_FRAGMENT_COUNT)
 555                 init_attr->cap.max_send_sge = I40IW_MAX_WQ_FRAGMENT_COUNT;
 556 
 557         if (init_attr->cap.max_recv_sge > I40IW_MAX_WQ_FRAGMENT_COUNT)
 558                 init_attr->cap.max_recv_sge = I40IW_MAX_WQ_FRAGMENT_COUNT;
 559 
 560         memset(&init_info, 0, sizeof(init_info));
 561 
 562         sq_size = init_attr->cap.max_send_wr;
 563         rq_size = init_attr->cap.max_recv_wr;
 564 
 565         init_info.vsi = &iwdev->vsi;
 566         init_info.qp_uk_init_info.sq_size = sq_size;
 567         init_info.qp_uk_init_info.rq_size = rq_size;
 568         init_info.qp_uk_init_info.max_sq_frag_cnt = init_attr->cap.max_send_sge;
 569         init_info.qp_uk_init_info.max_rq_frag_cnt = init_attr->cap.max_recv_sge;
 570         init_info.qp_uk_init_info.max_inline_data = init_attr->cap.max_inline_data;
 571 
 572         mem = kzalloc(sizeof(*iwqp), GFP_KERNEL);
 573         if (!mem)
 574                 return ERR_PTR(-ENOMEM);
 575 
 576         iwqp = (struct i40iw_qp *)mem;
 577         iwqp->allocated_buffer = mem;
 578         qp = &iwqp->sc_qp;
 579         qp->back_qp = (void *)iwqp;
 580         qp->push_idx = I40IW_INVALID_PUSH_PAGE_INDEX;
 581 
 582         iwqp->ctx_info.iwarp_info = &iwqp->iwarp_info;
 583 
 584         if (i40iw_allocate_dma_mem(dev->hw,
 585                                    &iwqp->q2_ctx_mem,
 586                                    I40IW_Q2_BUFFER_SIZE + I40IW_QP_CTX_SIZE,
 587                                    256)) {
 588                 i40iw_pr_err("dma_mem failed\n");
 589                 err_code = -ENOMEM;
 590                 goto error;
 591         }
 592 
 593         init_info.q2 = iwqp->q2_ctx_mem.va;
 594         init_info.q2_pa = iwqp->q2_ctx_mem.pa;
 595 
 596         init_info.host_ctx = (void *)init_info.q2 + I40IW_Q2_BUFFER_SIZE;
 597         init_info.host_ctx_pa = init_info.q2_pa + I40IW_Q2_BUFFER_SIZE;
 598 
 599         err_code = i40iw_alloc_resource(iwdev, iwdev->allocated_qps, iwdev->max_qp,
 600                                         &qp_num, &iwdev->next_qp);
 601         if (err_code) {
 602                 i40iw_pr_err("qp resource\n");
 603                 goto error;
 604         }
 605 
 606         iwqp->iwdev = iwdev;
 607         iwqp->iwpd = iwpd;
 608         iwqp->ibqp.qp_num = qp_num;
 609         qp = &iwqp->sc_qp;
 610         iwqp->iwscq = to_iwcq(init_attr->send_cq);
 611         iwqp->iwrcq = to_iwcq(init_attr->recv_cq);
 612 
 613         iwqp->host_ctx.va = init_info.host_ctx;
 614         iwqp->host_ctx.pa = init_info.host_ctx_pa;
 615         iwqp->host_ctx.size = I40IW_QP_CTX_SIZE;
 616 
 617         init_info.pd = &iwpd->sc_pd;
 618         init_info.qp_uk_init_info.qp_id = iwqp->ibqp.qp_num;
 619         iwqp->ctx_info.qp_compl_ctx = (uintptr_t)qp;
 620 
 621         if (init_attr->qp_type != IB_QPT_RC) {
 622                 err_code = -EINVAL;
 623                 goto error;
 624         }
 625         if (iwdev->push_mode)
 626                 i40iw_alloc_push_page(iwdev, qp);
 627         if (udata) {
 628                 err_code = ib_copy_from_udata(&req, udata, sizeof(req));
 629                 if (err_code) {
 630                         i40iw_pr_err("ib_copy_from_data\n");
 631                         goto error;
 632                 }
 633                 iwqp->ctx_info.qp_compl_ctx = req.user_compl_ctx;
 634                 iwqp->user_mode = 1;
 635 
 636                 if (req.user_wqe_buffers) {
 637                         struct i40iw_pbl *iwpbl;
 638 
 639                         spin_lock_irqsave(
 640                             &ucontext->qp_reg_mem_list_lock, flags);
 641                         iwpbl = i40iw_get_pbl(
 642                             (unsigned long)req.user_wqe_buffers,
 643                             &ucontext->qp_reg_mem_list);
 644                         spin_unlock_irqrestore(
 645                             &ucontext->qp_reg_mem_list_lock, flags);
 646 
 647                         if (!iwpbl) {
 648                                 err_code = -ENODATA;
 649                                 i40iw_pr_err("no pbl info\n");
 650                                 goto error;
 651                         }
 652                         memcpy(&iwqp->iwpbl, iwpbl, sizeof(iwqp->iwpbl));
 653                 }
 654                 err_code = i40iw_setup_virt_qp(iwdev, iwqp, &init_info);
 655         } else {
 656                 err_code = i40iw_setup_kmode_qp(iwdev, iwqp, &init_info);
 657         }
 658 
 659         if (err_code) {
 660                 i40iw_pr_err("setup qp failed\n");
 661                 goto error;
 662         }
 663 
 664         init_info.type = I40IW_QP_TYPE_IWARP;
 665         ret = dev->iw_priv_qp_ops->qp_init(qp, &init_info);
 666         if (ret) {
 667                 err_code = -EPROTO;
 668                 i40iw_pr_err("qp_init fail\n");
 669                 goto error;
 670         }
 671         ctx_info = &iwqp->ctx_info;
 672         iwarp_info = &iwqp->iwarp_info;
 673         iwarp_info->rd_enable = true;
 674         iwarp_info->wr_rdresp_en = true;
 675         if (!iwqp->user_mode) {
 676                 iwarp_info->fast_reg_en = true;
 677                 iwarp_info->priv_mode_en = true;
 678         }
 679         iwarp_info->ddp_ver = 1;
 680         iwarp_info->rdmap_ver = 1;
 681 
 682         ctx_info->iwarp_info_valid = true;
 683         ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id;
 684         ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id;
 685         if (qp->push_idx == I40IW_INVALID_PUSH_PAGE_INDEX) {
 686                 ctx_info->push_mode_en = false;
 687         } else {
 688                 ctx_info->push_mode_en = true;
 689                 ctx_info->push_idx = qp->push_idx;
 690         }
 691 
 692         ret = dev->iw_priv_qp_ops->qp_setctx(&iwqp->sc_qp,
 693                                              (u64 *)iwqp->host_ctx.va,
 694                                              ctx_info);
 695         ctx_info->iwarp_info_valid = false;
 696         cqp_request = i40iw_get_cqp_request(iwcqp, true);
 697         if (!cqp_request) {
 698                 err_code = -ENOMEM;
 699                 goto error;
 700         }
 701         cqp_info = &cqp_request->info;
 702         qp_info = &cqp_request->info.in.u.qp_create.info;
 703 
 704         memset(qp_info, 0, sizeof(*qp_info));
 705 
 706         qp_info->cq_num_valid = true;
 707         qp_info->next_iwarp_state = I40IW_QP_STATE_IDLE;
 708 
 709         cqp_info->cqp_cmd = OP_QP_CREATE;
 710         cqp_info->post_sq = 1;
 711         cqp_info->in.u.qp_create.qp = qp;
 712         cqp_info->in.u.qp_create.scratch = (uintptr_t)cqp_request;
 713         ret = i40iw_handle_cqp_op(iwdev, cqp_request);
 714         if (ret) {
 715                 i40iw_pr_err("CQP-OP QP create fail");
 716                 err_code = -EACCES;
 717                 goto error;
 718         }
 719 
 720         i40iw_add_ref(&iwqp->ibqp);
 721         spin_lock_init(&iwqp->lock);
 722         iwqp->sig_all = (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR) ? 1 : 0;
 723         iwdev->qp_table[qp_num] = iwqp;
 724         i40iw_add_pdusecount(iwqp->iwpd);
 725         i40iw_add_devusecount(iwdev);
 726         if (udata) {
 727                 memset(&uresp, 0, sizeof(uresp));
 728                 uresp.actual_sq_size = sq_size;
 729                 uresp.actual_rq_size = rq_size;
 730                 uresp.qp_id = qp_num;
 731                 uresp.push_idx = qp->push_idx;
 732                 err_code = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
 733                 if (err_code) {
 734                         i40iw_pr_err("copy_to_udata failed\n");
 735                         i40iw_destroy_qp(&iwqp->ibqp, udata);
 736                         /* let the completion of the qp destroy free the qp */
 737                         return ERR_PTR(err_code);
 738                 }
 739         }
 740         init_completion(&iwqp->sq_drained);
 741         init_completion(&iwqp->rq_drained);
 742 
 743         return &iwqp->ibqp;
 744 error:
 745         i40iw_free_qp_resources(iwdev, iwqp, qp_num);
 746         return ERR_PTR(err_code);
 747 }
 748 
 749 /**
 750  * i40iw_query - query qp attributes
 751  * @ibqp: qp pointer
 752  * @attr: attributes pointer
 753  * @attr_mask: Not used
 754  * @init_attr: qp attributes to return
 755  */
 756 static int i40iw_query_qp(struct ib_qp *ibqp,
 757                           struct ib_qp_attr *attr,
 758                           int attr_mask,
 759                           struct ib_qp_init_attr *init_attr)
 760 {
 761         struct i40iw_qp *iwqp = to_iwqp(ibqp);
 762         struct i40iw_sc_qp *qp = &iwqp->sc_qp;
 763 
 764         attr->qp_state = iwqp->ibqp_state;
 765         attr->cur_qp_state = attr->qp_state;
 766         attr->qp_access_flags = 0;
 767         attr->cap.max_send_wr = qp->qp_uk.sq_size;
 768         attr->cap.max_recv_wr = qp->qp_uk.rq_size;
 769         attr->cap.max_inline_data = I40IW_MAX_INLINE_DATA_SIZE;
 770         attr->cap.max_send_sge = I40IW_MAX_WQ_FRAGMENT_COUNT;
 771         attr->cap.max_recv_sge = I40IW_MAX_WQ_FRAGMENT_COUNT;
 772         attr->port_num = 1;
 773         init_attr->event_handler = iwqp->ibqp.event_handler;
 774         init_attr->qp_context = iwqp->ibqp.qp_context;
 775         init_attr->send_cq = iwqp->ibqp.send_cq;
 776         init_attr->recv_cq = iwqp->ibqp.recv_cq;
 777         init_attr->srq = iwqp->ibqp.srq;
 778         init_attr->cap = attr->cap;
 779         init_attr->port_num = 1;
 780         return 0;
 781 }
 782 
 783 /**
 784  * i40iw_hw_modify_qp - setup cqp for modify qp
 785  * @iwdev: iwarp device
 786  * @iwqp: qp ptr (user or kernel)
 787  * @info: info for modify qp
 788  * @wait: flag to wait or not for modify qp completion
 789  */
 790 void i40iw_hw_modify_qp(struct i40iw_device *iwdev, struct i40iw_qp *iwqp,
 791                         struct i40iw_modify_qp_info *info, bool wait)
 792 {
 793         struct i40iw_cqp_request *cqp_request;
 794         struct cqp_commands_info *cqp_info;
 795         struct i40iw_modify_qp_info *m_info;
 796         struct i40iw_gen_ae_info ae_info;
 797 
 798         cqp_request = i40iw_get_cqp_request(&iwdev->cqp, wait);
 799         if (!cqp_request)
 800                 return;
 801 
 802         cqp_info = &cqp_request->info;
 803         m_info = &cqp_info->in.u.qp_modify.info;
 804         memcpy(m_info, info, sizeof(*m_info));
 805         cqp_info->cqp_cmd = OP_QP_MODIFY;
 806         cqp_info->post_sq = 1;
 807         cqp_info->in.u.qp_modify.qp = &iwqp->sc_qp;
 808         cqp_info->in.u.qp_modify.scratch = (uintptr_t)cqp_request;
 809         if (!i40iw_handle_cqp_op(iwdev, cqp_request))
 810                 return;
 811 
 812         switch (m_info->next_iwarp_state) {
 813         case I40IW_QP_STATE_RTS:
 814                 if (iwqp->iwarp_state == I40IW_QP_STATE_IDLE)
 815                         i40iw_send_reset(iwqp->cm_node);
 816                 /* fall through */
 817         case I40IW_QP_STATE_IDLE:
 818         case I40IW_QP_STATE_TERMINATE:
 819         case I40IW_QP_STATE_CLOSING:
 820                 ae_info.ae_code = I40IW_AE_BAD_CLOSE;
 821                 ae_info.ae_source = 0;
 822                 i40iw_gen_ae(iwdev, &iwqp->sc_qp, &ae_info, false);
 823                 break;
 824         case I40IW_QP_STATE_ERROR:
 825         default:
 826                 break;
 827         }
 828 }
 829 
 830 /**
 831  * i40iw_modify_qp - modify qp request
 832  * @ibqp: qp's pointer for modify
 833  * @attr: access attributes
 834  * @attr_mask: state mask
 835  * @udata: user data
 836  */
 837 int i40iw_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
 838                     int attr_mask, struct ib_udata *udata)
 839 {
 840         struct i40iw_qp *iwqp = to_iwqp(ibqp);
 841         struct i40iw_device *iwdev = iwqp->iwdev;
 842         struct i40iw_qp_host_ctx_info *ctx_info;
 843         struct i40iwarp_offload_info *iwarp_info;
 844         struct i40iw_modify_qp_info info;
 845         u8 issue_modify_qp = 0;
 846         u8 dont_wait = 0;
 847         u32 err;
 848         unsigned long flags;
 849 
 850         memset(&info, 0, sizeof(info));
 851         ctx_info = &iwqp->ctx_info;
 852         iwarp_info = &iwqp->iwarp_info;
 853 
 854         spin_lock_irqsave(&iwqp->lock, flags);
 855 
 856         if (attr_mask & IB_QP_STATE) {
 857                 if (iwdev->closing && attr->qp_state != IB_QPS_ERR) {
 858                         err = -EINVAL;
 859                         goto exit;
 860                 }
 861 
 862                 switch (attr->qp_state) {
 863                 case IB_QPS_INIT:
 864                 case IB_QPS_RTR:
 865                         if (iwqp->iwarp_state > (u32)I40IW_QP_STATE_IDLE) {
 866                                 err = -EINVAL;
 867                                 goto exit;
 868                         }
 869                         if (iwqp->iwarp_state == I40IW_QP_STATE_INVALID) {
 870                                 info.next_iwarp_state = I40IW_QP_STATE_IDLE;
 871                                 issue_modify_qp = 1;
 872                         }
 873                         break;
 874                 case IB_QPS_RTS:
 875                         if ((iwqp->iwarp_state > (u32)I40IW_QP_STATE_RTS) ||
 876                             (!iwqp->cm_id)) {
 877                                 err = -EINVAL;
 878                                 goto exit;
 879                         }
 880 
 881                         issue_modify_qp = 1;
 882                         iwqp->hw_tcp_state = I40IW_TCP_STATE_ESTABLISHED;
 883                         iwqp->hte_added = 1;
 884                         info.next_iwarp_state = I40IW_QP_STATE_RTS;
 885                         info.tcp_ctx_valid = true;
 886                         info.ord_valid = true;
 887                         info.arp_cache_idx_valid = true;
 888                         info.cq_num_valid = true;
 889                         break;
 890                 case IB_QPS_SQD:
 891                         if (iwqp->hw_iwarp_state > (u32)I40IW_QP_STATE_RTS) {
 892                                 err = 0;
 893                                 goto exit;
 894                         }
 895                         if ((iwqp->iwarp_state == (u32)I40IW_QP_STATE_CLOSING) ||
 896                             (iwqp->iwarp_state < (u32)I40IW_QP_STATE_RTS)) {
 897                                 err = 0;
 898                                 goto exit;
 899                         }
 900                         if (iwqp->iwarp_state > (u32)I40IW_QP_STATE_CLOSING) {
 901                                 err = -EINVAL;
 902                                 goto exit;
 903                         }
 904                         info.next_iwarp_state = I40IW_QP_STATE_CLOSING;
 905                         issue_modify_qp = 1;
 906                         break;
 907                 case IB_QPS_SQE:
 908                         if (iwqp->iwarp_state >= (u32)I40IW_QP_STATE_TERMINATE) {
 909                                 err = -EINVAL;
 910                                 goto exit;
 911                         }
 912                         info.next_iwarp_state = I40IW_QP_STATE_TERMINATE;
 913                         issue_modify_qp = 1;
 914                         break;
 915                 case IB_QPS_ERR:
 916                 case IB_QPS_RESET:
 917                         if (iwqp->iwarp_state == (u32)I40IW_QP_STATE_ERROR) {
 918                                 err = -EINVAL;
 919                                 goto exit;
 920                         }
 921                         if (iwqp->sc_qp.term_flags)
 922                                 i40iw_terminate_del_timer(&iwqp->sc_qp);
 923                         info.next_iwarp_state = I40IW_QP_STATE_ERROR;
 924                         if ((iwqp->hw_tcp_state > I40IW_TCP_STATE_CLOSED) &&
 925                             iwdev->iw_status &&
 926                             (iwqp->hw_tcp_state != I40IW_TCP_STATE_TIME_WAIT))
 927                                 info.reset_tcp_conn = true;
 928                         else
 929                                 dont_wait = 1;
 930                         issue_modify_qp = 1;
 931                         info.next_iwarp_state = I40IW_QP_STATE_ERROR;
 932                         break;
 933                 default:
 934                         err = -EINVAL;
 935                         goto exit;
 936                 }
 937 
 938                 iwqp->ibqp_state = attr->qp_state;
 939 
 940         }
 941         if (attr_mask & IB_QP_ACCESS_FLAGS) {
 942                 ctx_info->iwarp_info_valid = true;
 943                 if (attr->qp_access_flags & IB_ACCESS_LOCAL_WRITE)
 944                         iwarp_info->wr_rdresp_en = true;
 945                 if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE)
 946                         iwarp_info->wr_rdresp_en = true;
 947                 if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ)
 948                         iwarp_info->rd_enable = true;
 949                 if (attr->qp_access_flags & IB_ACCESS_MW_BIND)
 950                         iwarp_info->bind_en = true;
 951 
 952                 if (iwqp->user_mode) {
 953                         iwarp_info->rd_enable = true;
 954                         iwarp_info->wr_rdresp_en = true;
 955                         iwarp_info->priv_mode_en = false;
 956                 }
 957         }
 958 
 959         if (ctx_info->iwarp_info_valid) {
 960                 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
 961                 int ret;
 962 
 963                 ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id;
 964                 ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id;
 965                 ret = dev->iw_priv_qp_ops->qp_setctx(&iwqp->sc_qp,
 966                                                      (u64 *)iwqp->host_ctx.va,
 967                                                      ctx_info);
 968                 if (ret) {
 969                         i40iw_pr_err("setting QP context\n");
 970                         err = -EINVAL;
 971                         goto exit;
 972                 }
 973         }
 974 
 975         spin_unlock_irqrestore(&iwqp->lock, flags);
 976 
 977         if (issue_modify_qp) {
 978                 i40iw_hw_modify_qp(iwdev, iwqp, &info, true);
 979 
 980                 spin_lock_irqsave(&iwqp->lock, flags);
 981                 iwqp->iwarp_state = info.next_iwarp_state;
 982                 spin_unlock_irqrestore(&iwqp->lock, flags);
 983         }
 984 
 985         if (issue_modify_qp && (iwqp->ibqp_state > IB_QPS_RTS)) {
 986                 if (dont_wait) {
 987                         if (iwqp->cm_id && iwqp->hw_tcp_state) {
 988                                 spin_lock_irqsave(&iwqp->lock, flags);
 989                                 iwqp->hw_tcp_state = I40IW_TCP_STATE_CLOSED;
 990                                 iwqp->last_aeq = I40IW_AE_RESET_SENT;
 991                                 spin_unlock_irqrestore(&iwqp->lock, flags);
 992                                 i40iw_cm_disconn(iwqp);
 993                         }
 994                 } else {
 995                         spin_lock_irqsave(&iwqp->lock, flags);
 996                         if (iwqp->cm_id) {
 997                                 if (atomic_inc_return(&iwqp->close_timer_started) == 1) {
 998                                         iwqp->cm_id->add_ref(iwqp->cm_id);
 999                                         i40iw_schedule_cm_timer(iwqp->cm_node,
1000                                                                 (struct i40iw_puda_buf *)iwqp,
1001                                                                  I40IW_TIMER_TYPE_CLOSE, 1, 0);
1002                                 }
1003                         }
1004                         spin_unlock_irqrestore(&iwqp->lock, flags);
1005                 }
1006         }
1007         return 0;
1008 exit:
1009         spin_unlock_irqrestore(&iwqp->lock, flags);
1010         return err;
1011 }
1012 
1013 /**
1014  * cq_free_resources - free up recources for cq
1015  * @iwdev: iwarp device
1016  * @iwcq: cq ptr
1017  */
1018 static void cq_free_resources(struct i40iw_device *iwdev, struct i40iw_cq *iwcq)
1019 {
1020         struct i40iw_sc_cq *cq = &iwcq->sc_cq;
1021 
1022         if (!iwcq->user_mode)
1023                 i40iw_free_dma_mem(iwdev->sc_dev.hw, &iwcq->kmem);
1024         i40iw_free_resource(iwdev, iwdev->allocated_cqs, cq->cq_uk.cq_id);
1025 }
1026 
1027 /**
1028  * i40iw_cq_wq_destroy - send cq destroy cqp
1029  * @iwdev: iwarp device
1030  * @cq: hardware control cq
1031  */
1032 void i40iw_cq_wq_destroy(struct i40iw_device *iwdev, struct i40iw_sc_cq *cq)
1033 {
1034         enum i40iw_status_code status;
1035         struct i40iw_cqp_request *cqp_request;
1036         struct cqp_commands_info *cqp_info;
1037 
1038         cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
1039         if (!cqp_request)
1040                 return;
1041 
1042         cqp_info = &cqp_request->info;
1043 
1044         cqp_info->cqp_cmd = OP_CQ_DESTROY;
1045         cqp_info->post_sq = 1;
1046         cqp_info->in.u.cq_destroy.cq = cq;
1047         cqp_info->in.u.cq_destroy.scratch = (uintptr_t)cqp_request;
1048         status = i40iw_handle_cqp_op(iwdev, cqp_request);
1049         if (status)
1050                 i40iw_pr_err("CQP-OP Destroy QP fail");
1051 }
1052 
1053 /**
1054  * i40iw_destroy_cq - destroy cq
1055  * @ib_cq: cq pointer
1056  * @udata: user data or NULL for kernel object
1057  */
1058 static void i40iw_destroy_cq(struct ib_cq *ib_cq, struct ib_udata *udata)
1059 {
1060         struct i40iw_cq *iwcq;
1061         struct i40iw_device *iwdev;
1062         struct i40iw_sc_cq *cq;
1063 
1064         iwcq = to_iwcq(ib_cq);
1065         iwdev = to_iwdev(ib_cq->device);
1066         cq = &iwcq->sc_cq;
1067         i40iw_cq_wq_destroy(iwdev, cq);
1068         cq_free_resources(iwdev, iwcq);
1069         i40iw_rem_devusecount(iwdev);
1070 }
1071 
1072 /**
1073  * i40iw_create_cq - create cq
1074  * @ibcq: CQ allocated
1075  * @attr: attributes for cq
1076  * @udata: user data
1077  */
1078 static int i40iw_create_cq(struct ib_cq *ibcq,
1079                            const struct ib_cq_init_attr *attr,
1080                            struct ib_udata *udata)
1081 {
1082         struct ib_device *ibdev = ibcq->device;
1083         struct i40iw_device *iwdev = to_iwdev(ibdev);
1084         struct i40iw_cq *iwcq = to_iwcq(ibcq);
1085         struct i40iw_pbl *iwpbl;
1086         u32 cq_num = 0;
1087         struct i40iw_sc_cq *cq;
1088         struct i40iw_sc_dev *dev = &iwdev->sc_dev;
1089         struct i40iw_cq_init_info info = {};
1090         enum i40iw_status_code status;
1091         struct i40iw_cqp_request *cqp_request;
1092         struct cqp_commands_info *cqp_info;
1093         struct i40iw_cq_uk_init_info *ukinfo = &info.cq_uk_init_info;
1094         unsigned long flags;
1095         int err_code;
1096         int entries = attr->cqe;
1097 
1098         if (iwdev->closing)
1099                 return -ENODEV;
1100 
1101         if (entries > iwdev->max_cqe)
1102                 return -EINVAL;
1103 
1104         err_code = i40iw_alloc_resource(iwdev, iwdev->allocated_cqs,
1105                                         iwdev->max_cq, &cq_num,
1106                                         &iwdev->next_cq);
1107         if (err_code)
1108                 return err_code;
1109 
1110         cq = &iwcq->sc_cq;
1111         cq->back_cq = (void *)iwcq;
1112         spin_lock_init(&iwcq->lock);
1113 
1114         info.dev = dev;
1115         ukinfo->cq_size = max(entries, 4);
1116         ukinfo->cq_id = cq_num;
1117         iwcq->ibcq.cqe = info.cq_uk_init_info.cq_size;
1118         info.ceqe_mask = 0;
1119         if (attr->comp_vector < iwdev->ceqs_count)
1120                 info.ceq_id = attr->comp_vector;
1121         info.ceq_id_valid = true;
1122         info.ceqe_mask = 1;
1123         info.type = I40IW_CQ_TYPE_IWARP;
1124         if (udata) {
1125                 struct i40iw_ucontext *ucontext = rdma_udata_to_drv_context(
1126                         udata, struct i40iw_ucontext, ibucontext);
1127                 struct i40iw_create_cq_req req;
1128                 struct i40iw_cq_mr *cqmr;
1129 
1130                 memset(&req, 0, sizeof(req));
1131                 iwcq->user_mode = true;
1132                 if (ib_copy_from_udata(&req, udata, sizeof(struct i40iw_create_cq_req))) {
1133                         err_code = -EFAULT;
1134                         goto cq_free_resources;
1135                 }
1136 
1137                 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
1138                 iwpbl = i40iw_get_pbl((unsigned long)req.user_cq_buffer,
1139                                       &ucontext->cq_reg_mem_list);
1140                 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
1141                 if (!iwpbl) {
1142                         err_code = -EPROTO;
1143                         goto cq_free_resources;
1144                 }
1145 
1146                 iwcq->iwpbl = iwpbl;
1147                 iwcq->cq_mem_size = 0;
1148                 cqmr = &iwpbl->cq_mr;
1149                 info.shadow_area_pa = cpu_to_le64(cqmr->shadow);
1150                 if (iwpbl->pbl_allocated) {
1151                         info.virtual_map = true;
1152                         info.pbl_chunk_size = 1;
1153                         info.first_pm_pbl_idx = cqmr->cq_pbl.idx;
1154                 } else {
1155                         info.cq_base_pa = cqmr->cq_pbl.addr;
1156                 }
1157         } else {
1158                 /* Kmode allocations */
1159                 int rsize;
1160                 int shadow;
1161 
1162                 rsize = info.cq_uk_init_info.cq_size * sizeof(struct i40iw_cqe);
1163                 rsize = round_up(rsize, 256);
1164                 shadow = I40IW_SHADOW_AREA_SIZE << 3;
1165                 status = i40iw_allocate_dma_mem(dev->hw, &iwcq->kmem,
1166                                                 rsize + shadow, 256);
1167                 if (status) {
1168                         err_code = -ENOMEM;
1169                         goto cq_free_resources;
1170                 }
1171                 ukinfo->cq_base = iwcq->kmem.va;
1172                 info.cq_base_pa = iwcq->kmem.pa;
1173                 info.shadow_area_pa = info.cq_base_pa + rsize;
1174                 ukinfo->shadow_area = iwcq->kmem.va + rsize;
1175         }
1176 
1177         if (dev->iw_priv_cq_ops->cq_init(cq, &info)) {
1178                 i40iw_pr_err("init cq fail\n");
1179                 err_code = -EPROTO;
1180                 goto cq_free_resources;
1181         }
1182 
1183         cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
1184         if (!cqp_request) {
1185                 err_code = -ENOMEM;
1186                 goto cq_free_resources;
1187         }
1188 
1189         cqp_info = &cqp_request->info;
1190         cqp_info->cqp_cmd = OP_CQ_CREATE;
1191         cqp_info->post_sq = 1;
1192         cqp_info->in.u.cq_create.cq = cq;
1193         cqp_info->in.u.cq_create.scratch = (uintptr_t)cqp_request;
1194         status = i40iw_handle_cqp_op(iwdev, cqp_request);
1195         if (status) {
1196                 i40iw_pr_err("CQP-OP Create QP fail");
1197                 err_code = -EPROTO;
1198                 goto cq_free_resources;
1199         }
1200 
1201         if (udata) {
1202                 struct i40iw_create_cq_resp resp;
1203 
1204                 memset(&resp, 0, sizeof(resp));
1205                 resp.cq_id = info.cq_uk_init_info.cq_id;
1206                 resp.cq_size = info.cq_uk_init_info.cq_size;
1207                 if (ib_copy_to_udata(udata, &resp, sizeof(resp))) {
1208                         i40iw_pr_err("copy to user data\n");
1209                         err_code = -EPROTO;
1210                         goto cq_destroy;
1211                 }
1212         }
1213 
1214         i40iw_add_devusecount(iwdev);
1215         return 0;
1216 
1217 cq_destroy:
1218         i40iw_cq_wq_destroy(iwdev, cq);
1219 cq_free_resources:
1220         cq_free_resources(iwdev, iwcq);
1221         return err_code;
1222 }
1223 
1224 /**
1225  * i40iw_get_user_access - get hw access from IB access
1226  * @acc: IB access to return hw access
1227  */
1228 static inline u16 i40iw_get_user_access(int acc)
1229 {
1230         u16 access = 0;
1231 
1232         access |= (acc & IB_ACCESS_LOCAL_WRITE) ? I40IW_ACCESS_FLAGS_LOCALWRITE : 0;
1233         access |= (acc & IB_ACCESS_REMOTE_WRITE) ? I40IW_ACCESS_FLAGS_REMOTEWRITE : 0;
1234         access |= (acc & IB_ACCESS_REMOTE_READ) ? I40IW_ACCESS_FLAGS_REMOTEREAD : 0;
1235         access |= (acc & IB_ACCESS_MW_BIND) ? I40IW_ACCESS_FLAGS_BIND_WINDOW : 0;
1236         return access;
1237 }
1238 
1239 /**
1240  * i40iw_free_stag - free stag resource
1241  * @iwdev: iwarp device
1242  * @stag: stag to free
1243  */
1244 static void i40iw_free_stag(struct i40iw_device *iwdev, u32 stag)
1245 {
1246         u32 stag_idx;
1247 
1248         stag_idx = (stag & iwdev->mr_stagmask) >> I40IW_CQPSQ_STAG_IDX_SHIFT;
1249         i40iw_free_resource(iwdev, iwdev->allocated_mrs, stag_idx);
1250         i40iw_rem_devusecount(iwdev);
1251 }
1252 
1253 /**
1254  * i40iw_create_stag - create random stag
1255  * @iwdev: iwarp device
1256  */
1257 static u32 i40iw_create_stag(struct i40iw_device *iwdev)
1258 {
1259         u32 stag = 0;
1260         u32 stag_index = 0;
1261         u32 next_stag_index;
1262         u32 driver_key;
1263         u32 random;
1264         u8 consumer_key;
1265         int ret;
1266 
1267         get_random_bytes(&random, sizeof(random));
1268         consumer_key = (u8)random;
1269 
1270         driver_key = random & ~iwdev->mr_stagmask;
1271         next_stag_index = (random & iwdev->mr_stagmask) >> 8;
1272         next_stag_index %= iwdev->max_mr;
1273 
1274         ret = i40iw_alloc_resource(iwdev,
1275                                    iwdev->allocated_mrs, iwdev->max_mr,
1276                                    &stag_index, &next_stag_index);
1277         if (!ret) {
1278                 stag = stag_index << I40IW_CQPSQ_STAG_IDX_SHIFT;
1279                 stag |= driver_key;
1280                 stag += (u32)consumer_key;
1281                 i40iw_add_devusecount(iwdev);
1282         }
1283         return stag;
1284 }
1285 
1286 /**
1287  * i40iw_next_pbl_addr - Get next pbl address
1288  * @pbl: pointer to a pble
1289  * @pinfo: info pointer
1290  * @idx: index
1291  */
1292 static inline u64 *i40iw_next_pbl_addr(u64 *pbl,
1293                                        struct i40iw_pble_info **pinfo,
1294                                        u32 *idx)
1295 {
1296         *idx += 1;
1297         if ((!(*pinfo)) || (*idx != (*pinfo)->cnt))
1298                 return ++pbl;
1299         *idx = 0;
1300         (*pinfo)++;
1301         return (u64 *)(*pinfo)->addr;
1302 }
1303 
1304 /**
1305  * i40iw_copy_user_pgaddrs - copy user page address to pble's os locally
1306  * @iwmr: iwmr for IB's user page addresses
1307  * @pbl: ple pointer to save 1 level or 0 level pble
1308  * @level: indicated level 0, 1 or 2
1309  */
1310 static void i40iw_copy_user_pgaddrs(struct i40iw_mr *iwmr,
1311                                     u64 *pbl,
1312                                     enum i40iw_pble_level level)
1313 {
1314         struct ib_umem *region = iwmr->region;
1315         struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1316         struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1317         struct i40iw_pble_info *pinfo;
1318         struct ib_block_iter biter;
1319         u32 idx = 0;
1320 
1321         pinfo = (level == I40IW_LEVEL_1) ? NULL : palloc->level2.leaf;
1322 
1323         if (iwmr->type == IW_MEMREG_TYPE_QP)
1324                 iwpbl->qp_mr.sq_page = sg_page(region->sg_head.sgl);
1325 
1326         rdma_for_each_block(region->sg_head.sgl, &biter, region->nmap,
1327                             iwmr->page_size) {
1328                 *pbl = rdma_block_iter_dma_address(&biter);
1329                 pbl = i40iw_next_pbl_addr(pbl, &pinfo, &idx);
1330         }
1331 }
1332 
1333 /**
1334  * i40iw_check_mem_contiguous - check if pbls stored in arr are contiguous
1335  * @arr: lvl1 pbl array
1336  * @npages: page count
1337  * pg_size: page size
1338  *
1339  */
1340 static bool i40iw_check_mem_contiguous(u64 *arr, u32 npages, u32 pg_size)
1341 {
1342         u32 pg_idx;
1343 
1344         for (pg_idx = 0; pg_idx < npages; pg_idx++) {
1345                 if ((*arr + (pg_size * pg_idx)) != arr[pg_idx])
1346                         return false;
1347         }
1348         return true;
1349 }
1350 
1351 /**
1352  * i40iw_check_mr_contiguous - check if MR is physically contiguous
1353  * @palloc: pbl allocation struct
1354  * pg_size: page size
1355  */
1356 static bool i40iw_check_mr_contiguous(struct i40iw_pble_alloc *palloc, u32 pg_size)
1357 {
1358         struct i40iw_pble_level2 *lvl2 = &palloc->level2;
1359         struct i40iw_pble_info *leaf = lvl2->leaf;
1360         u64 *arr = NULL;
1361         u64 *start_addr = NULL;
1362         int i;
1363         bool ret;
1364 
1365         if (palloc->level == I40IW_LEVEL_1) {
1366                 arr = (u64 *)palloc->level1.addr;
1367                 ret = i40iw_check_mem_contiguous(arr, palloc->total_cnt, pg_size);
1368                 return ret;
1369         }
1370 
1371         start_addr = (u64 *)leaf->addr;
1372 
1373         for (i = 0; i < lvl2->leaf_cnt; i++, leaf++) {
1374                 arr = (u64 *)leaf->addr;
1375                 if ((*start_addr + (i * pg_size * PBLE_PER_PAGE)) != *arr)
1376                         return false;
1377                 ret = i40iw_check_mem_contiguous(arr, leaf->cnt, pg_size);
1378                 if (!ret)
1379                         return false;
1380         }
1381 
1382         return true;
1383 }
1384 
1385 /**
1386  * i40iw_setup_pbles - copy user pg address to pble's
1387  * @iwdev: iwarp device
1388  * @iwmr: mr pointer for this memory registration
1389  * @use_pbles: flag if to use pble's
1390  */
1391 static int i40iw_setup_pbles(struct i40iw_device *iwdev,
1392                              struct i40iw_mr *iwmr,
1393                              bool use_pbles)
1394 {
1395         struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1396         struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1397         struct i40iw_pble_info *pinfo;
1398         u64 *pbl;
1399         enum i40iw_status_code status;
1400         enum i40iw_pble_level level = I40IW_LEVEL_1;
1401 
1402         if (use_pbles) {
1403                 mutex_lock(&iwdev->pbl_mutex);
1404                 status = i40iw_get_pble(&iwdev->sc_dev, iwdev->pble_rsrc, palloc, iwmr->page_cnt);
1405                 mutex_unlock(&iwdev->pbl_mutex);
1406                 if (status)
1407                         return -ENOMEM;
1408 
1409                 iwpbl->pbl_allocated = true;
1410                 level = palloc->level;
1411                 pinfo = (level == I40IW_LEVEL_1) ? &palloc->level1 : palloc->level2.leaf;
1412                 pbl = (u64 *)pinfo->addr;
1413         } else {
1414                 pbl = iwmr->pgaddrmem;
1415         }
1416 
1417         i40iw_copy_user_pgaddrs(iwmr, pbl, level);
1418 
1419         if (use_pbles)
1420                 iwmr->pgaddrmem[0] = *pbl;
1421 
1422         return 0;
1423 }
1424 
1425 /**
1426  * i40iw_handle_q_mem - handle memory for qp and cq
1427  * @iwdev: iwarp device
1428  * @req: information for q memory management
1429  * @iwpbl: pble struct
1430  * @use_pbles: flag to use pble
1431  */
1432 static int i40iw_handle_q_mem(struct i40iw_device *iwdev,
1433                               struct i40iw_mem_reg_req *req,
1434                               struct i40iw_pbl *iwpbl,
1435                               bool use_pbles)
1436 {
1437         struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1438         struct i40iw_mr *iwmr = iwpbl->iwmr;
1439         struct i40iw_qp_mr *qpmr = &iwpbl->qp_mr;
1440         struct i40iw_cq_mr *cqmr = &iwpbl->cq_mr;
1441         struct i40iw_hmc_pble *hmc_p;
1442         u64 *arr = iwmr->pgaddrmem;
1443         u32 pg_size;
1444         int err;
1445         int total;
1446         bool ret = true;
1447 
1448         total = req->sq_pages + req->rq_pages + req->cq_pages;
1449         pg_size = iwmr->page_size;
1450 
1451         err = i40iw_setup_pbles(iwdev, iwmr, use_pbles);
1452         if (err)
1453                 return err;
1454 
1455         if (use_pbles && (palloc->level != I40IW_LEVEL_1)) {
1456                 i40iw_free_pble(iwdev->pble_rsrc, palloc);
1457                 iwpbl->pbl_allocated = false;
1458                 return -ENOMEM;
1459         }
1460 
1461         if (use_pbles)
1462                 arr = (u64 *)palloc->level1.addr;
1463 
1464         if (iwmr->type == IW_MEMREG_TYPE_QP) {
1465                 hmc_p = &qpmr->sq_pbl;
1466                 qpmr->shadow = (dma_addr_t)arr[total];
1467 
1468                 if (use_pbles) {
1469                         ret = i40iw_check_mem_contiguous(arr, req->sq_pages, pg_size);
1470                         if (ret)
1471                                 ret = i40iw_check_mem_contiguous(&arr[req->sq_pages], req->rq_pages, pg_size);
1472                 }
1473 
1474                 if (!ret) {
1475                         hmc_p->idx = palloc->level1.idx;
1476                         hmc_p = &qpmr->rq_pbl;
1477                         hmc_p->idx = palloc->level1.idx + req->sq_pages;
1478                 } else {
1479                         hmc_p->addr = arr[0];
1480                         hmc_p = &qpmr->rq_pbl;
1481                         hmc_p->addr = arr[req->sq_pages];
1482                 }
1483         } else {                /* CQ */
1484                 hmc_p = &cqmr->cq_pbl;
1485                 cqmr->shadow = (dma_addr_t)arr[total];
1486 
1487                 if (use_pbles)
1488                         ret = i40iw_check_mem_contiguous(arr, req->cq_pages, pg_size);
1489 
1490                 if (!ret)
1491                         hmc_p->idx = palloc->level1.idx;
1492                 else
1493                         hmc_p->addr = arr[0];
1494         }
1495 
1496         if (use_pbles && ret) {
1497                 i40iw_free_pble(iwdev->pble_rsrc, palloc);
1498                 iwpbl->pbl_allocated = false;
1499         }
1500 
1501         return err;
1502 }
1503 
1504 /**
1505  * i40iw_hw_alloc_stag - cqp command to allocate stag
1506  * @iwdev: iwarp device
1507  * @iwmr: iwarp mr pointer
1508  */
1509 static int i40iw_hw_alloc_stag(struct i40iw_device *iwdev, struct i40iw_mr *iwmr)
1510 {
1511         struct i40iw_allocate_stag_info *info;
1512         struct i40iw_pd *iwpd = to_iwpd(iwmr->ibmr.pd);
1513         enum i40iw_status_code status;
1514         int err = 0;
1515         struct i40iw_cqp_request *cqp_request;
1516         struct cqp_commands_info *cqp_info;
1517 
1518         cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
1519         if (!cqp_request)
1520                 return -ENOMEM;
1521 
1522         cqp_info = &cqp_request->info;
1523         info = &cqp_info->in.u.alloc_stag.info;
1524         memset(info, 0, sizeof(*info));
1525         info->page_size = PAGE_SIZE;
1526         info->stag_idx = iwmr->stag >> I40IW_CQPSQ_STAG_IDX_SHIFT;
1527         info->pd_id = iwpd->sc_pd.pd_id;
1528         info->total_len = iwmr->length;
1529         info->remote_access = true;
1530         cqp_info->cqp_cmd = OP_ALLOC_STAG;
1531         cqp_info->post_sq = 1;
1532         cqp_info->in.u.alloc_stag.dev = &iwdev->sc_dev;
1533         cqp_info->in.u.alloc_stag.scratch = (uintptr_t)cqp_request;
1534 
1535         status = i40iw_handle_cqp_op(iwdev, cqp_request);
1536         if (status) {
1537                 err = -ENOMEM;
1538                 i40iw_pr_err("CQP-OP MR Reg fail");
1539         }
1540         return err;
1541 }
1542 
1543 /**
1544  * i40iw_alloc_mr - register stag for fast memory registration
1545  * @pd: ibpd pointer
1546  * @mr_type: memory for stag registrion
1547  * @max_num_sg: man number of pages
1548  * @udata: user data or NULL for kernel objects
1549  */
1550 static struct ib_mr *i40iw_alloc_mr(struct ib_pd *pd, enum ib_mr_type mr_type,
1551                                     u32 max_num_sg, struct ib_udata *udata)
1552 {
1553         struct i40iw_pd *iwpd = to_iwpd(pd);
1554         struct i40iw_device *iwdev = to_iwdev(pd->device);
1555         struct i40iw_pble_alloc *palloc;
1556         struct i40iw_pbl *iwpbl;
1557         struct i40iw_mr *iwmr;
1558         enum i40iw_status_code status;
1559         u32 stag;
1560         int err_code = -ENOMEM;
1561 
1562         iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
1563         if (!iwmr)
1564                 return ERR_PTR(-ENOMEM);
1565 
1566         stag = i40iw_create_stag(iwdev);
1567         if (!stag) {
1568                 err_code = -EOVERFLOW;
1569                 goto err;
1570         }
1571         stag &= ~I40IW_CQPSQ_STAG_KEY_MASK;
1572         iwmr->stag = stag;
1573         iwmr->ibmr.rkey = stag;
1574         iwmr->ibmr.lkey = stag;
1575         iwmr->ibmr.pd = pd;
1576         iwmr->ibmr.device = pd->device;
1577         iwpbl = &iwmr->iwpbl;
1578         iwpbl->iwmr = iwmr;
1579         iwmr->type = IW_MEMREG_TYPE_MEM;
1580         palloc = &iwpbl->pble_alloc;
1581         iwmr->page_cnt = max_num_sg;
1582         mutex_lock(&iwdev->pbl_mutex);
1583         status = i40iw_get_pble(&iwdev->sc_dev, iwdev->pble_rsrc, palloc, iwmr->page_cnt);
1584         mutex_unlock(&iwdev->pbl_mutex);
1585         if (status)
1586                 goto err1;
1587 
1588         if (palloc->level != I40IW_LEVEL_1)
1589                 goto err2;
1590         err_code = i40iw_hw_alloc_stag(iwdev, iwmr);
1591         if (err_code)
1592                 goto err2;
1593         iwpbl->pbl_allocated = true;
1594         i40iw_add_pdusecount(iwpd);
1595         return &iwmr->ibmr;
1596 err2:
1597         i40iw_free_pble(iwdev->pble_rsrc, palloc);
1598 err1:
1599         i40iw_free_stag(iwdev, stag);
1600 err:
1601         kfree(iwmr);
1602         return ERR_PTR(err_code);
1603 }
1604 
1605 /**
1606  * i40iw_set_page - populate pbl list for fmr
1607  * @ibmr: ib mem to access iwarp mr pointer
1608  * @addr: page dma address fro pbl list
1609  */
1610 static int i40iw_set_page(struct ib_mr *ibmr, u64 addr)
1611 {
1612         struct i40iw_mr *iwmr = to_iwmr(ibmr);
1613         struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1614         struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1615         u64 *pbl;
1616 
1617         if (unlikely(iwmr->npages == iwmr->page_cnt))
1618                 return -ENOMEM;
1619 
1620         pbl = (u64 *)palloc->level1.addr;
1621         pbl[iwmr->npages++] = cpu_to_le64(addr);
1622         return 0;
1623 }
1624 
1625 /**
1626  * i40iw_map_mr_sg - map of sg list for fmr
1627  * @ibmr: ib mem to access iwarp mr pointer
1628  * @sg: scatter gather list for fmr
1629  * @sg_nents: number of sg pages
1630  */
1631 static int i40iw_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg,
1632                            int sg_nents, unsigned int *sg_offset)
1633 {
1634         struct i40iw_mr *iwmr = to_iwmr(ibmr);
1635 
1636         iwmr->npages = 0;
1637         return ib_sg_to_pages(ibmr, sg, sg_nents, sg_offset, i40iw_set_page);
1638 }
1639 
1640 /**
1641  * i40iw_drain_sq - drain the send queue
1642  * @ibqp: ib qp pointer
1643  */
1644 static void i40iw_drain_sq(struct ib_qp *ibqp)
1645 {
1646         struct i40iw_qp *iwqp = to_iwqp(ibqp);
1647         struct i40iw_sc_qp *qp = &iwqp->sc_qp;
1648 
1649         if (I40IW_RING_MORE_WORK(qp->qp_uk.sq_ring))
1650                 wait_for_completion(&iwqp->sq_drained);
1651 }
1652 
1653 /**
1654  * i40iw_drain_rq - drain the receive queue
1655  * @ibqp: ib qp pointer
1656  */
1657 static void i40iw_drain_rq(struct ib_qp *ibqp)
1658 {
1659         struct i40iw_qp *iwqp = to_iwqp(ibqp);
1660         struct i40iw_sc_qp *qp = &iwqp->sc_qp;
1661 
1662         if (I40IW_RING_MORE_WORK(qp->qp_uk.rq_ring))
1663                 wait_for_completion(&iwqp->rq_drained);
1664 }
1665 
1666 /**
1667  * i40iw_hwreg_mr - send cqp command for memory registration
1668  * @iwdev: iwarp device
1669  * @iwmr: iwarp mr pointer
1670  * @access: access for MR
1671  */
1672 static int i40iw_hwreg_mr(struct i40iw_device *iwdev,
1673                           struct i40iw_mr *iwmr,
1674                           u16 access)
1675 {
1676         struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1677         struct i40iw_reg_ns_stag_info *stag_info;
1678         struct i40iw_pd *iwpd = to_iwpd(iwmr->ibmr.pd);
1679         struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1680         enum i40iw_status_code status;
1681         int err = 0;
1682         struct i40iw_cqp_request *cqp_request;
1683         struct cqp_commands_info *cqp_info;
1684 
1685         cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
1686         if (!cqp_request)
1687                 return -ENOMEM;
1688 
1689         cqp_info = &cqp_request->info;
1690         stag_info = &cqp_info->in.u.mr_reg_non_shared.info;
1691         memset(stag_info, 0, sizeof(*stag_info));
1692         stag_info->va = (void *)(unsigned long)iwpbl->user_base;
1693         stag_info->stag_idx = iwmr->stag >> I40IW_CQPSQ_STAG_IDX_SHIFT;
1694         stag_info->stag_key = (u8)iwmr->stag;
1695         stag_info->total_len = iwmr->length;
1696         stag_info->access_rights = access;
1697         stag_info->pd_id = iwpd->sc_pd.pd_id;
1698         stag_info->addr_type = I40IW_ADDR_TYPE_VA_BASED;
1699         stag_info->page_size = iwmr->page_size;
1700 
1701         if (iwpbl->pbl_allocated) {
1702                 if (palloc->level == I40IW_LEVEL_1) {
1703                         stag_info->first_pm_pbl_index = palloc->level1.idx;
1704                         stag_info->chunk_size = 1;
1705                 } else {
1706                         stag_info->first_pm_pbl_index = palloc->level2.root.idx;
1707                         stag_info->chunk_size = 3;
1708                 }
1709         } else {
1710                 stag_info->reg_addr_pa = iwmr->pgaddrmem[0];
1711         }
1712 
1713         cqp_info->cqp_cmd = OP_MR_REG_NON_SHARED;
1714         cqp_info->post_sq = 1;
1715         cqp_info->in.u.mr_reg_non_shared.dev = &iwdev->sc_dev;
1716         cqp_info->in.u.mr_reg_non_shared.scratch = (uintptr_t)cqp_request;
1717 
1718         status = i40iw_handle_cqp_op(iwdev, cqp_request);
1719         if (status) {
1720                 err = -ENOMEM;
1721                 i40iw_pr_err("CQP-OP MR Reg fail");
1722         }
1723         return err;
1724 }
1725 
1726 /**
1727  * i40iw_reg_user_mr - Register a user memory region
1728  * @pd: ptr of pd
1729  * @start: virtual start address
1730  * @length: length of mr
1731  * @virt: virtual address
1732  * @acc: access of mr
1733  * @udata: user data
1734  */
1735 static struct ib_mr *i40iw_reg_user_mr(struct ib_pd *pd,
1736                                        u64 start,
1737                                        u64 length,
1738                                        u64 virt,
1739                                        int acc,
1740                                        struct ib_udata *udata)
1741 {
1742         struct i40iw_pd *iwpd = to_iwpd(pd);
1743         struct i40iw_device *iwdev = to_iwdev(pd->device);
1744         struct i40iw_ucontext *ucontext = rdma_udata_to_drv_context(
1745                 udata, struct i40iw_ucontext, ibucontext);
1746         struct i40iw_pble_alloc *palloc;
1747         struct i40iw_pbl *iwpbl;
1748         struct i40iw_mr *iwmr;
1749         struct ib_umem *region;
1750         struct i40iw_mem_reg_req req;
1751         u64 pbl_depth = 0;
1752         u32 stag = 0;
1753         u16 access;
1754         u64 region_length;
1755         bool use_pbles = false;
1756         unsigned long flags;
1757         int err = -ENOSYS;
1758         int ret;
1759         int pg_shift;
1760 
1761         if (iwdev->closing)
1762                 return ERR_PTR(-ENODEV);
1763 
1764         if (length > I40IW_MAX_MR_SIZE)
1765                 return ERR_PTR(-EINVAL);
1766         region = ib_umem_get(udata, start, length, acc, 0);
1767         if (IS_ERR(region))
1768                 return (struct ib_mr *)region;
1769 
1770         if (ib_copy_from_udata(&req, udata, sizeof(req))) {
1771                 ib_umem_release(region);
1772                 return ERR_PTR(-EFAULT);
1773         }
1774 
1775         iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
1776         if (!iwmr) {
1777                 ib_umem_release(region);
1778                 return ERR_PTR(-ENOMEM);
1779         }
1780 
1781         iwpbl = &iwmr->iwpbl;
1782         iwpbl->iwmr = iwmr;
1783         iwmr->region = region;
1784         iwmr->ibmr.pd = pd;
1785         iwmr->ibmr.device = pd->device;
1786 
1787         iwmr->page_size = PAGE_SIZE;
1788         if (req.reg_type == IW_MEMREG_TYPE_MEM)
1789                 iwmr->page_size = ib_umem_find_best_pgsz(region, SZ_4K | SZ_2M,
1790                                                          virt);
1791 
1792         region_length = region->length + (start & (iwmr->page_size - 1));
1793         pg_shift = ffs(iwmr->page_size) - 1;
1794         pbl_depth = region_length >> pg_shift;
1795         pbl_depth += (region_length & (iwmr->page_size - 1)) ? 1 : 0;
1796         iwmr->length = region->length;
1797 
1798         iwpbl->user_base = virt;
1799         palloc = &iwpbl->pble_alloc;
1800 
1801         iwmr->type = req.reg_type;
1802         iwmr->page_cnt = (u32)pbl_depth;
1803 
1804         switch (req.reg_type) {
1805         case IW_MEMREG_TYPE_QP:
1806                 use_pbles = ((req.sq_pages + req.rq_pages) > 2);
1807                 err = i40iw_handle_q_mem(iwdev, &req, iwpbl, use_pbles);
1808                 if (err)
1809                         goto error;
1810                 spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
1811                 list_add_tail(&iwpbl->list, &ucontext->qp_reg_mem_list);
1812                 iwpbl->on_list = true;
1813                 spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
1814                 break;
1815         case IW_MEMREG_TYPE_CQ:
1816                 use_pbles = (req.cq_pages > 1);
1817                 err = i40iw_handle_q_mem(iwdev, &req, iwpbl, use_pbles);
1818                 if (err)
1819                         goto error;
1820 
1821                 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
1822                 list_add_tail(&iwpbl->list, &ucontext->cq_reg_mem_list);
1823                 iwpbl->on_list = true;
1824                 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
1825                 break;
1826         case IW_MEMREG_TYPE_MEM:
1827                 use_pbles = (iwmr->page_cnt != 1);
1828                 access = I40IW_ACCESS_FLAGS_LOCALREAD;
1829 
1830                 err = i40iw_setup_pbles(iwdev, iwmr, use_pbles);
1831                 if (err)
1832                         goto error;
1833 
1834                 if (use_pbles) {
1835                         ret = i40iw_check_mr_contiguous(palloc, iwmr->page_size);
1836                         if (ret) {
1837                                 i40iw_free_pble(iwdev->pble_rsrc, palloc);
1838                                 iwpbl->pbl_allocated = false;
1839                         }
1840                 }
1841 
1842                 access |= i40iw_get_user_access(acc);
1843                 stag = i40iw_create_stag(iwdev);
1844                 if (!stag) {
1845                         err = -ENOMEM;
1846                         goto error;
1847                 }
1848 
1849                 iwmr->stag = stag;
1850                 iwmr->ibmr.rkey = stag;
1851                 iwmr->ibmr.lkey = stag;
1852 
1853                 err = i40iw_hwreg_mr(iwdev, iwmr, access);
1854                 if (err) {
1855                         i40iw_free_stag(iwdev, stag);
1856                         goto error;
1857                 }
1858 
1859                 break;
1860         default:
1861                 goto error;
1862         }
1863 
1864         iwmr->type = req.reg_type;
1865         if (req.reg_type == IW_MEMREG_TYPE_MEM)
1866                 i40iw_add_pdusecount(iwpd);
1867         return &iwmr->ibmr;
1868 
1869 error:
1870         if (palloc->level != I40IW_LEVEL_0 && iwpbl->pbl_allocated)
1871                 i40iw_free_pble(iwdev->pble_rsrc, palloc);
1872         ib_umem_release(region);
1873         kfree(iwmr);
1874         return ERR_PTR(err);
1875 }
1876 
1877 /**
1878  * i40iw_reg_phys_mr - register kernel physical memory
1879  * @pd: ibpd pointer
1880  * @addr: physical address of memory to register
1881  * @size: size of memory to register
1882  * @acc: Access rights
1883  * @iova_start: start of virtual address for physical buffers
1884  */
1885 struct ib_mr *i40iw_reg_phys_mr(struct ib_pd *pd,
1886                                 u64 addr,
1887                                 u64 size,
1888                                 int acc,
1889                                 u64 *iova_start)
1890 {
1891         struct i40iw_pd *iwpd = to_iwpd(pd);
1892         struct i40iw_device *iwdev = to_iwdev(pd->device);
1893         struct i40iw_pbl *iwpbl;
1894         struct i40iw_mr *iwmr;
1895         enum i40iw_status_code status;
1896         u32 stag;
1897         u16 access = I40IW_ACCESS_FLAGS_LOCALREAD;
1898         int ret;
1899 
1900         iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
1901         if (!iwmr)
1902                 return ERR_PTR(-ENOMEM);
1903         iwmr->ibmr.pd = pd;
1904         iwmr->ibmr.device = pd->device;
1905         iwpbl = &iwmr->iwpbl;
1906         iwpbl->iwmr = iwmr;
1907         iwmr->type = IW_MEMREG_TYPE_MEM;
1908         iwpbl->user_base = *iova_start;
1909         stag = i40iw_create_stag(iwdev);
1910         if (!stag) {
1911                 ret = -EOVERFLOW;
1912                 goto err;
1913         }
1914         access |= i40iw_get_user_access(acc);
1915         iwmr->stag = stag;
1916         iwmr->ibmr.rkey = stag;
1917         iwmr->ibmr.lkey = stag;
1918         iwmr->page_cnt = 1;
1919         iwmr->pgaddrmem[0]  = addr;
1920         iwmr->length = size;
1921         status = i40iw_hwreg_mr(iwdev, iwmr, access);
1922         if (status) {
1923                 i40iw_free_stag(iwdev, stag);
1924                 ret = -ENOMEM;
1925                 goto err;
1926         }
1927 
1928         i40iw_add_pdusecount(iwpd);
1929         return &iwmr->ibmr;
1930  err:
1931         kfree(iwmr);
1932         return ERR_PTR(ret);
1933 }
1934 
1935 /**
1936  * i40iw_get_dma_mr - register physical mem
1937  * @pd: ptr of pd
1938  * @acc: access for memory
1939  */
1940 static struct ib_mr *i40iw_get_dma_mr(struct ib_pd *pd, int acc)
1941 {
1942         u64 kva = 0;
1943 
1944         return i40iw_reg_phys_mr(pd, 0, 0, acc, &kva);
1945 }
1946 
1947 /**
1948  * i40iw_del_mem_list - Deleting pbl list entries for CQ/QP
1949  * @iwmr: iwmr for IB's user page addresses
1950  * @ucontext: ptr to user context
1951  */
1952 static void i40iw_del_memlist(struct i40iw_mr *iwmr,
1953                               struct i40iw_ucontext *ucontext)
1954 {
1955         struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1956         unsigned long flags;
1957 
1958         switch (iwmr->type) {
1959         case IW_MEMREG_TYPE_CQ:
1960                 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
1961                 if (iwpbl->on_list) {
1962                         iwpbl->on_list = false;
1963                         list_del(&iwpbl->list);
1964                 }
1965                 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
1966                 break;
1967         case IW_MEMREG_TYPE_QP:
1968                 spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
1969                 if (iwpbl->on_list) {
1970                         iwpbl->on_list = false;
1971                         list_del(&iwpbl->list);
1972                 }
1973                 spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
1974                 break;
1975         default:
1976                 break;
1977         }
1978 }
1979 
1980 /**
1981  * i40iw_dereg_mr - deregister mr
1982  * @ib_mr: mr ptr for dereg
1983  */
1984 static int i40iw_dereg_mr(struct ib_mr *ib_mr, struct ib_udata *udata)
1985 {
1986         struct ib_pd *ibpd = ib_mr->pd;
1987         struct i40iw_pd *iwpd = to_iwpd(ibpd);
1988         struct i40iw_mr *iwmr = to_iwmr(ib_mr);
1989         struct i40iw_device *iwdev = to_iwdev(ib_mr->device);
1990         enum i40iw_status_code status;
1991         struct i40iw_dealloc_stag_info *info;
1992         struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1993         struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1994         struct i40iw_cqp_request *cqp_request;
1995         struct cqp_commands_info *cqp_info;
1996         u32 stag_idx;
1997 
1998         ib_umem_release(iwmr->region);
1999 
2000         if (iwmr->type != IW_MEMREG_TYPE_MEM) {
2001                 /* region is released. only test for userness. */
2002                 if (iwmr->region) {
2003                         struct i40iw_ucontext *ucontext =
2004                                 rdma_udata_to_drv_context(
2005                                         udata,
2006                                         struct i40iw_ucontext,
2007                                         ibucontext);
2008 
2009                         i40iw_del_memlist(iwmr, ucontext);
2010                 }
2011                 if (iwpbl->pbl_allocated && iwmr->type != IW_MEMREG_TYPE_QP)
2012                         i40iw_free_pble(iwdev->pble_rsrc, palloc);
2013                 kfree(iwmr);
2014                 return 0;
2015         }
2016 
2017         cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
2018         if (!cqp_request)
2019                 return -ENOMEM;
2020 
2021         cqp_info = &cqp_request->info;
2022         info = &cqp_info->in.u.dealloc_stag.info;
2023         memset(info, 0, sizeof(*info));
2024 
2025         info->pd_id = cpu_to_le32(iwpd->sc_pd.pd_id & 0x00007fff);
2026         info->stag_idx = RS_64_1(ib_mr->rkey, I40IW_CQPSQ_STAG_IDX_SHIFT);
2027         stag_idx = info->stag_idx;
2028         info->mr = true;
2029         if (iwpbl->pbl_allocated)
2030                 info->dealloc_pbl = true;
2031 
2032         cqp_info->cqp_cmd = OP_DEALLOC_STAG;
2033         cqp_info->post_sq = 1;
2034         cqp_info->in.u.dealloc_stag.dev = &iwdev->sc_dev;
2035         cqp_info->in.u.dealloc_stag.scratch = (uintptr_t)cqp_request;
2036         status = i40iw_handle_cqp_op(iwdev, cqp_request);
2037         if (status)
2038                 i40iw_pr_err("CQP-OP dealloc failed for stag_idx = 0x%x\n", stag_idx);
2039         i40iw_rem_pdusecount(iwpd, iwdev);
2040         i40iw_free_stag(iwdev, iwmr->stag);
2041         if (iwpbl->pbl_allocated)
2042                 i40iw_free_pble(iwdev->pble_rsrc, palloc);
2043         kfree(iwmr);
2044         return 0;
2045 }
2046 
2047 /**
2048  * hw_rev_show
2049  */
2050 static ssize_t hw_rev_show(struct device *dev,
2051                            struct device_attribute *attr, char *buf)
2052 {
2053         struct i40iw_ib_device *iwibdev =
2054                 rdma_device_to_drv_device(dev, struct i40iw_ib_device, ibdev);
2055         u32 hw_rev = iwibdev->iwdev->sc_dev.hw_rev;
2056 
2057         return sprintf(buf, "%x\n", hw_rev);
2058 }
2059 static DEVICE_ATTR_RO(hw_rev);
2060 
2061 /**
2062  * hca_type_show
2063  */
2064 static ssize_t hca_type_show(struct device *dev,
2065                              struct device_attribute *attr, char *buf)
2066 {
2067         return sprintf(buf, "I40IW\n");
2068 }
2069 static DEVICE_ATTR_RO(hca_type);
2070 
2071 /**
2072  * board_id_show
2073  */
2074 static ssize_t board_id_show(struct device *dev,
2075                              struct device_attribute *attr, char *buf)
2076 {
2077         return sprintf(buf, "%.*s\n", 32, "I40IW Board ID");
2078 }
2079 static DEVICE_ATTR_RO(board_id);
2080 
2081 static struct attribute *i40iw_dev_attributes[] = {
2082         &dev_attr_hw_rev.attr,
2083         &dev_attr_hca_type.attr,
2084         &dev_attr_board_id.attr,
2085         NULL
2086 };
2087 
2088 static const struct attribute_group i40iw_attr_group = {
2089         .attrs = i40iw_dev_attributes,
2090 };
2091 
2092 /**
2093  * i40iw_copy_sg_list - copy sg list for qp
2094  * @sg_list: copied into sg_list
2095  * @sgl: copy from sgl
2096  * @num_sges: count of sg entries
2097  */
2098 static void i40iw_copy_sg_list(struct i40iw_sge *sg_list, struct ib_sge *sgl, int num_sges)
2099 {
2100         unsigned int i;
2101 
2102         for (i = 0; (i < num_sges) && (i < I40IW_MAX_WQ_FRAGMENT_COUNT); i++) {
2103                 sg_list[i].tag_off = sgl[i].addr;
2104                 sg_list[i].len = sgl[i].length;
2105                 sg_list[i].stag = sgl[i].lkey;
2106         }
2107 }
2108 
2109 /**
2110  * i40iw_post_send -  kernel application wr
2111  * @ibqp: qp ptr for wr
2112  * @ib_wr: work request ptr
2113  * @bad_wr: return of bad wr if err
2114  */
2115 static int i40iw_post_send(struct ib_qp *ibqp,
2116                            const struct ib_send_wr *ib_wr,
2117                            const struct ib_send_wr **bad_wr)
2118 {
2119         struct i40iw_qp *iwqp;
2120         struct i40iw_qp_uk *ukqp;
2121         struct i40iw_post_sq_info info;
2122         enum i40iw_status_code ret;
2123         int err = 0;
2124         unsigned long flags;
2125         bool inv_stag;
2126 
2127         iwqp = (struct i40iw_qp *)ibqp;
2128         ukqp = &iwqp->sc_qp.qp_uk;
2129 
2130         spin_lock_irqsave(&iwqp->lock, flags);
2131 
2132         if (iwqp->flush_issued) {
2133                 err = -EINVAL;
2134                 goto out;
2135         }
2136 
2137         while (ib_wr) {
2138                 inv_stag = false;
2139                 memset(&info, 0, sizeof(info));
2140                 info.wr_id = (u64)(ib_wr->wr_id);
2141                 if ((ib_wr->send_flags & IB_SEND_SIGNALED) || iwqp->sig_all)
2142                         info.signaled = true;
2143                 if (ib_wr->send_flags & IB_SEND_FENCE)
2144                         info.read_fence = true;
2145 
2146                 switch (ib_wr->opcode) {
2147                 case IB_WR_SEND:
2148                         /* fall-through */
2149                 case IB_WR_SEND_WITH_INV:
2150                         if (ib_wr->opcode == IB_WR_SEND) {
2151                                 if (ib_wr->send_flags & IB_SEND_SOLICITED)
2152                                         info.op_type = I40IW_OP_TYPE_SEND_SOL;
2153                                 else
2154                                         info.op_type = I40IW_OP_TYPE_SEND;
2155                         } else {
2156                                 if (ib_wr->send_flags & IB_SEND_SOLICITED)
2157                                         info.op_type = I40IW_OP_TYPE_SEND_SOL_INV;
2158                                 else
2159                                         info.op_type = I40IW_OP_TYPE_SEND_INV;
2160                         }
2161 
2162                         if (ib_wr->send_flags & IB_SEND_INLINE) {
2163                                 info.op.inline_send.data = (void *)(unsigned long)ib_wr->sg_list[0].addr;
2164                                 info.op.inline_send.len = ib_wr->sg_list[0].length;
2165                                 ret = ukqp->ops.iw_inline_send(ukqp, &info, ib_wr->ex.invalidate_rkey, false);
2166                         } else {
2167                                 info.op.send.num_sges = ib_wr->num_sge;
2168                                 info.op.send.sg_list = (struct i40iw_sge *)ib_wr->sg_list;
2169                                 ret = ukqp->ops.iw_send(ukqp, &info, ib_wr->ex.invalidate_rkey, false);
2170                         }
2171 
2172                         if (ret) {
2173                                 if (ret == I40IW_ERR_QP_TOOMANY_WRS_POSTED)
2174                                         err = -ENOMEM;
2175                                 else
2176                                         err = -EINVAL;
2177                         }
2178                         break;
2179                 case IB_WR_RDMA_WRITE:
2180                         info.op_type = I40IW_OP_TYPE_RDMA_WRITE;
2181 
2182                         if (ib_wr->send_flags & IB_SEND_INLINE) {
2183                                 info.op.inline_rdma_write.data = (void *)(unsigned long)ib_wr->sg_list[0].addr;
2184                                 info.op.inline_rdma_write.len = ib_wr->sg_list[0].length;
2185                                 info.op.inline_rdma_write.rem_addr.tag_off = rdma_wr(ib_wr)->remote_addr;
2186                                 info.op.inline_rdma_write.rem_addr.stag = rdma_wr(ib_wr)->rkey;
2187                                 ret = ukqp->ops.iw_inline_rdma_write(ukqp, &info, false);
2188                         } else {
2189                                 info.op.rdma_write.lo_sg_list = (void *)ib_wr->sg_list;
2190                                 info.op.rdma_write.num_lo_sges = ib_wr->num_sge;
2191                                 info.op.rdma_write.rem_addr.tag_off = rdma_wr(ib_wr)->remote_addr;
2192                                 info.op.rdma_write.rem_addr.stag = rdma_wr(ib_wr)->rkey;
2193                                 ret = ukqp->ops.iw_rdma_write(ukqp, &info, false);
2194                         }
2195 
2196                         if (ret) {
2197                                 if (ret == I40IW_ERR_QP_TOOMANY_WRS_POSTED)
2198                                         err = -ENOMEM;
2199                                 else
2200                                         err = -EINVAL;
2201                         }
2202                         break;
2203                 case IB_WR_RDMA_READ_WITH_INV:
2204                         inv_stag = true;
2205                         /* fall-through*/
2206                 case IB_WR_RDMA_READ:
2207                         if (ib_wr->num_sge > I40IW_MAX_SGE_RD) {
2208                                 err = -EINVAL;
2209                                 break;
2210                         }
2211                         info.op_type = I40IW_OP_TYPE_RDMA_READ;
2212                         info.op.rdma_read.rem_addr.tag_off = rdma_wr(ib_wr)->remote_addr;
2213                         info.op.rdma_read.rem_addr.stag = rdma_wr(ib_wr)->rkey;
2214                         info.op.rdma_read.lo_addr.tag_off = ib_wr->sg_list->addr;
2215                         info.op.rdma_read.lo_addr.stag = ib_wr->sg_list->lkey;
2216                         info.op.rdma_read.lo_addr.len = ib_wr->sg_list->length;
2217                         ret = ukqp->ops.iw_rdma_read(ukqp, &info, inv_stag, false);
2218                         if (ret) {
2219                                 if (ret == I40IW_ERR_QP_TOOMANY_WRS_POSTED)
2220                                         err = -ENOMEM;
2221                                 else
2222                                         err = -EINVAL;
2223                         }
2224                         break;
2225                 case IB_WR_LOCAL_INV:
2226                         info.op_type = I40IW_OP_TYPE_INV_STAG;
2227                         info.op.inv_local_stag.target_stag = ib_wr->ex.invalidate_rkey;
2228                         ret = ukqp->ops.iw_stag_local_invalidate(ukqp, &info, true);
2229                         if (ret)
2230                                 err = -ENOMEM;
2231                         break;
2232                 case IB_WR_REG_MR:
2233                 {
2234                         struct i40iw_mr *iwmr = to_iwmr(reg_wr(ib_wr)->mr);
2235                         int flags = reg_wr(ib_wr)->access;
2236                         struct i40iw_pble_alloc *palloc = &iwmr->iwpbl.pble_alloc;
2237                         struct i40iw_sc_dev *dev = &iwqp->iwdev->sc_dev;
2238                         struct i40iw_fast_reg_stag_info info;
2239 
2240                         memset(&info, 0, sizeof(info));
2241                         info.access_rights = I40IW_ACCESS_FLAGS_LOCALREAD;
2242                         info.access_rights |= i40iw_get_user_access(flags);
2243                         info.stag_key = reg_wr(ib_wr)->key & 0xff;
2244                         info.stag_idx = reg_wr(ib_wr)->key >> 8;
2245                         info.page_size = reg_wr(ib_wr)->mr->page_size;
2246                         info.wr_id = ib_wr->wr_id;
2247 
2248                         info.addr_type = I40IW_ADDR_TYPE_VA_BASED;
2249                         info.va = (void *)(uintptr_t)iwmr->ibmr.iova;
2250                         info.total_len = iwmr->ibmr.length;
2251                         info.reg_addr_pa = *(u64 *)palloc->level1.addr;
2252                         info.first_pm_pbl_index = palloc->level1.idx;
2253                         info.local_fence = ib_wr->send_flags & IB_SEND_FENCE;
2254                         info.signaled = ib_wr->send_flags & IB_SEND_SIGNALED;
2255 
2256                         if (iwmr->npages > I40IW_MIN_PAGES_PER_FMR)
2257                                 info.chunk_size = 1;
2258 
2259                         ret = dev->iw_priv_qp_ops->iw_mr_fast_register(&iwqp->sc_qp, &info, true);
2260                         if (ret)
2261                                 err = -ENOMEM;
2262                         break;
2263                 }
2264                 default:
2265                         err = -EINVAL;
2266                         i40iw_pr_err(" upost_send bad opcode = 0x%x\n",
2267                                      ib_wr->opcode);
2268                         break;
2269                 }
2270 
2271                 if (err)
2272                         break;
2273                 ib_wr = ib_wr->next;
2274         }
2275 
2276 out:
2277         if (err)
2278                 *bad_wr = ib_wr;
2279         else
2280                 ukqp->ops.iw_qp_post_wr(ukqp);
2281         spin_unlock_irqrestore(&iwqp->lock, flags);
2282 
2283         return err;
2284 }
2285 
2286 /**
2287  * i40iw_post_recv - post receive wr for kernel application
2288  * @ibqp: ib qp pointer
2289  * @ib_wr: work request for receive
2290  * @bad_wr: bad wr caused an error
2291  */
2292 static int i40iw_post_recv(struct ib_qp *ibqp, const struct ib_recv_wr *ib_wr,
2293                            const struct ib_recv_wr **bad_wr)
2294 {
2295         struct i40iw_qp *iwqp;
2296         struct i40iw_qp_uk *ukqp;
2297         struct i40iw_post_rq_info post_recv;
2298         struct i40iw_sge sg_list[I40IW_MAX_WQ_FRAGMENT_COUNT];
2299         enum i40iw_status_code ret = 0;
2300         unsigned long flags;
2301         int err = 0;
2302 
2303         iwqp = (struct i40iw_qp *)ibqp;
2304         ukqp = &iwqp->sc_qp.qp_uk;
2305 
2306         memset(&post_recv, 0, sizeof(post_recv));
2307         spin_lock_irqsave(&iwqp->lock, flags);
2308 
2309         if (iwqp->flush_issued) {
2310                 err = -EINVAL;
2311                 goto out;
2312         }
2313 
2314         while (ib_wr) {
2315                 post_recv.num_sges = ib_wr->num_sge;
2316                 post_recv.wr_id = ib_wr->wr_id;
2317                 i40iw_copy_sg_list(sg_list, ib_wr->sg_list, ib_wr->num_sge);
2318                 post_recv.sg_list = sg_list;
2319                 ret = ukqp->ops.iw_post_receive(ukqp, &post_recv);
2320                 if (ret) {
2321                         i40iw_pr_err(" post_recv err %d\n", ret);
2322                         if (ret == I40IW_ERR_QP_TOOMANY_WRS_POSTED)
2323                                 err = -ENOMEM;
2324                         else
2325                                 err = -EINVAL;
2326                         *bad_wr = ib_wr;
2327                         goto out;
2328                 }
2329                 ib_wr = ib_wr->next;
2330         }
2331  out:
2332         spin_unlock_irqrestore(&iwqp->lock, flags);
2333         return err;
2334 }
2335 
2336 /**
2337  * i40iw_poll_cq - poll cq for completion (kernel apps)
2338  * @ibcq: cq to poll
2339  * @num_entries: number of entries to poll
2340  * @entry: wr of entry completed
2341  */
2342 static int i40iw_poll_cq(struct ib_cq *ibcq,
2343                          int num_entries,
2344                          struct ib_wc *entry)
2345 {
2346         struct i40iw_cq *iwcq;
2347         int cqe_count = 0;
2348         struct i40iw_cq_poll_info cq_poll_info;
2349         enum i40iw_status_code ret;
2350         struct i40iw_cq_uk *ukcq;
2351         struct i40iw_sc_qp *qp;
2352         struct i40iw_qp *iwqp;
2353         unsigned long flags;
2354 
2355         iwcq = (struct i40iw_cq *)ibcq;
2356         ukcq = &iwcq->sc_cq.cq_uk;
2357 
2358         spin_lock_irqsave(&iwcq->lock, flags);
2359         while (cqe_count < num_entries) {
2360                 ret = ukcq->ops.iw_cq_poll_completion(ukcq, &cq_poll_info);
2361                 if (ret == I40IW_ERR_QUEUE_EMPTY) {
2362                         break;
2363                 } else if (ret == I40IW_ERR_QUEUE_DESTROYED) {
2364                         continue;
2365                 } else if (ret) {
2366                         if (!cqe_count)
2367                                 cqe_count = -1;
2368                         break;
2369                 }
2370                 entry->wc_flags = 0;
2371                 entry->wr_id = cq_poll_info.wr_id;
2372                 if (cq_poll_info.error) {
2373                         entry->status = IB_WC_WR_FLUSH_ERR;
2374                         entry->vendor_err = cq_poll_info.major_err << 16 | cq_poll_info.minor_err;
2375                 } else {
2376                         entry->status = IB_WC_SUCCESS;
2377                 }
2378 
2379                 switch (cq_poll_info.op_type) {
2380                 case I40IW_OP_TYPE_RDMA_WRITE:
2381                         entry->opcode = IB_WC_RDMA_WRITE;
2382                         break;
2383                 case I40IW_OP_TYPE_RDMA_READ_INV_STAG:
2384                 case I40IW_OP_TYPE_RDMA_READ:
2385                         entry->opcode = IB_WC_RDMA_READ;
2386                         break;
2387                 case I40IW_OP_TYPE_SEND_SOL:
2388                 case I40IW_OP_TYPE_SEND_SOL_INV:
2389                 case I40IW_OP_TYPE_SEND_INV:
2390                 case I40IW_OP_TYPE_SEND:
2391                         entry->opcode = IB_WC_SEND;
2392                         break;
2393                 case I40IW_OP_TYPE_REC:
2394                         entry->opcode = IB_WC_RECV;
2395                         break;
2396                 default:
2397                         entry->opcode = IB_WC_RECV;
2398                         break;
2399                 }
2400 
2401                 entry->ex.imm_data = 0;
2402                 qp = (struct i40iw_sc_qp *)cq_poll_info.qp_handle;
2403                 entry->qp = (struct ib_qp *)qp->back_qp;
2404                 entry->src_qp = cq_poll_info.qp_id;
2405                 iwqp = (struct i40iw_qp *)qp->back_qp;
2406                 if (iwqp->iwarp_state > I40IW_QP_STATE_RTS) {
2407                         if (!I40IW_RING_MORE_WORK(qp->qp_uk.sq_ring))
2408                                 complete(&iwqp->sq_drained);
2409                         if (!I40IW_RING_MORE_WORK(qp->qp_uk.rq_ring))
2410                                 complete(&iwqp->rq_drained);
2411                 }
2412                 entry->byte_len = cq_poll_info.bytes_xfered;
2413                 entry++;
2414                 cqe_count++;
2415         }
2416         spin_unlock_irqrestore(&iwcq->lock, flags);
2417         return cqe_count;
2418 }
2419 
2420 /**
2421  * i40iw_req_notify_cq - arm cq kernel application
2422  * @ibcq: cq to arm
2423  * @notify_flags: notofication flags
2424  */
2425 static int i40iw_req_notify_cq(struct ib_cq *ibcq,
2426                                enum ib_cq_notify_flags notify_flags)
2427 {
2428         struct i40iw_cq *iwcq;
2429         struct i40iw_cq_uk *ukcq;
2430         unsigned long flags;
2431         enum i40iw_completion_notify cq_notify = IW_CQ_COMPL_EVENT;
2432 
2433         iwcq = (struct i40iw_cq *)ibcq;
2434         ukcq = &iwcq->sc_cq.cq_uk;
2435         if (notify_flags == IB_CQ_SOLICITED)
2436                 cq_notify = IW_CQ_COMPL_SOLICITED;
2437         spin_lock_irqsave(&iwcq->lock, flags);
2438         ukcq->ops.iw_cq_request_notification(ukcq, cq_notify);
2439         spin_unlock_irqrestore(&iwcq->lock, flags);
2440         return 0;
2441 }
2442 
2443 /**
2444  * i40iw_port_immutable - return port's immutable data
2445  * @ibdev: ib dev struct
2446  * @port_num: port number
2447  * @immutable: immutable data for the port return
2448  */
2449 static int i40iw_port_immutable(struct ib_device *ibdev, u8 port_num,
2450                                 struct ib_port_immutable *immutable)
2451 {
2452         struct ib_port_attr attr;
2453         int err;
2454 
2455         immutable->core_cap_flags = RDMA_CORE_PORT_IWARP;
2456 
2457         err = ib_query_port(ibdev, port_num, &attr);
2458 
2459         if (err)
2460                 return err;
2461 
2462         immutable->pkey_tbl_len = attr.pkey_tbl_len;
2463         immutable->gid_tbl_len = attr.gid_tbl_len;
2464 
2465         return 0;
2466 }
2467 
2468 static const char * const i40iw_hw_stat_names[] = {
2469         // 32bit names
2470         [I40IW_HW_STAT_INDEX_IP4RXDISCARD] = "ip4InDiscards",
2471         [I40IW_HW_STAT_INDEX_IP4RXTRUNC] = "ip4InTruncatedPkts",
2472         [I40IW_HW_STAT_INDEX_IP4TXNOROUTE] = "ip4OutNoRoutes",
2473         [I40IW_HW_STAT_INDEX_IP6RXDISCARD] = "ip6InDiscards",
2474         [I40IW_HW_STAT_INDEX_IP6RXTRUNC] = "ip6InTruncatedPkts",
2475         [I40IW_HW_STAT_INDEX_IP6TXNOROUTE] = "ip6OutNoRoutes",
2476         [I40IW_HW_STAT_INDEX_TCPRTXSEG] = "tcpRetransSegs",
2477         [I40IW_HW_STAT_INDEX_TCPRXOPTERR] = "tcpInOptErrors",
2478         [I40IW_HW_STAT_INDEX_TCPRXPROTOERR] = "tcpInProtoErrors",
2479         // 64bit names
2480         [I40IW_HW_STAT_INDEX_IP4RXOCTS + I40IW_HW_STAT_INDEX_MAX_32] =
2481                 "ip4InOctets",
2482         [I40IW_HW_STAT_INDEX_IP4RXPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2483                 "ip4InPkts",
2484         [I40IW_HW_STAT_INDEX_IP4RXFRAGS + I40IW_HW_STAT_INDEX_MAX_32] =
2485                 "ip4InReasmRqd",
2486         [I40IW_HW_STAT_INDEX_IP4RXMCPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2487                 "ip4InMcastPkts",
2488         [I40IW_HW_STAT_INDEX_IP4TXOCTS + I40IW_HW_STAT_INDEX_MAX_32] =
2489                 "ip4OutOctets",
2490         [I40IW_HW_STAT_INDEX_IP4TXPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2491                 "ip4OutPkts",
2492         [I40IW_HW_STAT_INDEX_IP4TXFRAGS + I40IW_HW_STAT_INDEX_MAX_32] =
2493                 "ip4OutSegRqd",
2494         [I40IW_HW_STAT_INDEX_IP4TXMCPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2495                 "ip4OutMcastPkts",
2496         [I40IW_HW_STAT_INDEX_IP6RXOCTS + I40IW_HW_STAT_INDEX_MAX_32] =
2497                 "ip6InOctets",
2498         [I40IW_HW_STAT_INDEX_IP6RXPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2499                 "ip6InPkts",
2500         [I40IW_HW_STAT_INDEX_IP6RXFRAGS + I40IW_HW_STAT_INDEX_MAX_32] =
2501                 "ip6InReasmRqd",
2502         [I40IW_HW_STAT_INDEX_IP6RXMCPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2503                 "ip6InMcastPkts",
2504         [I40IW_HW_STAT_INDEX_IP6TXOCTS + I40IW_HW_STAT_INDEX_MAX_32] =
2505                 "ip6OutOctets",
2506         [I40IW_HW_STAT_INDEX_IP6TXPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2507                 "ip6OutPkts",
2508         [I40IW_HW_STAT_INDEX_IP6TXFRAGS + I40IW_HW_STAT_INDEX_MAX_32] =
2509                 "ip6OutSegRqd",
2510         [I40IW_HW_STAT_INDEX_IP6TXMCPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2511                 "ip6OutMcastPkts",
2512         [I40IW_HW_STAT_INDEX_TCPRXSEGS + I40IW_HW_STAT_INDEX_MAX_32] =
2513                 "tcpInSegs",
2514         [I40IW_HW_STAT_INDEX_TCPTXSEG + I40IW_HW_STAT_INDEX_MAX_32] =
2515                 "tcpOutSegs",
2516         [I40IW_HW_STAT_INDEX_RDMARXRDS + I40IW_HW_STAT_INDEX_MAX_32] =
2517                 "iwInRdmaReads",
2518         [I40IW_HW_STAT_INDEX_RDMARXSNDS + I40IW_HW_STAT_INDEX_MAX_32] =
2519                 "iwInRdmaSends",
2520         [I40IW_HW_STAT_INDEX_RDMARXWRS + I40IW_HW_STAT_INDEX_MAX_32] =
2521                 "iwInRdmaWrites",
2522         [I40IW_HW_STAT_INDEX_RDMATXRDS + I40IW_HW_STAT_INDEX_MAX_32] =
2523                 "iwOutRdmaReads",
2524         [I40IW_HW_STAT_INDEX_RDMATXSNDS + I40IW_HW_STAT_INDEX_MAX_32] =
2525                 "iwOutRdmaSends",
2526         [I40IW_HW_STAT_INDEX_RDMATXWRS + I40IW_HW_STAT_INDEX_MAX_32] =
2527                 "iwOutRdmaWrites",
2528         [I40IW_HW_STAT_INDEX_RDMAVBND + I40IW_HW_STAT_INDEX_MAX_32] =
2529                 "iwRdmaBnd",
2530         [I40IW_HW_STAT_INDEX_RDMAVINV + I40IW_HW_STAT_INDEX_MAX_32] =
2531                 "iwRdmaInv"
2532 };
2533 
2534 static void i40iw_get_dev_fw_str(struct ib_device *dev, char *str)
2535 {
2536         u32 firmware_version = I40IW_FW_VERSION;
2537 
2538         snprintf(str, IB_FW_VERSION_NAME_MAX, "%u.%u", firmware_version,
2539                  (firmware_version & 0x000000ff));
2540 }
2541 
2542 /**
2543  * i40iw_alloc_hw_stats - Allocate a hw stats structure
2544  * @ibdev: device pointer from stack
2545  * @port_num: port number
2546  */
2547 static struct rdma_hw_stats *i40iw_alloc_hw_stats(struct ib_device *ibdev,
2548                                                   u8 port_num)
2549 {
2550         struct i40iw_device *iwdev = to_iwdev(ibdev);
2551         struct i40iw_sc_dev *dev = &iwdev->sc_dev;
2552         int num_counters = I40IW_HW_STAT_INDEX_MAX_32 +
2553                 I40IW_HW_STAT_INDEX_MAX_64;
2554         unsigned long lifespan = RDMA_HW_STATS_DEFAULT_LIFESPAN;
2555 
2556         BUILD_BUG_ON(ARRAY_SIZE(i40iw_hw_stat_names) !=
2557                      (I40IW_HW_STAT_INDEX_MAX_32 +
2558                       I40IW_HW_STAT_INDEX_MAX_64));
2559 
2560         /*
2561          * PFs get the default update lifespan, but VFs only update once
2562          * per second
2563          */
2564         if (!dev->is_pf)
2565                 lifespan = 1000;
2566         return rdma_alloc_hw_stats_struct(i40iw_hw_stat_names, num_counters,
2567                                           lifespan);
2568 }
2569 
2570 /**
2571  * i40iw_get_hw_stats - Populates the rdma_hw_stats structure
2572  * @ibdev: device pointer from stack
2573  * @stats: stats pointer from stack
2574  * @port_num: port number
2575  * @index: which hw counter the stack is requesting we update
2576  */
2577 static int i40iw_get_hw_stats(struct ib_device *ibdev,
2578                               struct rdma_hw_stats *stats,
2579                               u8 port_num, int index)
2580 {
2581         struct i40iw_device *iwdev = to_iwdev(ibdev);
2582         struct i40iw_sc_dev *dev = &iwdev->sc_dev;
2583         struct i40iw_vsi_pestat *devstat = iwdev->vsi.pestat;
2584         struct i40iw_dev_hw_stats *hw_stats = &devstat->hw_stats;
2585 
2586         if (dev->is_pf) {
2587                 i40iw_hw_stats_read_all(devstat, &devstat->hw_stats);
2588         } else {
2589                 if (i40iw_vchnl_vf_get_pe_stats(dev, &devstat->hw_stats))
2590                         return -ENOSYS;
2591         }
2592 
2593         memcpy(&stats->value[0], hw_stats, sizeof(*hw_stats));
2594 
2595         return stats->num_counters;
2596 }
2597 
2598 /**
2599  * i40iw_query_gid - Query port GID
2600  * @ibdev: device pointer from stack
2601  * @port: port number
2602  * @index: Entry index
2603  * @gid: Global ID
2604  */
2605 static int i40iw_query_gid(struct ib_device *ibdev,
2606                            u8 port,
2607                            int index,
2608                            union ib_gid *gid)
2609 {
2610         struct i40iw_device *iwdev = to_iwdev(ibdev);
2611 
2612         memset(gid->raw, 0, sizeof(gid->raw));
2613         ether_addr_copy(gid->raw, iwdev->netdev->dev_addr);
2614         return 0;
2615 }
2616 
2617 /**
2618  * i40iw_query_pkey - Query partition key
2619  * @ibdev: device pointer from stack
2620  * @port: port number
2621  * @index: index of pkey
2622  * @pkey: pointer to store the pkey
2623  */
2624 static int i40iw_query_pkey(struct ib_device *ibdev,
2625                             u8 port,
2626                             u16 index,
2627                             u16 *pkey)
2628 {
2629         *pkey = 0;
2630         return 0;
2631 }
2632 
2633 static const struct ib_device_ops i40iw_dev_ops = {
2634         .owner = THIS_MODULE,
2635         .driver_id = RDMA_DRIVER_I40IW,
2636         /* NOTE: Older kernels wrongly use 0 for the uverbs_abi_ver */
2637         .uverbs_abi_ver = I40IW_ABI_VER,
2638 
2639         .alloc_hw_stats = i40iw_alloc_hw_stats,
2640         .alloc_mr = i40iw_alloc_mr,
2641         .alloc_pd = i40iw_alloc_pd,
2642         .alloc_ucontext = i40iw_alloc_ucontext,
2643         .create_cq = i40iw_create_cq,
2644         .create_qp = i40iw_create_qp,
2645         .dealloc_pd = i40iw_dealloc_pd,
2646         .dealloc_ucontext = i40iw_dealloc_ucontext,
2647         .dereg_mr = i40iw_dereg_mr,
2648         .destroy_cq = i40iw_destroy_cq,
2649         .destroy_qp = i40iw_destroy_qp,
2650         .drain_rq = i40iw_drain_rq,
2651         .drain_sq = i40iw_drain_sq,
2652         .get_dev_fw_str = i40iw_get_dev_fw_str,
2653         .get_dma_mr = i40iw_get_dma_mr,
2654         .get_hw_stats = i40iw_get_hw_stats,
2655         .get_port_immutable = i40iw_port_immutable,
2656         .iw_accept = i40iw_accept,
2657         .iw_add_ref = i40iw_add_ref,
2658         .iw_connect = i40iw_connect,
2659         .iw_create_listen = i40iw_create_listen,
2660         .iw_destroy_listen = i40iw_destroy_listen,
2661         .iw_get_qp = i40iw_get_qp,
2662         .iw_reject = i40iw_reject,
2663         .iw_rem_ref = i40iw_rem_ref,
2664         .map_mr_sg = i40iw_map_mr_sg,
2665         .mmap = i40iw_mmap,
2666         .modify_qp = i40iw_modify_qp,
2667         .poll_cq = i40iw_poll_cq,
2668         .post_recv = i40iw_post_recv,
2669         .post_send = i40iw_post_send,
2670         .query_device = i40iw_query_device,
2671         .query_gid = i40iw_query_gid,
2672         .query_pkey = i40iw_query_pkey,
2673         .query_port = i40iw_query_port,
2674         .query_qp = i40iw_query_qp,
2675         .reg_user_mr = i40iw_reg_user_mr,
2676         .req_notify_cq = i40iw_req_notify_cq,
2677         INIT_RDMA_OBJ_SIZE(ib_pd, i40iw_pd, ibpd),
2678         INIT_RDMA_OBJ_SIZE(ib_cq, i40iw_cq, ibcq),
2679         INIT_RDMA_OBJ_SIZE(ib_ucontext, i40iw_ucontext, ibucontext),
2680 };
2681 
2682 /**
2683  * i40iw_init_rdma_device - initialization of iwarp device
2684  * @iwdev: iwarp device
2685  */
2686 static struct i40iw_ib_device *i40iw_init_rdma_device(struct i40iw_device *iwdev)
2687 {
2688         struct i40iw_ib_device *iwibdev;
2689         struct net_device *netdev = iwdev->netdev;
2690         struct pci_dev *pcidev = (struct pci_dev *)iwdev->hw.dev_context;
2691 
2692         iwibdev = ib_alloc_device(i40iw_ib_device, ibdev);
2693         if (!iwibdev) {
2694                 i40iw_pr_err("iwdev == NULL\n");
2695                 return NULL;
2696         }
2697         iwdev->iwibdev = iwibdev;
2698         iwibdev->iwdev = iwdev;
2699 
2700         iwibdev->ibdev.node_type = RDMA_NODE_RNIC;
2701         ether_addr_copy((u8 *)&iwibdev->ibdev.node_guid, netdev->dev_addr);
2702 
2703         iwibdev->ibdev.uverbs_cmd_mask =
2704             (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
2705             (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
2706             (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
2707             (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
2708             (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
2709             (1ull << IB_USER_VERBS_CMD_REG_MR) |
2710             (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
2711             (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
2712             (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
2713             (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
2714             (1ull << IB_USER_VERBS_CMD_REQ_NOTIFY_CQ) |
2715             (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
2716             (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
2717             (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
2718             (1ull << IB_USER_VERBS_CMD_POLL_CQ) |
2719             (1ull << IB_USER_VERBS_CMD_CREATE_AH) |
2720             (1ull << IB_USER_VERBS_CMD_DESTROY_AH) |
2721             (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
2722             (1ull << IB_USER_VERBS_CMD_POST_RECV) |
2723             (1ull << IB_USER_VERBS_CMD_POST_SEND);
2724         iwibdev->ibdev.phys_port_cnt = 1;
2725         iwibdev->ibdev.num_comp_vectors = iwdev->ceqs_count;
2726         iwibdev->ibdev.dev.parent = &pcidev->dev;
2727         memcpy(iwibdev->ibdev.iw_ifname, netdev->name,
2728                sizeof(iwibdev->ibdev.iw_ifname));
2729         ib_set_device_ops(&iwibdev->ibdev, &i40iw_dev_ops);
2730 
2731         return iwibdev;
2732 }
2733 
2734 /**
2735  * i40iw_port_ibevent - indicate port event
2736  * @iwdev: iwarp device
2737  */
2738 void i40iw_port_ibevent(struct i40iw_device *iwdev)
2739 {
2740         struct i40iw_ib_device *iwibdev = iwdev->iwibdev;
2741         struct ib_event event;
2742 
2743         event.device = &iwibdev->ibdev;
2744         event.element.port_num = 1;
2745         event.event = iwdev->iw_status ? IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR;
2746         ib_dispatch_event(&event);
2747 }
2748 
2749 /**
2750  * i40iw_destroy_rdma_device - destroy rdma device and free resources
2751  * @iwibdev: IB device ptr
2752  */
2753 void i40iw_destroy_rdma_device(struct i40iw_ib_device *iwibdev)
2754 {
2755         ib_unregister_device(&iwibdev->ibdev);
2756         wait_event_timeout(iwibdev->iwdev->close_wq,
2757                            !atomic64_read(&iwibdev->iwdev->use_count),
2758                            I40IW_EVENT_TIMEOUT);
2759         ib_dealloc_device(&iwibdev->ibdev);
2760 }
2761 
2762 /**
2763  * i40iw_register_rdma_device - register iwarp device to IB
2764  * @iwdev: iwarp device
2765  */
2766 int i40iw_register_rdma_device(struct i40iw_device *iwdev)
2767 {
2768         int ret;
2769         struct i40iw_ib_device *iwibdev;
2770 
2771         iwdev->iwibdev = i40iw_init_rdma_device(iwdev);
2772         if (!iwdev->iwibdev)
2773                 return -ENOMEM;
2774         iwibdev = iwdev->iwibdev;
2775         rdma_set_device_sysfs_group(&iwibdev->ibdev, &i40iw_attr_group);
2776         ret = ib_device_set_netdev(&iwibdev->ibdev, iwdev->netdev, 1);
2777         if (ret)
2778                 goto error;
2779 
2780         ret = ib_register_device(&iwibdev->ibdev, "i40iw%d");
2781         if (ret)
2782                 goto error;
2783 
2784         return 0;
2785 error:
2786         ib_dealloc_device(&iwdev->iwibdev->ibdev);
2787         return ret;
2788 }
/* [<][>][^][v][top][bottom][index][help] */
root/drivers/infiniband/hw/i40iw/i40iw_verbs.c

DEFINITIONS
