drivers/infiniband/hw/qib/qib

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This source file includes following definitions.
qib_count_sge
qib_copy_from_sge
qib_qp_rcv
qib_ib_rcv
mem_timer
get_upper_bits
set_upper_bits
clear_upper_bytes
get_upper_bits
set_upper_bits
clear_upper_bytes
copy_io
__get_txreq
get_txreq
qib_put_txreq
qib_verbs_sdma_desc_avail
sdma_complete
wait_kmem
qib_verbs_send_dma
no_bufs_available
qib_verbs_send_pio
qib_verbs_send
qib_snapshot_counters
qib_get_counters
qib_ib_piobufavail
qib_query_port
qib_modify_device
qib_shut_down_port
qib_get_guid_be
qib_check_ah
qib_notify_new_ah
qib_create_qp0_ah
qib_get_npkeys
qib_get_pkey
init_ibport
qib_fill_device_attr
qib_register_ib_device
qib_unregister_ib_device
_qib_schedule_send
qib_schedule_send
   1 /*
   2  * Copyright (c) 2012 - 2018 Intel Corporation.  All rights reserved.
   3  * Copyright (c) 2006 - 2012 QLogic Corporation. All rights reserved.
   4  * Copyright (c) 2005, 2006 PathScale, Inc. All rights reserved.
   5  *
   6  * This software is available to you under a choice of one of two
   7  * licenses.  You may choose to be licensed under the terms of the GNU
   8  * General Public License (GPL) Version 2, available from the file
   9  * COPYING in the main directory of this source tree, or the
  10  * OpenIB.org BSD license below:
  11  *
  12  *     Redistribution and use in source and binary forms, with or
  13  *     without modification, are permitted provided that the following
  14  *     conditions are met:
  15  *
  16  *      - Redistributions of source code must retain the above
  17  *        copyright notice, this list of conditions and the following
  18  *        disclaimer.
  19  *
  20  *      - Redistributions in binary form must reproduce the above
  21  *        copyright notice, this list of conditions and the following
  22  *        disclaimer in the documentation and/or other materials
  23  *        provided with the distribution.
  24  *
  25  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  26  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  27  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  28  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  29  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  30  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  31  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  32  * SOFTWARE.
  33  */
  34 
  35 #include <rdma/ib_mad.h>
  36 #include <rdma/ib_user_verbs.h>
  37 #include <linux/io.h>
  38 #include <linux/module.h>
  39 #include <linux/utsname.h>
  40 #include <linux/rculist.h>
  41 #include <linux/mm.h>
  42 #include <linux/random.h>
  43 #include <linux/vmalloc.h>
  44 #include <rdma/rdma_vt.h>
  45 
  46 #include "qib.h"
  47 #include "qib_common.h"
  48 
  49 static unsigned int ib_qib_qp_table_size = 256;
  50 module_param_named(qp_table_size, ib_qib_qp_table_size, uint, S_IRUGO);
  51 MODULE_PARM_DESC(qp_table_size, "QP table size");
  52 
  53 static unsigned int qib_lkey_table_size = 16;
  54 module_param_named(lkey_table_size, qib_lkey_table_size, uint,
  55                    S_IRUGO);
  56 MODULE_PARM_DESC(lkey_table_size,
  57                  "LKEY table size in bits (2^n, 1 <= n <= 23)");
  58 
  59 static unsigned int ib_qib_max_pds = 0xFFFF;
  60 module_param_named(max_pds, ib_qib_max_pds, uint, S_IRUGO);
  61 MODULE_PARM_DESC(max_pds,
  62                  "Maximum number of protection domains to support");
  63 
  64 static unsigned int ib_qib_max_ahs = 0xFFFF;
  65 module_param_named(max_ahs, ib_qib_max_ahs, uint, S_IRUGO);
  66 MODULE_PARM_DESC(max_ahs, "Maximum number of address handles to support");
  67 
  68 unsigned int ib_qib_max_cqes = 0x2FFFF;
  69 module_param_named(max_cqes, ib_qib_max_cqes, uint, S_IRUGO);
  70 MODULE_PARM_DESC(max_cqes,
  71                  "Maximum number of completion queue entries to support");
  72 
  73 unsigned int ib_qib_max_cqs = 0x1FFFF;
  74 module_param_named(max_cqs, ib_qib_max_cqs, uint, S_IRUGO);
  75 MODULE_PARM_DESC(max_cqs, "Maximum number of completion queues to support");
  76 
  77 unsigned int ib_qib_max_qp_wrs = 0x3FFF;
  78 module_param_named(max_qp_wrs, ib_qib_max_qp_wrs, uint, S_IRUGO);
  79 MODULE_PARM_DESC(max_qp_wrs, "Maximum number of QP WRs to support");
  80 
  81 unsigned int ib_qib_max_qps = 16384;
  82 module_param_named(max_qps, ib_qib_max_qps, uint, S_IRUGO);
  83 MODULE_PARM_DESC(max_qps, "Maximum number of QPs to support");
  84 
  85 unsigned int ib_qib_max_sges = 0x60;
  86 module_param_named(max_sges, ib_qib_max_sges, uint, S_IRUGO);
  87 MODULE_PARM_DESC(max_sges, "Maximum number of SGEs to support");
  88 
  89 unsigned int ib_qib_max_mcast_grps = 16384;
  90 module_param_named(max_mcast_grps, ib_qib_max_mcast_grps, uint, S_IRUGO);
  91 MODULE_PARM_DESC(max_mcast_grps,
  92                  "Maximum number of multicast groups to support");
  93 
  94 unsigned int ib_qib_max_mcast_qp_attached = 16;
  95 module_param_named(max_mcast_qp_attached, ib_qib_max_mcast_qp_attached,
  96                    uint, S_IRUGO);
  97 MODULE_PARM_DESC(max_mcast_qp_attached,
  98                  "Maximum number of attached QPs to support");
  99 
 100 unsigned int ib_qib_max_srqs = 1024;
 101 module_param_named(max_srqs, ib_qib_max_srqs, uint, S_IRUGO);
 102 MODULE_PARM_DESC(max_srqs, "Maximum number of SRQs to support");
 103 
 104 unsigned int ib_qib_max_srq_sges = 128;
 105 module_param_named(max_srq_sges, ib_qib_max_srq_sges, uint, S_IRUGO);
 106 MODULE_PARM_DESC(max_srq_sges, "Maximum number of SRQ SGEs to support");
 107 
 108 unsigned int ib_qib_max_srq_wrs = 0x1FFFF;
 109 module_param_named(max_srq_wrs, ib_qib_max_srq_wrs, uint, S_IRUGO);
 110 MODULE_PARM_DESC(max_srq_wrs, "Maximum number of SRQ WRs support");
 111 
 112 static unsigned int ib_qib_disable_sma;
 113 module_param_named(disable_sma, ib_qib_disable_sma, uint, S_IWUSR | S_IRUGO);
 114 MODULE_PARM_DESC(disable_sma, "Disable the SMA");
 115 
 116 /*
 117  * Translate ib_wr_opcode into ib_wc_opcode.
 118  */
 119 const enum ib_wc_opcode ib_qib_wc_opcode[] = {
 120         [IB_WR_RDMA_WRITE] = IB_WC_RDMA_WRITE,
 121         [IB_WR_RDMA_WRITE_WITH_IMM] = IB_WC_RDMA_WRITE,
 122         [IB_WR_SEND] = IB_WC_SEND,
 123         [IB_WR_SEND_WITH_IMM] = IB_WC_SEND,
 124         [IB_WR_RDMA_READ] = IB_WC_RDMA_READ,
 125         [IB_WR_ATOMIC_CMP_AND_SWP] = IB_WC_COMP_SWAP,
 126         [IB_WR_ATOMIC_FETCH_AND_ADD] = IB_WC_FETCH_ADD
 127 };
 128 
 129 /*
 130  * System image GUID.
 131  */
 132 __be64 ib_qib_sys_image_guid;
 133 
 134 /*
 135  * Count the number of DMA descriptors needed to send length bytes of data.
 136  * Don't modify the qib_sge_state to get the count.
 137  * Return zero if any of the segments is not aligned.
 138  */
 139 static u32 qib_count_sge(struct rvt_sge_state *ss, u32 length)
 140 {
 141         struct rvt_sge *sg_list = ss->sg_list;
 142         struct rvt_sge sge = ss->sge;
 143         u8 num_sge = ss->num_sge;
 144         u32 ndesc = 1;  /* count the header */
 145 
 146         while (length) {
 147                 u32 len = rvt_get_sge_length(&sge, length);
 148 
 149                 if (((long) sge.vaddr & (sizeof(u32) - 1)) ||
 150                     (len != length && (len & (sizeof(u32) - 1)))) {
 151                         ndesc = 0;
 152                         break;
 153                 }
 154                 ndesc++;
 155                 sge.vaddr += len;
 156                 sge.length -= len;
 157                 sge.sge_length -= len;
 158                 if (sge.sge_length == 0) {
 159                         if (--num_sge)
 160                                 sge = *sg_list++;
 161                 } else if (sge.length == 0 && sge.mr->lkey) {
 162                         if (++sge.n >= RVT_SEGSZ) {
 163                                 if (++sge.m >= sge.mr->mapsz)
 164                                         break;
 165                                 sge.n = 0;
 166                         }
 167                         sge.vaddr =
 168                                 sge.mr->map[sge.m]->segs[sge.n].vaddr;
 169                         sge.length =
 170                                 sge.mr->map[sge.m]->segs[sge.n].length;
 171                 }
 172                 length -= len;
 173         }
 174         return ndesc;
 175 }
 176 
 177 /*
 178  * Copy from the SGEs to the data buffer.
 179  */
 180 static void qib_copy_from_sge(void *data, struct rvt_sge_state *ss, u32 length)
 181 {
 182         struct rvt_sge *sge = &ss->sge;
 183 
 184         while (length) {
 185                 u32 len = rvt_get_sge_length(sge, length);
 186 
 187                 memcpy(data, sge->vaddr, len);
 188                 sge->vaddr += len;
 189                 sge->length -= len;
 190                 sge->sge_length -= len;
 191                 if (sge->sge_length == 0) {
 192                         if (--ss->num_sge)
 193                                 *sge = *ss->sg_list++;
 194                 } else if (sge->length == 0 && sge->mr->lkey) {
 195                         if (++sge->n >= RVT_SEGSZ) {
 196                                 if (++sge->m >= sge->mr->mapsz)
 197                                         break;
 198                                 sge->n = 0;
 199                         }
 200                         sge->vaddr =
 201                                 sge->mr->map[sge->m]->segs[sge->n].vaddr;
 202                         sge->length =
 203                                 sge->mr->map[sge->m]->segs[sge->n].length;
 204                 }
 205                 data += len;
 206                 length -= len;
 207         }
 208 }
 209 
 210 /**
 211  * qib_qp_rcv - processing an incoming packet on a QP
 212  * @rcd: the context pointer
 213  * @hdr: the packet header
 214  * @has_grh: true if the packet has a GRH
 215  * @data: the packet data
 216  * @tlen: the packet length
 217  * @qp: the QP the packet came on
 218  *
 219  * This is called from qib_ib_rcv() to process an incoming packet
 220  * for the given QP.
 221  * Called at interrupt level.
 222  */
 223 static void qib_qp_rcv(struct qib_ctxtdata *rcd, struct ib_header *hdr,
 224                        int has_grh, void *data, u32 tlen, struct rvt_qp *qp)
 225 {
 226         struct qib_ibport *ibp = &rcd->ppd->ibport_data;
 227 
 228         spin_lock(&qp->r_lock);
 229 
 230         /* Check for valid receive state. */
 231         if (!(ib_rvt_state_ops[qp->state] & RVT_PROCESS_RECV_OK)) {
 232                 ibp->rvp.n_pkt_drops++;
 233                 goto unlock;
 234         }
 235 
 236         switch (qp->ibqp.qp_type) {
 237         case IB_QPT_SMI:
 238         case IB_QPT_GSI:
 239                 if (ib_qib_disable_sma)
 240                         break;
 241                 /* FALLTHROUGH */
 242         case IB_QPT_UD:
 243                 qib_ud_rcv(ibp, hdr, has_grh, data, tlen, qp);
 244                 break;
 245 
 246         case IB_QPT_RC:
 247                 qib_rc_rcv(rcd, hdr, has_grh, data, tlen, qp);
 248                 break;
 249 
 250         case IB_QPT_UC:
 251                 qib_uc_rcv(ibp, hdr, has_grh, data, tlen, qp);
 252                 break;
 253 
 254         default:
 255                 break;
 256         }
 257 
 258 unlock:
 259         spin_unlock(&qp->r_lock);
 260 }
 261 
 262 /**
 263  * qib_ib_rcv - process an incoming packet
 264  * @rcd: the context pointer
 265  * @rhdr: the header of the packet
 266  * @data: the packet payload
 267  * @tlen: the packet length
 268  *
 269  * This is called from qib_kreceive() to process an incoming packet at
 270  * interrupt level. Tlen is the length of the header + data + CRC in bytes.
 271  */
 272 void qib_ib_rcv(struct qib_ctxtdata *rcd, void *rhdr, void *data, u32 tlen)
 273 {
 274         struct qib_pportdata *ppd = rcd->ppd;
 275         struct qib_ibport *ibp = &ppd->ibport_data;
 276         struct ib_header *hdr = rhdr;
 277         struct qib_devdata *dd = ppd->dd;
 278         struct rvt_dev_info *rdi = &dd->verbs_dev.rdi;
 279         struct ib_other_headers *ohdr;
 280         struct rvt_qp *qp;
 281         u32 qp_num;
 282         int lnh;
 283         u8 opcode;
 284         u16 lid;
 285 
 286         /* 24 == LRH+BTH+CRC */
 287         if (unlikely(tlen < 24))
 288                 goto drop;
 289 
 290         /* Check for a valid destination LID (see ch. 7.11.1). */
 291         lid = be16_to_cpu(hdr->lrh[1]);
 292         if (lid < be16_to_cpu(IB_MULTICAST_LID_BASE)) {
 293                 lid &= ~((1 << ppd->lmc) - 1);
 294                 if (unlikely(lid != ppd->lid))
 295                         goto drop;
 296         }
 297 
 298         /* Check for GRH */
 299         lnh = be16_to_cpu(hdr->lrh[0]) & 3;
 300         if (lnh == QIB_LRH_BTH)
 301                 ohdr = &hdr->u.oth;
 302         else if (lnh == QIB_LRH_GRH) {
 303                 u32 vtf;
 304 
 305                 ohdr = &hdr->u.l.oth;
 306                 if (hdr->u.l.grh.next_hdr != IB_GRH_NEXT_HDR)
 307                         goto drop;
 308                 vtf = be32_to_cpu(hdr->u.l.grh.version_tclass_flow);
 309                 if ((vtf >> IB_GRH_VERSION_SHIFT) != IB_GRH_VERSION)
 310                         goto drop;
 311         } else
 312                 goto drop;
 313 
 314         opcode = (be32_to_cpu(ohdr->bth[0]) >> 24) & 0x7f;
 315 #ifdef CONFIG_DEBUG_FS
 316         rcd->opstats->stats[opcode].n_bytes += tlen;
 317         rcd->opstats->stats[opcode].n_packets++;
 318 #endif
 319 
 320         /* Get the destination QP number. */
 321         qp_num = be32_to_cpu(ohdr->bth[1]) & RVT_QPN_MASK;
 322         if (qp_num == QIB_MULTICAST_QPN) {
 323                 struct rvt_mcast *mcast;
 324                 struct rvt_mcast_qp *p;
 325 
 326                 if (lnh != QIB_LRH_GRH)
 327                         goto drop;
 328                 mcast = rvt_mcast_find(&ibp->rvp, &hdr->u.l.grh.dgid, lid);
 329                 if (mcast == NULL)
 330                         goto drop;
 331                 this_cpu_inc(ibp->pmastats->n_multicast_rcv);
 332                 rcu_read_lock();
 333                 list_for_each_entry_rcu(p, &mcast->qp_list, list)
 334                         qib_qp_rcv(rcd, hdr, 1, data, tlen, p->qp);
 335                 rcu_read_unlock();
 336                 /*
 337                  * Notify rvt_multicast_detach() if it is waiting for us
 338                  * to finish.
 339                  */
 340                 if (atomic_dec_return(&mcast->refcount) <= 1)
 341                         wake_up(&mcast->wait);
 342         } else {
 343                 rcu_read_lock();
 344                 qp = rvt_lookup_qpn(rdi, &ibp->rvp, qp_num);
 345                 if (!qp) {
 346                         rcu_read_unlock();
 347                         goto drop;
 348                 }
 349                 this_cpu_inc(ibp->pmastats->n_unicast_rcv);
 350                 qib_qp_rcv(rcd, hdr, lnh == QIB_LRH_GRH, data, tlen, qp);
 351                 rcu_read_unlock();
 352         }
 353         return;
 354 
 355 drop:
 356         ibp->rvp.n_pkt_drops++;
 357 }
 358 
 359 /*
 360  * This is called from a timer to check for QPs
 361  * which need kernel memory in order to send a packet.
 362  */
 363 static void mem_timer(struct timer_list *t)
 364 {
 365         struct qib_ibdev *dev = from_timer(dev, t, mem_timer);
 366         struct list_head *list = &dev->memwait;
 367         struct rvt_qp *qp = NULL;
 368         struct qib_qp_priv *priv = NULL;
 369         unsigned long flags;
 370 
 371         spin_lock_irqsave(&dev->rdi.pending_lock, flags);
 372         if (!list_empty(list)) {
 373                 priv = list_entry(list->next, struct qib_qp_priv, iowait);
 374                 qp = priv->owner;
 375                 list_del_init(&priv->iowait);
 376                 rvt_get_qp(qp);
 377                 if (!list_empty(list))
 378                         mod_timer(&dev->mem_timer, jiffies + 1);
 379         }
 380         spin_unlock_irqrestore(&dev->rdi.pending_lock, flags);
 381 
 382         if (qp) {
 383                 spin_lock_irqsave(&qp->s_lock, flags);
 384                 if (qp->s_flags & RVT_S_WAIT_KMEM) {
 385                         qp->s_flags &= ~RVT_S_WAIT_KMEM;
 386                         qib_schedule_send(qp);
 387                 }
 388                 spin_unlock_irqrestore(&qp->s_lock, flags);
 389                 rvt_put_qp(qp);
 390         }
 391 }
 392 
 393 #ifdef __LITTLE_ENDIAN
 394 static inline u32 get_upper_bits(u32 data, u32 shift)
 395 {
 396         return data >> shift;
 397 }
 398 
 399 static inline u32 set_upper_bits(u32 data, u32 shift)
 400 {
 401         return data << shift;
 402 }
 403 
 404 static inline u32 clear_upper_bytes(u32 data, u32 n, u32 off)
 405 {
 406         data <<= ((sizeof(u32) - n) * BITS_PER_BYTE);
 407         data >>= ((sizeof(u32) - n - off) * BITS_PER_BYTE);
 408         return data;
 409 }
 410 #else
 411 static inline u32 get_upper_bits(u32 data, u32 shift)
 412 {
 413         return data << shift;
 414 }
 415 
 416 static inline u32 set_upper_bits(u32 data, u32 shift)
 417 {
 418         return data >> shift;
 419 }
 420 
 421 static inline u32 clear_upper_bytes(u32 data, u32 n, u32 off)
 422 {
 423         data >>= ((sizeof(u32) - n) * BITS_PER_BYTE);
 424         data <<= ((sizeof(u32) - n - off) * BITS_PER_BYTE);
 425         return data;
 426 }
 427 #endif
 428 
 429 static void copy_io(u32 __iomem *piobuf, struct rvt_sge_state *ss,
 430                     u32 length, unsigned flush_wc)
 431 {
 432         u32 extra = 0;
 433         u32 data = 0;
 434         u32 last;
 435 
 436         while (1) {
 437                 u32 len = rvt_get_sge_length(&ss->sge, length);
 438                 u32 off;
 439 
 440                 /* If the source address is not aligned, try to align it. */
 441                 off = (unsigned long)ss->sge.vaddr & (sizeof(u32) - 1);
 442                 if (off) {
 443                         u32 *addr = (u32 *)((unsigned long)ss->sge.vaddr &
 444                                             ~(sizeof(u32) - 1));
 445                         u32 v = get_upper_bits(*addr, off * BITS_PER_BYTE);
 446                         u32 y;
 447 
 448                         y = sizeof(u32) - off;
 449                         if (len > y)
 450                                 len = y;
 451                         if (len + extra >= sizeof(u32)) {
 452                                 data |= set_upper_bits(v, extra *
 453                                                        BITS_PER_BYTE);
 454                                 len = sizeof(u32) - extra;
 455                                 if (len == length) {
 456                                         last = data;
 457                                         break;
 458                                 }
 459                                 __raw_writel(data, piobuf);
 460                                 piobuf++;
 461                                 extra = 0;
 462                                 data = 0;
 463                         } else {
 464                                 /* Clear unused upper bytes */
 465                                 data |= clear_upper_bytes(v, len, extra);
 466                                 if (len == length) {
 467                                         last = data;
 468                                         break;
 469                                 }
 470                                 extra += len;
 471                         }
 472                 } else if (extra) {
 473                         /* Source address is aligned. */
 474                         u32 *addr = (u32 *) ss->sge.vaddr;
 475                         int shift = extra * BITS_PER_BYTE;
 476                         int ushift = 32 - shift;
 477                         u32 l = len;
 478 
 479                         while (l >= sizeof(u32)) {
 480                                 u32 v = *addr;
 481 
 482                                 data |= set_upper_bits(v, shift);
 483                                 __raw_writel(data, piobuf);
 484                                 data = get_upper_bits(v, ushift);
 485                                 piobuf++;
 486                                 addr++;
 487                                 l -= sizeof(u32);
 488                         }
 489                         /*
 490                          * We still have 'extra' number of bytes leftover.
 491                          */
 492                         if (l) {
 493                                 u32 v = *addr;
 494 
 495                                 if (l + extra >= sizeof(u32)) {
 496                                         data |= set_upper_bits(v, shift);
 497                                         len -= l + extra - sizeof(u32);
 498                                         if (len == length) {
 499                                                 last = data;
 500                                                 break;
 501                                         }
 502                                         __raw_writel(data, piobuf);
 503                                         piobuf++;
 504                                         extra = 0;
 505                                         data = 0;
 506                                 } else {
 507                                         /* Clear unused upper bytes */
 508                                         data |= clear_upper_bytes(v, l, extra);
 509                                         if (len == length) {
 510                                                 last = data;
 511                                                 break;
 512                                         }
 513                                         extra += l;
 514                                 }
 515                         } else if (len == length) {
 516                                 last = data;
 517                                 break;
 518                         }
 519                 } else if (len == length) {
 520                         u32 w;
 521 
 522                         /*
 523                          * Need to round up for the last dword in the
 524                          * packet.
 525                          */
 526                         w = (len + 3) >> 2;
 527                         qib_pio_copy(piobuf, ss->sge.vaddr, w - 1);
 528                         piobuf += w - 1;
 529                         last = ((u32 *) ss->sge.vaddr)[w - 1];
 530                         break;
 531                 } else {
 532                         u32 w = len >> 2;
 533 
 534                         qib_pio_copy(piobuf, ss->sge.vaddr, w);
 535                         piobuf += w;
 536 
 537                         extra = len & (sizeof(u32) - 1);
 538                         if (extra) {
 539                                 u32 v = ((u32 *) ss->sge.vaddr)[w];
 540 
 541                                 /* Clear unused upper bytes */
 542                                 data = clear_upper_bytes(v, extra, 0);
 543                         }
 544                 }
 545                 rvt_update_sge(ss, len, false);
 546                 length -= len;
 547         }
 548         /* Update address before sending packet. */
 549         rvt_update_sge(ss, length, false);
 550         if (flush_wc) {
 551                 /* must flush early everything before trigger word */
 552                 qib_flush_wc();
 553                 __raw_writel(last, piobuf);
 554                 /* be sure trigger word is written */
 555                 qib_flush_wc();
 556         } else
 557                 __raw_writel(last, piobuf);
 558 }
 559 
 560 static noinline struct qib_verbs_txreq *__get_txreq(struct qib_ibdev *dev,
 561                                            struct rvt_qp *qp)
 562 {
 563         struct qib_qp_priv *priv = qp->priv;
 564         struct qib_verbs_txreq *tx;
 565         unsigned long flags;
 566 
 567         spin_lock_irqsave(&qp->s_lock, flags);
 568         spin_lock(&dev->rdi.pending_lock);
 569 
 570         if (!list_empty(&dev->txreq_free)) {
 571                 struct list_head *l = dev->txreq_free.next;
 572 
 573                 list_del(l);
 574                 spin_unlock(&dev->rdi.pending_lock);
 575                 spin_unlock_irqrestore(&qp->s_lock, flags);
 576                 tx = list_entry(l, struct qib_verbs_txreq, txreq.list);
 577         } else {
 578                 if (ib_rvt_state_ops[qp->state] & RVT_PROCESS_RECV_OK &&
 579                     list_empty(&priv->iowait)) {
 580                         dev->n_txwait++;
 581                         qp->s_flags |= RVT_S_WAIT_TX;
 582                         list_add_tail(&priv->iowait, &dev->txwait);
 583                 }
 584                 qp->s_flags &= ~RVT_S_BUSY;
 585                 spin_unlock(&dev->rdi.pending_lock);
 586                 spin_unlock_irqrestore(&qp->s_lock, flags);
 587                 tx = ERR_PTR(-EBUSY);
 588         }
 589         return tx;
 590 }
 591 
 592 static inline struct qib_verbs_txreq *get_txreq(struct qib_ibdev *dev,
 593                                          struct rvt_qp *qp)
 594 {
 595         struct qib_verbs_txreq *tx;
 596         unsigned long flags;
 597 
 598         spin_lock_irqsave(&dev->rdi.pending_lock, flags);
 599         /* assume the list non empty */
 600         if (likely(!list_empty(&dev->txreq_free))) {
 601                 struct list_head *l = dev->txreq_free.next;
 602 
 603                 list_del(l);
 604                 spin_unlock_irqrestore(&dev->rdi.pending_lock, flags);
 605                 tx = list_entry(l, struct qib_verbs_txreq, txreq.list);
 606         } else {
 607                 /* call slow path to get the extra lock */
 608                 spin_unlock_irqrestore(&dev->rdi.pending_lock, flags);
 609                 tx =  __get_txreq(dev, qp);
 610         }
 611         return tx;
 612 }
 613 
 614 void qib_put_txreq(struct qib_verbs_txreq *tx)
 615 {
 616         struct qib_ibdev *dev;
 617         struct rvt_qp *qp;
 618         struct qib_qp_priv *priv;
 619         unsigned long flags;
 620 
 621         qp = tx->qp;
 622         dev = to_idev(qp->ibqp.device);
 623 
 624         if (tx->mr) {
 625                 rvt_put_mr(tx->mr);
 626                 tx->mr = NULL;
 627         }
 628         if (tx->txreq.flags & QIB_SDMA_TXREQ_F_FREEBUF) {
 629                 tx->txreq.flags &= ~QIB_SDMA_TXREQ_F_FREEBUF;
 630                 dma_unmap_single(&dd_from_dev(dev)->pcidev->dev,
 631                                  tx->txreq.addr, tx->hdr_dwords << 2,
 632                                  DMA_TO_DEVICE);
 633                 kfree(tx->align_buf);
 634         }
 635 
 636         spin_lock_irqsave(&dev->rdi.pending_lock, flags);
 637 
 638         /* Put struct back on free list */
 639         list_add(&tx->txreq.list, &dev->txreq_free);
 640 
 641         if (!list_empty(&dev->txwait)) {
 642                 /* Wake up first QP wanting a free struct */
 643                 priv = list_entry(dev->txwait.next, struct qib_qp_priv,
 644                                   iowait);
 645                 qp = priv->owner;
 646                 list_del_init(&priv->iowait);
 647                 rvt_get_qp(qp);
 648                 spin_unlock_irqrestore(&dev->rdi.pending_lock, flags);
 649 
 650                 spin_lock_irqsave(&qp->s_lock, flags);
 651                 if (qp->s_flags & RVT_S_WAIT_TX) {
 652                         qp->s_flags &= ~RVT_S_WAIT_TX;
 653                         qib_schedule_send(qp);
 654                 }
 655                 spin_unlock_irqrestore(&qp->s_lock, flags);
 656 
 657                 rvt_put_qp(qp);
 658         } else
 659                 spin_unlock_irqrestore(&dev->rdi.pending_lock, flags);
 660 }
 661 
 662 /*
 663  * This is called when there are send DMA descriptors that might be
 664  * available.
 665  *
 666  * This is called with ppd->sdma_lock held.
 667  */
 668 void qib_verbs_sdma_desc_avail(struct qib_pportdata *ppd, unsigned avail)
 669 {
 670         struct rvt_qp *qp;
 671         struct qib_qp_priv *qpp, *nqpp;
 672         struct rvt_qp *qps[20];
 673         struct qib_ibdev *dev;
 674         unsigned i, n;
 675 
 676         n = 0;
 677         dev = &ppd->dd->verbs_dev;
 678         spin_lock(&dev->rdi.pending_lock);
 679 
 680         /* Search wait list for first QP wanting DMA descriptors. */
 681         list_for_each_entry_safe(qpp, nqpp, &dev->dmawait, iowait) {
 682                 qp = qpp->owner;
 683                 if (qp->port_num != ppd->port)
 684                         continue;
 685                 if (n == ARRAY_SIZE(qps))
 686                         break;
 687                 if (qpp->s_tx->txreq.sg_count > avail)
 688                         break;
 689                 avail -= qpp->s_tx->txreq.sg_count;
 690                 list_del_init(&qpp->iowait);
 691                 rvt_get_qp(qp);
 692                 qps[n++] = qp;
 693         }
 694 
 695         spin_unlock(&dev->rdi.pending_lock);
 696 
 697         for (i = 0; i < n; i++) {
 698                 qp = qps[i];
 699                 spin_lock(&qp->s_lock);
 700                 if (qp->s_flags & RVT_S_WAIT_DMA_DESC) {
 701                         qp->s_flags &= ~RVT_S_WAIT_DMA_DESC;
 702                         qib_schedule_send(qp);
 703                 }
 704                 spin_unlock(&qp->s_lock);
 705                 rvt_put_qp(qp);
 706         }
 707 }
 708 
 709 /*
 710  * This is called with ppd->sdma_lock held.
 711  */
 712 static void sdma_complete(struct qib_sdma_txreq *cookie, int status)
 713 {
 714         struct qib_verbs_txreq *tx =
 715                 container_of(cookie, struct qib_verbs_txreq, txreq);
 716         struct rvt_qp *qp = tx->qp;
 717         struct qib_qp_priv *priv = qp->priv;
 718 
 719         spin_lock(&qp->s_lock);
 720         if (tx->wqe)
 721                 rvt_send_complete(qp, tx->wqe, IB_WC_SUCCESS);
 722         else if (qp->ibqp.qp_type == IB_QPT_RC) {
 723                 struct ib_header *hdr;
 724 
 725                 if (tx->txreq.flags & QIB_SDMA_TXREQ_F_FREEBUF)
 726                         hdr = &tx->align_buf->hdr;
 727                 else {
 728                         struct qib_ibdev *dev = to_idev(qp->ibqp.device);
 729 
 730                         hdr = &dev->pio_hdrs[tx->hdr_inx].hdr;
 731                 }
 732                 qib_rc_send_complete(qp, hdr);
 733         }
 734         if (atomic_dec_and_test(&priv->s_dma_busy)) {
 735                 if (qp->state == IB_QPS_RESET)
 736                         wake_up(&priv->wait_dma);
 737                 else if (qp->s_flags & RVT_S_WAIT_DMA) {
 738                         qp->s_flags &= ~RVT_S_WAIT_DMA;
 739                         qib_schedule_send(qp);
 740                 }
 741         }
 742         spin_unlock(&qp->s_lock);
 743 
 744         qib_put_txreq(tx);
 745 }
 746 
 747 static int wait_kmem(struct qib_ibdev *dev, struct rvt_qp *qp)
 748 {
 749         struct qib_qp_priv *priv = qp->priv;
 750         unsigned long flags;
 751         int ret = 0;
 752 
 753         spin_lock_irqsave(&qp->s_lock, flags);
 754         if (ib_rvt_state_ops[qp->state] & RVT_PROCESS_RECV_OK) {
 755                 spin_lock(&dev->rdi.pending_lock);
 756                 if (list_empty(&priv->iowait)) {
 757                         if (list_empty(&dev->memwait))
 758                                 mod_timer(&dev->mem_timer, jiffies + 1);
 759                         qp->s_flags |= RVT_S_WAIT_KMEM;
 760                         list_add_tail(&priv->iowait, &dev->memwait);
 761                 }
 762                 spin_unlock(&dev->rdi.pending_lock);
 763                 qp->s_flags &= ~RVT_S_BUSY;
 764                 ret = -EBUSY;
 765         }
 766         spin_unlock_irqrestore(&qp->s_lock, flags);
 767 
 768         return ret;
 769 }
 770 
 771 static int qib_verbs_send_dma(struct rvt_qp *qp, struct ib_header *hdr,
 772                               u32 hdrwords, struct rvt_sge_state *ss, u32 len,
 773                               u32 plen, u32 dwords)
 774 {
 775         struct qib_qp_priv *priv = qp->priv;
 776         struct qib_ibdev *dev = to_idev(qp->ibqp.device);
 777         struct qib_devdata *dd = dd_from_dev(dev);
 778         struct qib_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num);
 779         struct qib_pportdata *ppd = ppd_from_ibp(ibp);
 780         struct qib_verbs_txreq *tx;
 781         struct qib_pio_header *phdr;
 782         u32 control;
 783         u32 ndesc;
 784         int ret;
 785 
 786         tx = priv->s_tx;
 787         if (tx) {
 788                 priv->s_tx = NULL;
 789                 /* resend previously constructed packet */
 790                 ret = qib_sdma_verbs_send(ppd, tx->ss, tx->dwords, tx);
 791                 goto bail;
 792         }
 793 
 794         tx = get_txreq(dev, qp);
 795         if (IS_ERR(tx))
 796                 goto bail_tx;
 797 
 798         control = dd->f_setpbc_control(ppd, plen, qp->s_srate,
 799                                        be16_to_cpu(hdr->lrh[0]) >> 12);
 800         tx->qp = qp;
 801         tx->wqe = qp->s_wqe;
 802         tx->mr = qp->s_rdma_mr;
 803         if (qp->s_rdma_mr)
 804                 qp->s_rdma_mr = NULL;
 805         tx->txreq.callback = sdma_complete;
 806         if (dd->flags & QIB_HAS_SDMA_TIMEOUT)
 807                 tx->txreq.flags = QIB_SDMA_TXREQ_F_HEADTOHOST;
 808         else
 809                 tx->txreq.flags = QIB_SDMA_TXREQ_F_INTREQ;
 810         if (plen + 1 > dd->piosize2kmax_dwords)
 811                 tx->txreq.flags |= QIB_SDMA_TXREQ_F_USELARGEBUF;
 812 
 813         if (len) {
 814                 /*
 815                  * Don't try to DMA if it takes more descriptors than
 816                  * the queue holds.
 817                  */
 818                 ndesc = qib_count_sge(ss, len);
 819                 if (ndesc >= ppd->sdma_descq_cnt)
 820                         ndesc = 0;
 821         } else
 822                 ndesc = 1;
 823         if (ndesc) {
 824                 phdr = &dev->pio_hdrs[tx->hdr_inx];
 825                 phdr->pbc[0] = cpu_to_le32(plen);
 826                 phdr->pbc[1] = cpu_to_le32(control);
 827                 memcpy(&phdr->hdr, hdr, hdrwords << 2);
 828                 tx->txreq.flags |= QIB_SDMA_TXREQ_F_FREEDESC;
 829                 tx->txreq.sg_count = ndesc;
 830                 tx->txreq.addr = dev->pio_hdrs_phys +
 831                         tx->hdr_inx * sizeof(struct qib_pio_header);
 832                 tx->hdr_dwords = hdrwords + 2; /* add PBC length */
 833                 ret = qib_sdma_verbs_send(ppd, ss, dwords, tx);
 834                 goto bail;
 835         }
 836 
 837         /* Allocate a buffer and copy the header and payload to it. */
 838         tx->hdr_dwords = plen + 1;
 839         phdr = kmalloc(tx->hdr_dwords << 2, GFP_ATOMIC);
 840         if (!phdr)
 841                 goto err_tx;
 842         phdr->pbc[0] = cpu_to_le32(plen);
 843         phdr->pbc[1] = cpu_to_le32(control);
 844         memcpy(&phdr->hdr, hdr, hdrwords << 2);
 845         qib_copy_from_sge((u32 *) &phdr->hdr + hdrwords, ss, len);
 846 
 847         tx->txreq.addr = dma_map_single(&dd->pcidev->dev, phdr,
 848                                         tx->hdr_dwords << 2, DMA_TO_DEVICE);
 849         if (dma_mapping_error(&dd->pcidev->dev, tx->txreq.addr))
 850                 goto map_err;
 851         tx->align_buf = phdr;
 852         tx->txreq.flags |= QIB_SDMA_TXREQ_F_FREEBUF;
 853         tx->txreq.sg_count = 1;
 854         ret = qib_sdma_verbs_send(ppd, NULL, 0, tx);
 855         goto unaligned;
 856 
 857 map_err:
 858         kfree(phdr);
 859 err_tx:
 860         qib_put_txreq(tx);
 861         ret = wait_kmem(dev, qp);
 862 unaligned:
 863         ibp->rvp.n_unaligned++;
 864 bail:
 865         return ret;
 866 bail_tx:
 867         ret = PTR_ERR(tx);
 868         goto bail;
 869 }
 870 
 871 /*
 872  * If we are now in the error state, return zero to flush the
 873  * send work request.
 874  */
 875 static int no_bufs_available(struct rvt_qp *qp)
 876 {
 877         struct qib_qp_priv *priv = qp->priv;
 878         struct qib_ibdev *dev = to_idev(qp->ibqp.device);
 879         struct qib_devdata *dd;
 880         unsigned long flags;
 881         int ret = 0;
 882 
 883         /*
 884          * Note that as soon as want_buffer() is called and
 885          * possibly before it returns, qib_ib_piobufavail()
 886          * could be called. Therefore, put QP on the I/O wait list before
 887          * enabling the PIO avail interrupt.
 888          */
 889         spin_lock_irqsave(&qp->s_lock, flags);
 890         if (ib_rvt_state_ops[qp->state] & RVT_PROCESS_RECV_OK) {
 891                 spin_lock(&dev->rdi.pending_lock);
 892                 if (list_empty(&priv->iowait)) {
 893                         dev->n_piowait++;
 894                         qp->s_flags |= RVT_S_WAIT_PIO;
 895                         list_add_tail(&priv->iowait, &dev->piowait);
 896                         dd = dd_from_dev(dev);
 897                         dd->f_wantpiobuf_intr(dd, 1);
 898                 }
 899                 spin_unlock(&dev->rdi.pending_lock);
 900                 qp->s_flags &= ~RVT_S_BUSY;
 901                 ret = -EBUSY;
 902         }
 903         spin_unlock_irqrestore(&qp->s_lock, flags);
 904         return ret;
 905 }
 906 
 907 static int qib_verbs_send_pio(struct rvt_qp *qp, struct ib_header *ibhdr,
 908                               u32 hdrwords, struct rvt_sge_state *ss, u32 len,
 909                               u32 plen, u32 dwords)
 910 {
 911         struct qib_devdata *dd = dd_from_ibdev(qp->ibqp.device);
 912         struct qib_pportdata *ppd = dd->pport + qp->port_num - 1;
 913         u32 *hdr = (u32 *) ibhdr;
 914         u32 __iomem *piobuf_orig;
 915         u32 __iomem *piobuf;
 916         u64 pbc;
 917         unsigned long flags;
 918         unsigned flush_wc;
 919         u32 control;
 920         u32 pbufn;
 921 
 922         control = dd->f_setpbc_control(ppd, plen, qp->s_srate,
 923                 be16_to_cpu(ibhdr->lrh[0]) >> 12);
 924         pbc = ((u64) control << 32) | plen;
 925         piobuf = dd->f_getsendbuf(ppd, pbc, &pbufn);
 926         if (unlikely(piobuf == NULL))
 927                 return no_bufs_available(qp);
 928 
 929         /*
 930          * Write the pbc.
 931          * We have to flush after the PBC for correctness on some cpus
 932          * or WC buffer can be written out of order.
 933          */
 934         writeq(pbc, piobuf);
 935         piobuf_orig = piobuf;
 936         piobuf += 2;
 937 
 938         flush_wc = dd->flags & QIB_PIO_FLUSH_WC;
 939         if (len == 0) {
 940                 /*
 941                  * If there is just the header portion, must flush before
 942                  * writing last word of header for correctness, and after
 943                  * the last header word (trigger word).
 944                  */
 945                 if (flush_wc) {
 946                         qib_flush_wc();
 947                         qib_pio_copy(piobuf, hdr, hdrwords - 1);
 948                         qib_flush_wc();
 949                         __raw_writel(hdr[hdrwords - 1], piobuf + hdrwords - 1);
 950                         qib_flush_wc();
 951                 } else
 952                         qib_pio_copy(piobuf, hdr, hdrwords);
 953                 goto done;
 954         }
 955 
 956         if (flush_wc)
 957                 qib_flush_wc();
 958         qib_pio_copy(piobuf, hdr, hdrwords);
 959         piobuf += hdrwords;
 960 
 961         /* The common case is aligned and contained in one segment. */
 962         if (likely(ss->num_sge == 1 && len <= ss->sge.length &&
 963                    !((unsigned long)ss->sge.vaddr & (sizeof(u32) - 1)))) {
 964                 u32 *addr = (u32 *) ss->sge.vaddr;
 965 
 966                 /* Update address before sending packet. */
 967                 rvt_update_sge(ss, len, false);
 968                 if (flush_wc) {
 969                         qib_pio_copy(piobuf, addr, dwords - 1);
 970                         /* must flush early everything before trigger word */
 971                         qib_flush_wc();
 972                         __raw_writel(addr[dwords - 1], piobuf + dwords - 1);
 973                         /* be sure trigger word is written */
 974                         qib_flush_wc();
 975                 } else
 976                         qib_pio_copy(piobuf, addr, dwords);
 977                 goto done;
 978         }
 979         copy_io(piobuf, ss, len, flush_wc);
 980 done:
 981         if (dd->flags & QIB_USE_SPCL_TRIG) {
 982                 u32 spcl_off = (pbufn >= dd->piobcnt2k) ? 2047 : 1023;
 983 
 984                 qib_flush_wc();
 985                 __raw_writel(0xaebecede, piobuf_orig + spcl_off);
 986         }
 987         qib_sendbuf_done(dd, pbufn);
 988         if (qp->s_rdma_mr) {
 989                 rvt_put_mr(qp->s_rdma_mr);
 990                 qp->s_rdma_mr = NULL;
 991         }
 992         if (qp->s_wqe) {
 993                 spin_lock_irqsave(&qp->s_lock, flags);
 994                 rvt_send_complete(qp, qp->s_wqe, IB_WC_SUCCESS);
 995                 spin_unlock_irqrestore(&qp->s_lock, flags);
 996         } else if (qp->ibqp.qp_type == IB_QPT_RC) {
 997                 spin_lock_irqsave(&qp->s_lock, flags);
 998                 qib_rc_send_complete(qp, ibhdr);
 999                 spin_unlock_irqrestore(&qp->s_lock, flags);
1000         }
1001         return 0;
1002 }
1003 
1004 /**
1005  * qib_verbs_send - send a packet
1006  * @qp: the QP to send on
1007  * @hdr: the packet header
1008  * @hdrwords: the number of 32-bit words in the header
1009  * @ss: the SGE to send
1010  * @len: the length of the packet in bytes
1011  *
1012  * Return zero if packet is sent or queued OK.
1013  * Return non-zero and clear qp->s_flags RVT_S_BUSY otherwise.
1014  */
1015 int qib_verbs_send(struct rvt_qp *qp, struct ib_header *hdr,
1016                    u32 hdrwords, struct rvt_sge_state *ss, u32 len)
1017 {
1018         struct qib_devdata *dd = dd_from_ibdev(qp->ibqp.device);
1019         u32 plen;
1020         int ret;
1021         u32 dwords = (len + 3) >> 2;
1022 
1023         /*
1024          * Calculate the send buffer trigger address.
1025          * The +1 counts for the pbc control dword following the pbc length.
1026          */
1027         plen = hdrwords + dwords + 1;
1028 
1029         /*
1030          * VL15 packets (IB_QPT_SMI) will always use PIO, so we
1031          * can defer SDMA restart until link goes ACTIVE without
1032          * worrying about just how we got there.
1033          */
1034         if (qp->ibqp.qp_type == IB_QPT_SMI ||
1035             !(dd->flags & QIB_HAS_SEND_DMA))
1036                 ret = qib_verbs_send_pio(qp, hdr, hdrwords, ss, len,
1037                                          plen, dwords);
1038         else
1039                 ret = qib_verbs_send_dma(qp, hdr, hdrwords, ss, len,
1040                                          plen, dwords);
1041 
1042         return ret;
1043 }
1044 
1045 int qib_snapshot_counters(struct qib_pportdata *ppd, u64 *swords,
1046                           u64 *rwords, u64 *spkts, u64 *rpkts,
1047                           u64 *xmit_wait)
1048 {
1049         int ret;
1050         struct qib_devdata *dd = ppd->dd;
1051 
1052         if (!(dd->flags & QIB_PRESENT)) {
1053                 /* no hardware, freeze, etc. */
1054                 ret = -EINVAL;
1055                 goto bail;
1056         }
1057         *swords = dd->f_portcntr(ppd, QIBPORTCNTR_WORDSEND);
1058         *rwords = dd->f_portcntr(ppd, QIBPORTCNTR_WORDRCV);
1059         *spkts = dd->f_portcntr(ppd, QIBPORTCNTR_PKTSEND);
1060         *rpkts = dd->f_portcntr(ppd, QIBPORTCNTR_PKTRCV);
1061         *xmit_wait = dd->f_portcntr(ppd, QIBPORTCNTR_SENDSTALL);
1062 
1063         ret = 0;
1064 
1065 bail:
1066         return ret;
1067 }
1068 
1069 /**
1070  * qib_get_counters - get various chip counters
1071  * @dd: the qlogic_ib device
1072  * @cntrs: counters are placed here
1073  *
1074  * Return the counters needed by recv_pma_get_portcounters().
1075  */
1076 int qib_get_counters(struct qib_pportdata *ppd,
1077                      struct qib_verbs_counters *cntrs)
1078 {
1079         int ret;
1080 
1081         if (!(ppd->dd->flags & QIB_PRESENT)) {
1082                 /* no hardware, freeze, etc. */
1083                 ret = -EINVAL;
1084                 goto bail;
1085         }
1086         cntrs->symbol_error_counter =
1087                 ppd->dd->f_portcntr(ppd, QIBPORTCNTR_IBSYMBOLERR);
1088         cntrs->link_error_recovery_counter =
1089                 ppd->dd->f_portcntr(ppd, QIBPORTCNTR_IBLINKERRRECOV);
1090         /*
1091          * The link downed counter counts when the other side downs the
1092          * connection.  We add in the number of times we downed the link
1093          * due to local link integrity errors to compensate.
1094          */
1095         cntrs->link_downed_counter =
1096                 ppd->dd->f_portcntr(ppd, QIBPORTCNTR_IBLINKDOWN);
1097         cntrs->port_rcv_errors =
1098                 ppd->dd->f_portcntr(ppd, QIBPORTCNTR_RXDROPPKT) +
1099                 ppd->dd->f_portcntr(ppd, QIBPORTCNTR_RCVOVFL) +
1100                 ppd->dd->f_portcntr(ppd, QIBPORTCNTR_ERR_RLEN) +
1101                 ppd->dd->f_portcntr(ppd, QIBPORTCNTR_INVALIDRLEN) +
1102                 ppd->dd->f_portcntr(ppd, QIBPORTCNTR_ERRLINK) +
1103                 ppd->dd->f_portcntr(ppd, QIBPORTCNTR_ERRICRC) +
1104                 ppd->dd->f_portcntr(ppd, QIBPORTCNTR_ERRVCRC) +
1105                 ppd->dd->f_portcntr(ppd, QIBPORTCNTR_ERRLPCRC) +
1106                 ppd->dd->f_portcntr(ppd, QIBPORTCNTR_BADFORMAT);
1107         cntrs->port_rcv_errors +=
1108                 ppd->dd->f_portcntr(ppd, QIBPORTCNTR_RXLOCALPHYERR);
1109         cntrs->port_rcv_errors +=
1110                 ppd->dd->f_portcntr(ppd, QIBPORTCNTR_RXVLERR);
1111         cntrs->port_rcv_remphys_errors =
1112                 ppd->dd->f_portcntr(ppd, QIBPORTCNTR_RCVEBP);
1113         cntrs->port_xmit_discards =
1114                 ppd->dd->f_portcntr(ppd, QIBPORTCNTR_UNSUPVL);
1115         cntrs->port_xmit_data = ppd->dd->f_portcntr(ppd,
1116                         QIBPORTCNTR_WORDSEND);
1117         cntrs->port_rcv_data = ppd->dd->f_portcntr(ppd,
1118                         QIBPORTCNTR_WORDRCV);
1119         cntrs->port_xmit_packets = ppd->dd->f_portcntr(ppd,
1120                         QIBPORTCNTR_PKTSEND);
1121         cntrs->port_rcv_packets = ppd->dd->f_portcntr(ppd,
1122                         QIBPORTCNTR_PKTRCV);
1123         cntrs->local_link_integrity_errors =
1124                 ppd->dd->f_portcntr(ppd, QIBPORTCNTR_LLI);
1125         cntrs->excessive_buffer_overrun_errors =
1126                 ppd->dd->f_portcntr(ppd, QIBPORTCNTR_EXCESSBUFOVFL);
1127         cntrs->vl15_dropped =
1128                 ppd->dd->f_portcntr(ppd, QIBPORTCNTR_VL15PKTDROP);
1129 
1130         ret = 0;
1131 
1132 bail:
1133         return ret;
1134 }
1135 
1136 /**
1137  * qib_ib_piobufavail - callback when a PIO buffer is available
1138  * @dd: the device pointer
1139  *
1140  * This is called from qib_intr() at interrupt level when a PIO buffer is
1141  * available after qib_verbs_send() returned an error that no buffers were
1142  * available. Disable the interrupt if there are no more QPs waiting.
1143  */
1144 void qib_ib_piobufavail(struct qib_devdata *dd)
1145 {
1146         struct qib_ibdev *dev = &dd->verbs_dev;
1147         struct list_head *list;
1148         struct rvt_qp *qps[5];
1149         struct rvt_qp *qp;
1150         unsigned long flags;
1151         unsigned i, n;
1152         struct qib_qp_priv *priv;
1153 
1154         list = &dev->piowait;
1155         n = 0;
1156 
1157         /*
1158          * Note: checking that the piowait list is empty and clearing
1159          * the buffer available interrupt needs to be atomic or we
1160          * could end up with QPs on the wait list with the interrupt
1161          * disabled.
1162          */
1163         spin_lock_irqsave(&dev->rdi.pending_lock, flags);
1164         while (!list_empty(list)) {
1165                 if (n == ARRAY_SIZE(qps))
1166                         goto full;
1167                 priv = list_entry(list->next, struct qib_qp_priv, iowait);
1168                 qp = priv->owner;
1169                 list_del_init(&priv->iowait);
1170                 rvt_get_qp(qp);
1171                 qps[n++] = qp;
1172         }
1173         dd->f_wantpiobuf_intr(dd, 0);
1174 full:
1175         spin_unlock_irqrestore(&dev->rdi.pending_lock, flags);
1176 
1177         for (i = 0; i < n; i++) {
1178                 qp = qps[i];
1179 
1180                 spin_lock_irqsave(&qp->s_lock, flags);
1181                 if (qp->s_flags & RVT_S_WAIT_PIO) {
1182                         qp->s_flags &= ~RVT_S_WAIT_PIO;
1183                         qib_schedule_send(qp);
1184                 }
1185                 spin_unlock_irqrestore(&qp->s_lock, flags);
1186 
1187                 /* Notify qib_destroy_qp() if it is waiting. */
1188                 rvt_put_qp(qp);
1189         }
1190 }
1191 
1192 static int qib_query_port(struct rvt_dev_info *rdi, u8 port_num,
1193                           struct ib_port_attr *props)
1194 {
1195         struct qib_ibdev *ibdev = container_of(rdi, struct qib_ibdev, rdi);
1196         struct qib_devdata *dd = dd_from_dev(ibdev);
1197         struct qib_pportdata *ppd = &dd->pport[port_num - 1];
1198         enum ib_mtu mtu;
1199         u16 lid = ppd->lid;
1200 
1201         /* props being zeroed by the caller, avoid zeroing it here */
1202         props->lid = lid ? lid : be16_to_cpu(IB_LID_PERMISSIVE);
1203         props->lmc = ppd->lmc;
1204         props->state = dd->f_iblink_state(ppd->lastibcstat);
1205         props->phys_state = dd->f_ibphys_portstate(ppd->lastibcstat);
1206         props->gid_tbl_len = QIB_GUIDS_PER_PORT;
1207         props->active_width = ppd->link_width_active;
1208         /* See rate_show() */
1209         props->active_speed = ppd->link_speed_active;
1210         props->max_vl_num = qib_num_vls(ppd->vls_supported);
1211 
1212         props->max_mtu = qib_ibmtu ? qib_ibmtu : IB_MTU_4096;
1213         switch (ppd->ibmtu) {
1214         case 4096:
1215                 mtu = IB_MTU_4096;
1216                 break;
1217         case 2048:
1218                 mtu = IB_MTU_2048;
1219                 break;
1220         case 1024:
1221                 mtu = IB_MTU_1024;
1222                 break;
1223         case 512:
1224                 mtu = IB_MTU_512;
1225                 break;
1226         case 256:
1227                 mtu = IB_MTU_256;
1228                 break;
1229         default:
1230                 mtu = IB_MTU_2048;
1231         }
1232         props->active_mtu = mtu;
1233 
1234         return 0;
1235 }
1236 
1237 static int qib_modify_device(struct ib_device *device,
1238                              int device_modify_mask,
1239                              struct ib_device_modify *device_modify)
1240 {
1241         struct qib_devdata *dd = dd_from_ibdev(device);
1242         unsigned i;
1243         int ret;
1244 
1245         if (device_modify_mask & ~(IB_DEVICE_MODIFY_SYS_IMAGE_GUID |
1246                                    IB_DEVICE_MODIFY_NODE_DESC)) {
1247                 ret = -EOPNOTSUPP;
1248                 goto bail;
1249         }
1250 
1251         if (device_modify_mask & IB_DEVICE_MODIFY_NODE_DESC) {
1252                 memcpy(device->node_desc, device_modify->node_desc,
1253                        IB_DEVICE_NODE_DESC_MAX);
1254                 for (i = 0; i < dd->num_pports; i++) {
1255                         struct qib_ibport *ibp = &dd->pport[i].ibport_data;
1256 
1257                         qib_node_desc_chg(ibp);
1258                 }
1259         }
1260 
1261         if (device_modify_mask & IB_DEVICE_MODIFY_SYS_IMAGE_GUID) {
1262                 ib_qib_sys_image_guid =
1263                         cpu_to_be64(device_modify->sys_image_guid);
1264                 for (i = 0; i < dd->num_pports; i++) {
1265                         struct qib_ibport *ibp = &dd->pport[i].ibport_data;
1266 
1267                         qib_sys_guid_chg(ibp);
1268                 }
1269         }
1270 
1271         ret = 0;
1272 
1273 bail:
1274         return ret;
1275 }
1276 
1277 static int qib_shut_down_port(struct rvt_dev_info *rdi, u8 port_num)
1278 {
1279         struct qib_ibdev *ibdev = container_of(rdi, struct qib_ibdev, rdi);
1280         struct qib_devdata *dd = dd_from_dev(ibdev);
1281         struct qib_pportdata *ppd = &dd->pport[port_num - 1];
1282 
1283         qib_set_linkstate(ppd, QIB_IB_LINKDOWN);
1284 
1285         return 0;
1286 }
1287 
1288 static int qib_get_guid_be(struct rvt_dev_info *rdi, struct rvt_ibport *rvp,
1289                            int guid_index, __be64 *guid)
1290 {
1291         struct qib_ibport *ibp = container_of(rvp, struct qib_ibport, rvp);
1292         struct qib_pportdata *ppd = ppd_from_ibp(ibp);
1293 
1294         if (guid_index == 0)
1295                 *guid = ppd->guid;
1296         else if (guid_index < QIB_GUIDS_PER_PORT)
1297                 *guid = ibp->guids[guid_index - 1];
1298         else
1299                 return -EINVAL;
1300 
1301         return 0;
1302 }
1303 
1304 int qib_check_ah(struct ib_device *ibdev, struct rdma_ah_attr *ah_attr)
1305 {
1306         if (rdma_ah_get_sl(ah_attr) > 15)
1307                 return -EINVAL;
1308 
1309         if (rdma_ah_get_dlid(ah_attr) == 0)
1310                 return -EINVAL;
1311         if (rdma_ah_get_dlid(ah_attr) >=
1312                 be16_to_cpu(IB_MULTICAST_LID_BASE) &&
1313             rdma_ah_get_dlid(ah_attr) !=
1314                 be16_to_cpu(IB_LID_PERMISSIVE) &&
1315             !(rdma_ah_get_ah_flags(ah_attr) & IB_AH_GRH))
1316                 return -EINVAL;
1317 
1318         return 0;
1319 }
1320 
1321 static void qib_notify_new_ah(struct ib_device *ibdev,
1322                               struct rdma_ah_attr *ah_attr,
1323                               struct rvt_ah *ah)
1324 {
1325         struct qib_ibport *ibp;
1326         struct qib_pportdata *ppd;
1327 
1328         /*
1329          * Do not trust reading anything from rvt_ah at this point as it is not
1330          * done being setup. We can however modify things which we need to set.
1331          */
1332 
1333         ibp = to_iport(ibdev, rdma_ah_get_port_num(ah_attr));
1334         ppd = ppd_from_ibp(ibp);
1335         ah->vl = ibp->sl_to_vl[rdma_ah_get_sl(&ah->attr)];
1336         ah->log_pmtu = ilog2(ppd->ibmtu);
1337 }
1338 
1339 struct ib_ah *qib_create_qp0_ah(struct qib_ibport *ibp, u16 dlid)
1340 {
1341         struct rdma_ah_attr attr;
1342         struct ib_ah *ah = ERR_PTR(-EINVAL);
1343         struct rvt_qp *qp0;
1344         struct qib_pportdata *ppd = ppd_from_ibp(ibp);
1345         struct qib_devdata *dd = dd_from_ppd(ppd);
1346         u8 port_num = ppd->port;
1347 
1348         memset(&attr, 0, sizeof(attr));
1349         attr.type = rdma_ah_find_type(&dd->verbs_dev.rdi.ibdev, port_num);
1350         rdma_ah_set_dlid(&attr, dlid);
1351         rdma_ah_set_port_num(&attr, port_num);
1352         rcu_read_lock();
1353         qp0 = rcu_dereference(ibp->rvp.qp[0]);
1354         if (qp0)
1355                 ah = rdma_create_ah(qp0->ibqp.pd, &attr, 0);
1356         rcu_read_unlock();
1357         return ah;
1358 }
1359 
1360 /**
1361  * qib_get_npkeys - return the size of the PKEY table for context 0
1362  * @dd: the qlogic_ib device
1363  */
1364 unsigned qib_get_npkeys(struct qib_devdata *dd)
1365 {
1366         return ARRAY_SIZE(dd->rcd[0]->pkeys);
1367 }
1368 
1369 /*
1370  * Return the indexed PKEY from the port PKEY table.
1371  * No need to validate rcd[ctxt]; the port is setup if we are here.
1372  */
1373 unsigned qib_get_pkey(struct qib_ibport *ibp, unsigned index)
1374 {
1375         struct qib_pportdata *ppd = ppd_from_ibp(ibp);
1376         struct qib_devdata *dd = ppd->dd;
1377         unsigned ctxt = ppd->hw_pidx;
1378         unsigned ret;
1379 
1380         /* dd->rcd null if mini_init or some init failures */
1381         if (!dd->rcd || index >= ARRAY_SIZE(dd->rcd[ctxt]->pkeys))
1382                 ret = 0;
1383         else
1384                 ret = dd->rcd[ctxt]->pkeys[index];
1385 
1386         return ret;
1387 }
1388 
1389 static void init_ibport(struct qib_pportdata *ppd)
1390 {
1391         struct qib_verbs_counters cntrs;
1392         struct qib_ibport *ibp = &ppd->ibport_data;
1393 
1394         spin_lock_init(&ibp->rvp.lock);
1395         /* Set the prefix to the default value (see ch. 4.1.1) */
1396         ibp->rvp.gid_prefix = IB_DEFAULT_GID_PREFIX;
1397         ibp->rvp.sm_lid = be16_to_cpu(IB_LID_PERMISSIVE);
1398         ibp->rvp.port_cap_flags = IB_PORT_SYS_IMAGE_GUID_SUP |
1399                 IB_PORT_CLIENT_REG_SUP | IB_PORT_SL_MAP_SUP |
1400                 IB_PORT_TRAP_SUP | IB_PORT_AUTO_MIGR_SUP |
1401                 IB_PORT_DR_NOTICE_SUP | IB_PORT_CAP_MASK_NOTICE_SUP |
1402                 IB_PORT_OTHER_LOCAL_CHANGES_SUP;
1403         if (ppd->dd->flags & QIB_HAS_LINK_LATENCY)
1404                 ibp->rvp.port_cap_flags |= IB_PORT_LINK_LATENCY_SUP;
1405         ibp->rvp.pma_counter_select[0] = IB_PMA_PORT_XMIT_DATA;
1406         ibp->rvp.pma_counter_select[1] = IB_PMA_PORT_RCV_DATA;
1407         ibp->rvp.pma_counter_select[2] = IB_PMA_PORT_XMIT_PKTS;
1408         ibp->rvp.pma_counter_select[3] = IB_PMA_PORT_RCV_PKTS;
1409         ibp->rvp.pma_counter_select[4] = IB_PMA_PORT_XMIT_WAIT;
1410 
1411         /* Snapshot current HW counters to "clear" them. */
1412         qib_get_counters(ppd, &cntrs);
1413         ibp->z_symbol_error_counter = cntrs.symbol_error_counter;
1414         ibp->z_link_error_recovery_counter =
1415                 cntrs.link_error_recovery_counter;
1416         ibp->z_link_downed_counter = cntrs.link_downed_counter;
1417         ibp->z_port_rcv_errors = cntrs.port_rcv_errors;
1418         ibp->z_port_rcv_remphys_errors = cntrs.port_rcv_remphys_errors;
1419         ibp->z_port_xmit_discards = cntrs.port_xmit_discards;
1420         ibp->z_port_xmit_data = cntrs.port_xmit_data;
1421         ibp->z_port_rcv_data = cntrs.port_rcv_data;
1422         ibp->z_port_xmit_packets = cntrs.port_xmit_packets;
1423         ibp->z_port_rcv_packets = cntrs.port_rcv_packets;
1424         ibp->z_local_link_integrity_errors =
1425                 cntrs.local_link_integrity_errors;
1426         ibp->z_excessive_buffer_overrun_errors =
1427                 cntrs.excessive_buffer_overrun_errors;
1428         ibp->z_vl15_dropped = cntrs.vl15_dropped;
1429         RCU_INIT_POINTER(ibp->rvp.qp[0], NULL);
1430         RCU_INIT_POINTER(ibp->rvp.qp[1], NULL);
1431 }
1432 
1433 /**
1434  * qib_fill_device_attr - Fill in rvt dev info device attributes.
1435  * @dd: the device data structure
1436  */
1437 static void qib_fill_device_attr(struct qib_devdata *dd)
1438 {
1439         struct rvt_dev_info *rdi = &dd->verbs_dev.rdi;
1440 
1441         memset(&rdi->dparms.props, 0, sizeof(rdi->dparms.props));
1442 
1443         rdi->dparms.props.max_pd = ib_qib_max_pds;
1444         rdi->dparms.props.max_ah = ib_qib_max_ahs;
1445         rdi->dparms.props.device_cap_flags = IB_DEVICE_BAD_PKEY_CNTR |
1446                 IB_DEVICE_BAD_QKEY_CNTR | IB_DEVICE_SHUTDOWN_PORT |
1447                 IB_DEVICE_SYS_IMAGE_GUID | IB_DEVICE_RC_RNR_NAK_GEN |
1448                 IB_DEVICE_PORT_ACTIVE_EVENT | IB_DEVICE_SRQ_RESIZE;
1449         rdi->dparms.props.page_size_cap = PAGE_SIZE;
1450         rdi->dparms.props.vendor_id =
1451                 QIB_SRC_OUI_1 << 16 | QIB_SRC_OUI_2 << 8 | QIB_SRC_OUI_3;
1452         rdi->dparms.props.vendor_part_id = dd->deviceid;
1453         rdi->dparms.props.hw_ver = dd->minrev;
1454         rdi->dparms.props.sys_image_guid = ib_qib_sys_image_guid;
1455         rdi->dparms.props.max_mr_size = ~0ULL;
1456         rdi->dparms.props.max_qp = ib_qib_max_qps;
1457         rdi->dparms.props.max_qp_wr = ib_qib_max_qp_wrs;
1458         rdi->dparms.props.max_send_sge = ib_qib_max_sges;
1459         rdi->dparms.props.max_recv_sge = ib_qib_max_sges;
1460         rdi->dparms.props.max_sge_rd = ib_qib_max_sges;
1461         rdi->dparms.props.max_cq = ib_qib_max_cqs;
1462         rdi->dparms.props.max_cqe = ib_qib_max_cqes;
1463         rdi->dparms.props.max_ah = ib_qib_max_ahs;
1464         rdi->dparms.props.max_map_per_fmr = 32767;
1465         rdi->dparms.props.max_qp_rd_atom = QIB_MAX_RDMA_ATOMIC;
1466         rdi->dparms.props.max_qp_init_rd_atom = 255;
1467         rdi->dparms.props.max_srq = ib_qib_max_srqs;
1468         rdi->dparms.props.max_srq_wr = ib_qib_max_srq_wrs;
1469         rdi->dparms.props.max_srq_sge = ib_qib_max_srq_sges;
1470         rdi->dparms.props.atomic_cap = IB_ATOMIC_GLOB;
1471         rdi->dparms.props.max_pkeys = qib_get_npkeys(dd);
1472         rdi->dparms.props.max_mcast_grp = ib_qib_max_mcast_grps;
1473         rdi->dparms.props.max_mcast_qp_attach = ib_qib_max_mcast_qp_attached;
1474         rdi->dparms.props.max_total_mcast_qp_attach =
1475                                         rdi->dparms.props.max_mcast_qp_attach *
1476                                         rdi->dparms.props.max_mcast_grp;
1477         /* post send table */
1478         dd->verbs_dev.rdi.post_parms = qib_post_parms;
1479 
1480         /* opcode translation table */
1481         dd->verbs_dev.rdi.wc_opcode = ib_qib_wc_opcode;
1482 }
1483 
1484 static const struct ib_device_ops qib_dev_ops = {
1485         .owner = THIS_MODULE,
1486         .driver_id = RDMA_DRIVER_QIB,
1487 
1488         .init_port = qib_create_port_files,
1489         .modify_device = qib_modify_device,
1490         .process_mad = qib_process_mad,
1491 };
1492 
1493 /**
1494  * qib_register_ib_device - register our device with the infiniband core
1495  * @dd: the device data structure
1496  * Return the allocated qib_ibdev pointer or NULL on error.
1497  */
1498 int qib_register_ib_device(struct qib_devdata *dd)
1499 {
1500         struct qib_ibdev *dev = &dd->verbs_dev;
1501         struct ib_device *ibdev = &dev->rdi.ibdev;
1502         struct qib_pportdata *ppd = dd->pport;
1503         unsigned i, ctxt;
1504         int ret;
1505 
1506         get_random_bytes(&dev->qp_rnd, sizeof(dev->qp_rnd));
1507         for (i = 0; i < dd->num_pports; i++)
1508                 init_ibport(ppd + i);
1509 
1510         /* Only need to initialize non-zero fields. */
1511         timer_setup(&dev->mem_timer, mem_timer, 0);
1512 
1513         INIT_LIST_HEAD(&dev->piowait);
1514         INIT_LIST_HEAD(&dev->dmawait);
1515         INIT_LIST_HEAD(&dev->txwait);
1516         INIT_LIST_HEAD(&dev->memwait);
1517         INIT_LIST_HEAD(&dev->txreq_free);
1518 
1519         if (ppd->sdma_descq_cnt) {
1520                 dev->pio_hdrs = dma_alloc_coherent(&dd->pcidev->dev,
1521                                                 ppd->sdma_descq_cnt *
1522                                                 sizeof(struct qib_pio_header),
1523                                                 &dev->pio_hdrs_phys,
1524                                                 GFP_KERNEL);
1525                 if (!dev->pio_hdrs) {
1526                         ret = -ENOMEM;
1527                         goto err_hdrs;
1528                 }
1529         }
1530 
1531         for (i = 0; i < ppd->sdma_descq_cnt; i++) {
1532                 struct qib_verbs_txreq *tx;
1533 
1534                 tx = kzalloc(sizeof(*tx), GFP_KERNEL);
1535                 if (!tx) {
1536                         ret = -ENOMEM;
1537                         goto err_tx;
1538                 }
1539                 tx->hdr_inx = i;
1540                 list_add(&tx->txreq.list, &dev->txreq_free);
1541         }
1542 
1543         /*
1544          * The system image GUID is supposed to be the same for all
1545          * IB HCAs in a single system but since there can be other
1546          * device types in the system, we can't be sure this is unique.
1547          */
1548         if (!ib_qib_sys_image_guid)
1549                 ib_qib_sys_image_guid = ppd->guid;
1550 
1551         ibdev->node_guid = ppd->guid;
1552         ibdev->phys_port_cnt = dd->num_pports;
1553         ibdev->dev.parent = &dd->pcidev->dev;
1554 
1555         snprintf(ibdev->node_desc, sizeof(ibdev->node_desc),
1556                  "Intel Infiniband HCA %s", init_utsname()->nodename);
1557 
1558         /*
1559          * Fill in rvt info object.
1560          */
1561         dd->verbs_dev.rdi.driver_f.get_pci_dev = qib_get_pci_dev;
1562         dd->verbs_dev.rdi.driver_f.check_ah = qib_check_ah;
1563         dd->verbs_dev.rdi.driver_f.setup_wqe = qib_check_send_wqe;
1564         dd->verbs_dev.rdi.driver_f.notify_new_ah = qib_notify_new_ah;
1565         dd->verbs_dev.rdi.driver_f.alloc_qpn = qib_alloc_qpn;
1566         dd->verbs_dev.rdi.driver_f.qp_priv_alloc = qib_qp_priv_alloc;
1567         dd->verbs_dev.rdi.driver_f.qp_priv_free = qib_qp_priv_free;
1568         dd->verbs_dev.rdi.driver_f.free_all_qps = qib_free_all_qps;
1569         dd->verbs_dev.rdi.driver_f.notify_qp_reset = qib_notify_qp_reset;
1570         dd->verbs_dev.rdi.driver_f.do_send = qib_do_send;
1571         dd->verbs_dev.rdi.driver_f.schedule_send = qib_schedule_send;
1572         dd->verbs_dev.rdi.driver_f.quiesce_qp = qib_quiesce_qp;
1573         dd->verbs_dev.rdi.driver_f.stop_send_queue = qib_stop_send_queue;
1574         dd->verbs_dev.rdi.driver_f.flush_qp_waiters = qib_flush_qp_waiters;
1575         dd->verbs_dev.rdi.driver_f.notify_error_qp = qib_notify_error_qp;
1576         dd->verbs_dev.rdi.driver_f.notify_restart_rc = qib_restart_rc;
1577         dd->verbs_dev.rdi.driver_f.mtu_to_path_mtu = qib_mtu_to_path_mtu;
1578         dd->verbs_dev.rdi.driver_f.mtu_from_qp = qib_mtu_from_qp;
1579         dd->verbs_dev.rdi.driver_f.get_pmtu_from_attr = qib_get_pmtu_from_attr;
1580         dd->verbs_dev.rdi.driver_f.schedule_send_no_lock = _qib_schedule_send;
1581         dd->verbs_dev.rdi.driver_f.query_port_state = qib_query_port;
1582         dd->verbs_dev.rdi.driver_f.shut_down_port = qib_shut_down_port;
1583         dd->verbs_dev.rdi.driver_f.cap_mask_chg = qib_cap_mask_chg;
1584         dd->verbs_dev.rdi.driver_f.notify_create_mad_agent =
1585                                                 qib_notify_create_mad_agent;
1586         dd->verbs_dev.rdi.driver_f.notify_free_mad_agent =
1587                                                 qib_notify_free_mad_agent;
1588 
1589         dd->verbs_dev.rdi.dparms.max_rdma_atomic = QIB_MAX_RDMA_ATOMIC;
1590         dd->verbs_dev.rdi.driver_f.get_guid_be = qib_get_guid_be;
1591         dd->verbs_dev.rdi.dparms.lkey_table_size = qib_lkey_table_size;
1592         dd->verbs_dev.rdi.dparms.qp_table_size = ib_qib_qp_table_size;
1593         dd->verbs_dev.rdi.dparms.qpn_start = 1;
1594         dd->verbs_dev.rdi.dparms.qpn_res_start = QIB_KD_QP;
1595         dd->verbs_dev.rdi.dparms.qpn_res_end = QIB_KD_QP; /* Reserve one QP */
1596         dd->verbs_dev.rdi.dparms.qpn_inc = 1;
1597         dd->verbs_dev.rdi.dparms.qos_shift = 1;
1598         dd->verbs_dev.rdi.dparms.psn_mask = QIB_PSN_MASK;
1599         dd->verbs_dev.rdi.dparms.psn_shift = QIB_PSN_SHIFT;
1600         dd->verbs_dev.rdi.dparms.psn_modify_mask = QIB_PSN_MASK;
1601         dd->verbs_dev.rdi.dparms.nports = dd->num_pports;
1602         dd->verbs_dev.rdi.dparms.npkeys = qib_get_npkeys(dd);
1603         dd->verbs_dev.rdi.dparms.node = dd->assigned_node_id;
1604         dd->verbs_dev.rdi.dparms.core_cap_flags = RDMA_CORE_PORT_IBA_IB;
1605         dd->verbs_dev.rdi.dparms.max_mad_size = IB_MGMT_MAD_SIZE;
1606         dd->verbs_dev.rdi.dparms.sge_copy_mode = RVT_SGE_COPY_MEMCPY;
1607 
1608         qib_fill_device_attr(dd);
1609 
1610         ppd = dd->pport;
1611         for (i = 0; i < dd->num_pports; i++, ppd++) {
1612                 ctxt = ppd->hw_pidx;
1613                 rvt_init_port(&dd->verbs_dev.rdi,
1614                               &ppd->ibport_data.rvp,
1615                               i,
1616                               dd->rcd[ctxt]->pkeys);
1617         }
1618         rdma_set_device_sysfs_group(&dd->verbs_dev.rdi.ibdev, &qib_attr_group);
1619 
1620         ib_set_device_ops(ibdev, &qib_dev_ops);
1621         ret = rvt_register_device(&dd->verbs_dev.rdi);
1622         if (ret)
1623                 goto err_tx;
1624 
1625         return ret;
1626 
1627 err_tx:
1628         while (!list_empty(&dev->txreq_free)) {
1629                 struct list_head *l = dev->txreq_free.next;
1630                 struct qib_verbs_txreq *tx;
1631 
1632                 list_del(l);
1633                 tx = list_entry(l, struct qib_verbs_txreq, txreq.list);
1634                 kfree(tx);
1635         }
1636         if (ppd->sdma_descq_cnt)
1637                 dma_free_coherent(&dd->pcidev->dev,
1638                                   ppd->sdma_descq_cnt *
1639                                         sizeof(struct qib_pio_header),
1640                                   dev->pio_hdrs, dev->pio_hdrs_phys);
1641 err_hdrs:
1642         qib_dev_err(dd, "cannot register verbs: %d!\n", -ret);
1643         return ret;
1644 }
1645 
1646 void qib_unregister_ib_device(struct qib_devdata *dd)
1647 {
1648         struct qib_ibdev *dev = &dd->verbs_dev;
1649 
1650         qib_verbs_unregister_sysfs(dd);
1651 
1652         rvt_unregister_device(&dd->verbs_dev.rdi);
1653 
1654         if (!list_empty(&dev->piowait))
1655                 qib_dev_err(dd, "piowait list not empty!\n");
1656         if (!list_empty(&dev->dmawait))
1657                 qib_dev_err(dd, "dmawait list not empty!\n");
1658         if (!list_empty(&dev->txwait))
1659                 qib_dev_err(dd, "txwait list not empty!\n");
1660         if (!list_empty(&dev->memwait))
1661                 qib_dev_err(dd, "memwait list not empty!\n");
1662 
1663         del_timer_sync(&dev->mem_timer);
1664         while (!list_empty(&dev->txreq_free)) {
1665                 struct list_head *l = dev->txreq_free.next;
1666                 struct qib_verbs_txreq *tx;
1667 
1668                 list_del(l);
1669                 tx = list_entry(l, struct qib_verbs_txreq, txreq.list);
1670                 kfree(tx);
1671         }
1672         if (dd->pport->sdma_descq_cnt)
1673                 dma_free_coherent(&dd->pcidev->dev,
1674                                   dd->pport->sdma_descq_cnt *
1675                                         sizeof(struct qib_pio_header),
1676                                   dev->pio_hdrs, dev->pio_hdrs_phys);
1677 }
1678 
1679 /**
1680  * _qib_schedule_send - schedule progress
1681  * @qp - the qp
1682  *
1683  * This schedules progress w/o regard to the s_flags.
1684  *
1685  * It is only used in post send, which doesn't hold
1686  * the s_lock.
1687  */
1688 bool _qib_schedule_send(struct rvt_qp *qp)
1689 {
1690         struct qib_ibport *ibp =
1691                 to_iport(qp->ibqp.device, qp->port_num);
1692         struct qib_pportdata *ppd = ppd_from_ibp(ibp);
1693         struct qib_qp_priv *priv = qp->priv;
1694 
1695         return queue_work(ppd->qib_wq, &priv->s_work);
1696 }
1697 
1698 /**
1699  * qib_schedule_send - schedule progress
1700  * @qp - the qp
1701  *
1702  * This schedules qp progress.  The s_lock
1703  * should be held.
1704  */
1705 bool qib_schedule_send(struct rvt_qp *qp)
1706 {
1707         if (qib_send_ok(qp))
1708                 return _qib_schedule_send(qp);
1709         return false;
1710 }
/* [<][>][^][v][top][bottom][index][help] */
root/drivers/infiniband/hw/qib/qib_verbs.c

DEFINITIONS
