root/drivers/infiniband/hw/cxgb3/iwch_mem.c

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DEFINITIONS

This source file includes following definitions.
  1. iwch_finish_mem_reg
  2. iwch_register_mem
  3. iwch_alloc_pbl
  4. iwch_free_pbl
  5. iwch_write_pbl

   1 /*
   2  * Copyright (c) 2006 Chelsio, Inc. All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  */
  32 #include <linux/slab.h>
  33 #include <asm/byteorder.h>
  34 
  35 #include <rdma/iw_cm.h>
  36 #include <rdma/ib_verbs.h>
  37 
  38 #include "cxio_hal.h"
  39 #include "cxio_resource.h"
  40 #include "iwch.h"
  41 #include "iwch_provider.h"
  42 
  43 static int iwch_finish_mem_reg(struct iwch_mr *mhp, u32 stag)
  44 {
  45         u32 mmid;
  46 
  47         mhp->attr.state = 1;
  48         mhp->attr.stag = stag;
  49         mmid = stag >> 8;
  50         mhp->ibmr.rkey = mhp->ibmr.lkey = stag;
  51         pr_debug("%s mmid 0x%x mhp %p\n", __func__, mmid, mhp);
  52         return xa_insert_irq(&mhp->rhp->mrs, mmid, mhp, GFP_KERNEL);
  53 }
  54 
  55 int iwch_register_mem(struct iwch_dev *rhp, struct iwch_pd *php,
  56                       struct iwch_mr *mhp, int shift)
  57 {
  58         u32 stag;
  59         int ret;
  60 
  61         if (cxio_register_phys_mem(&rhp->rdev,
  62                                    &stag, mhp->attr.pdid,
  63                                    mhp->attr.perms,
  64                                    mhp->attr.zbva,
  65                                    mhp->attr.va_fbo,
  66                                    mhp->attr.len,
  67                                    shift - 12,
  68                                    mhp->attr.pbl_size, mhp->attr.pbl_addr))
  69                 return -ENOMEM;
  70 
  71         ret = iwch_finish_mem_reg(mhp, stag);
  72         if (ret)
  73                 cxio_dereg_mem(&rhp->rdev, mhp->attr.stag, mhp->attr.pbl_size,
  74                        mhp->attr.pbl_addr);
  75         return ret;
  76 }
  77 
  78 int iwch_alloc_pbl(struct iwch_mr *mhp, int npages)
  79 {
  80         mhp->attr.pbl_addr = cxio_hal_pblpool_alloc(&mhp->rhp->rdev,
  81                                                     npages << 3);
  82 
  83         if (!mhp->attr.pbl_addr)
  84                 return -ENOMEM;
  85 
  86         mhp->attr.pbl_size = npages;
  87 
  88         return 0;
  89 }
  90 
  91 void iwch_free_pbl(struct iwch_mr *mhp)
  92 {
  93         cxio_hal_pblpool_free(&mhp->rhp->rdev, mhp->attr.pbl_addr,
  94                               mhp->attr.pbl_size << 3);
  95 }
  96 
  97 int iwch_write_pbl(struct iwch_mr *mhp, __be64 *pages, int npages, int offset)
  98 {
  99         return cxio_write_pbl(&mhp->rhp->rdev, pages,
 100                               mhp->attr.pbl_addr + (offset << 3), npages);
 101 }

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