1 /*
2 * Copyright(c) 2016 - 2018 Intel Corporation.
3 *
4 * This file is provided under a dual BSD/GPLv2 license. When using or
5 * redistributing this file, you may do so under either license.
6 *
7 * GPL LICENSE SUMMARY
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * BSD LICENSE
19 *
20 * Redistribution and use in source and binary forms, with or without
21 * modification, are permitted provided that the following conditions
22 * are met:
23 *
24 * - Redistributions of source code must retain the above copyright
25 * notice, this list of conditions and the following disclaimer.
26 * - Redistributions in binary form must reproduce the above copyright
27 * notice, this list of conditions and the following disclaimer in
28 * the documentation and/or other materials provided with the
29 * distribution.
30 * - Neither the name of Intel Corporation nor the names of its
31 * contributors may be used to endorse or promote products derived
32 * from this software without specific prior written permission.
33 *
34 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
35 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
36 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
37 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
38 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
39 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
40 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
41 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
42 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
43 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
44 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
45 *
46 */
47 #if !defined(__RVT_TRACE_CQ_H) || defined(TRACE_HEADER_MULTI_READ)
48 #define __RVT_TRACE_CQ_H
49
50 #include <linux/tracepoint.h>
51 #include <linux/trace_seq.h>
52
53 #include <rdma/ib_verbs.h>
54 #include <rdma/rdmavt_cq.h>
55
56 #undef TRACE_SYSTEM
57 #define TRACE_SYSTEM rvt_cq
58
59 #define wc_opcode_name(opcode) { IB_WC_##opcode, #opcode }
60 #define show_wc_opcode(opcode) \
61 __print_symbolic(opcode, \
62 wc_opcode_name(SEND), \
63 wc_opcode_name(RDMA_WRITE), \
64 wc_opcode_name(RDMA_READ), \
65 wc_opcode_name(COMP_SWAP), \
66 wc_opcode_name(FETCH_ADD), \
67 wc_opcode_name(LSO), \
68 wc_opcode_name(LOCAL_INV), \
69 wc_opcode_name(REG_MR), \
70 wc_opcode_name(MASKED_COMP_SWAP), \
71 wc_opcode_name(RECV), \
72 wc_opcode_name(RECV_RDMA_WITH_IMM))
73
74 #define CQ_ATTR_PRINT \
75 "[%s] user cq %s cqe %u comp_vector %d comp_vector_cpu %d flags %x"
76
77 DECLARE_EVENT_CLASS(rvt_cq_template,
78 TP_PROTO(struct rvt_cq *cq,
79 const struct ib_cq_init_attr *attr),
80 TP_ARGS(cq, attr),
81 TP_STRUCT__entry(RDI_DEV_ENTRY(cq->rdi)
82 __field(struct rvt_mmap_info *, ip)
83 __field(unsigned int, cqe)
84 __field(int, comp_vector)
85 __field(int, comp_vector_cpu)
86 __field(u32, flags)
87 ),
88 TP_fast_assign(RDI_DEV_ASSIGN(cq->rdi)
89 __entry->ip = cq->ip;
90 __entry->cqe = attr->cqe;
91 __entry->comp_vector = attr->comp_vector;
92 __entry->comp_vector_cpu =
93 cq->comp_vector_cpu;
94 __entry->flags = attr->flags;
95 ),
96 TP_printk(CQ_ATTR_PRINT, __get_str(dev),
97 __entry->ip ? "true" : "false", __entry->cqe,
98 __entry->comp_vector, __entry->comp_vector_cpu,
99 __entry->flags
100 )
101 );
102
103 DEFINE_EVENT(rvt_cq_template, rvt_create_cq,
104 TP_PROTO(struct rvt_cq *cq, const struct ib_cq_init_attr *attr),
105 TP_ARGS(cq, attr));
106
107 #define CQ_PRN \
108 "[%s] idx %u wr_id %llx status %u opcode %u,%s length %u qpn %x flags %x imm %x"
109
110 DECLARE_EVENT_CLASS(
111 rvt_cq_entry_template,
112 TP_PROTO(struct rvt_cq *cq, struct ib_wc *wc, u32 idx),
113 TP_ARGS(cq, wc, idx),
114 TP_STRUCT__entry(
115 RDI_DEV_ENTRY(cq->rdi)
116 __field(u64, wr_id)
117 __field(u32, status)
118 __field(u32, opcode)
119 __field(u32, qpn)
120 __field(u32, length)
121 __field(u32, idx)
122 __field(u32, flags)
123 __field(u32, imm)
124 ),
125 TP_fast_assign(
126 RDI_DEV_ASSIGN(cq->rdi)
127 __entry->wr_id = wc->wr_id;
128 __entry->status = wc->status;
129 __entry->opcode = wc->opcode;
130 __entry->length = wc->byte_len;
131 __entry->qpn = wc->qp->qp_num;
132 __entry->idx = idx;
133 __entry->flags = wc->wc_flags;
134 __entry->imm = be32_to_cpu(wc->ex.imm_data);
135 ),
136 TP_printk(
137 CQ_PRN,
138 __get_str(dev),
139 __entry->idx,
140 __entry->wr_id,
141 __entry->status,
142 __entry->opcode, show_wc_opcode(__entry->opcode),
143 __entry->length,
144 __entry->qpn,
145 __entry->flags,
146 __entry->imm
147 )
148 );
149
150 DEFINE_EVENT(
151 rvt_cq_entry_template, rvt_cq_enter,
152 TP_PROTO(struct rvt_cq *cq, struct ib_wc *wc, u32 idx),
153 TP_ARGS(cq, wc, idx));
154
155 DEFINE_EVENT(
156 rvt_cq_entry_template, rvt_cq_poll,
157 TP_PROTO(struct rvt_cq *cq, struct ib_wc *wc, u32 idx),
158 TP_ARGS(cq, wc, idx));
159
160 #endif /* __RVT_TRACE_CQ_H */
161
162 #undef TRACE_INCLUDE_PATH
163 #undef TRACE_INCLUDE_FILE
164 #define TRACE_INCLUDE_PATH .
165 #define TRACE_INCLUDE_FILE trace_cq
166 #include <trace/define_trace.h>