This source file includes following definitions.
- fpga_image_info_alloc
- fpga_image_info_free
- fpga_mgr_write_init_buf
- fpga_mgr_write_init_sg
- fpga_mgr_write_complete
- fpga_mgr_buf_load_sg
- fpga_mgr_buf_load_mapped
- fpga_mgr_buf_load
- fpga_mgr_firmware_load
- fpga_mgr_load
- name_show
- state_show
- status_show
- __fpga_mgr_get
- fpga_mgr_dev_match
- fpga_mgr_get
- of_fpga_mgr_get
- fpga_mgr_put
- fpga_mgr_lock
- fpga_mgr_unlock
- fpga_mgr_create
- fpga_mgr_free
- devm_fpga_mgr_release
- devm_fpga_mgr_create
- fpga_mgr_register
- fpga_mgr_unregister
- fpga_mgr_dev_release
- fpga_mgr_class_init
- fpga_mgr_class_exit
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11 #include <linux/firmware.h>
12 #include <linux/fpga/fpga-mgr.h>
13 #include <linux/idr.h>
14 #include <linux/module.h>
15 #include <linux/of.h>
16 #include <linux/mutex.h>
17 #include <linux/slab.h>
18 #include <linux/scatterlist.h>
19 #include <linux/highmem.h>
20
21 static DEFINE_IDA(fpga_mgr_ida);
22 static struct class *fpga_mgr_class;
23
24
25
26
27
28
29
30 struct fpga_image_info *fpga_image_info_alloc(struct device *dev)
31 {
32 struct fpga_image_info *info;
33
34 get_device(dev);
35
36 info = devm_kzalloc(dev, sizeof(*info), GFP_KERNEL);
37 if (!info) {
38 put_device(dev);
39 return NULL;
40 }
41
42 info->dev = dev;
43
44 return info;
45 }
46 EXPORT_SYMBOL_GPL(fpga_image_info_alloc);
47
48
49
50
51
52 void fpga_image_info_free(struct fpga_image_info *info)
53 {
54 struct device *dev;
55
56 if (!info)
57 return;
58
59 dev = info->dev;
60 if (info->firmware_name)
61 devm_kfree(dev, info->firmware_name);
62
63 devm_kfree(dev, info);
64 put_device(dev);
65 }
66 EXPORT_SYMBOL_GPL(fpga_image_info_free);
67
68
69
70
71
72
73
74 static int fpga_mgr_write_init_buf(struct fpga_manager *mgr,
75 struct fpga_image_info *info,
76 const char *buf, size_t count)
77 {
78 int ret;
79
80 mgr->state = FPGA_MGR_STATE_WRITE_INIT;
81 if (!mgr->mops->initial_header_size)
82 ret = mgr->mops->write_init(mgr, info, NULL, 0);
83 else
84 ret = mgr->mops->write_init(
85 mgr, info, buf, min(mgr->mops->initial_header_size, count));
86
87 if (ret) {
88 dev_err(&mgr->dev, "Error preparing FPGA for writing\n");
89 mgr->state = FPGA_MGR_STATE_WRITE_INIT_ERR;
90 return ret;
91 }
92
93 return 0;
94 }
95
96 static int fpga_mgr_write_init_sg(struct fpga_manager *mgr,
97 struct fpga_image_info *info,
98 struct sg_table *sgt)
99 {
100 struct sg_mapping_iter miter;
101 size_t len;
102 char *buf;
103 int ret;
104
105 if (!mgr->mops->initial_header_size)
106 return fpga_mgr_write_init_buf(mgr, info, NULL, 0);
107
108
109
110
111
112 sg_miter_start(&miter, sgt->sgl, sgt->nents, SG_MITER_FROM_SG);
113 if (sg_miter_next(&miter) &&
114 miter.length >= mgr->mops->initial_header_size) {
115 ret = fpga_mgr_write_init_buf(mgr, info, miter.addr,
116 miter.length);
117 sg_miter_stop(&miter);
118 return ret;
119 }
120 sg_miter_stop(&miter);
121
122
123 buf = kmalloc(mgr->mops->initial_header_size, GFP_KERNEL);
124 if (!buf)
125 return -ENOMEM;
126
127 len = sg_copy_to_buffer(sgt->sgl, sgt->nents, buf,
128 mgr->mops->initial_header_size);
129 ret = fpga_mgr_write_init_buf(mgr, info, buf, len);
130
131 kfree(buf);
132
133 return ret;
134 }
135
136
137
138
139
140 static int fpga_mgr_write_complete(struct fpga_manager *mgr,
141 struct fpga_image_info *info)
142 {
143 int ret;
144
145 mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE;
146 ret = mgr->mops->write_complete(mgr, info);
147 if (ret) {
148 dev_err(&mgr->dev, "Error after writing image data to FPGA\n");
149 mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE_ERR;
150 return ret;
151 }
152 mgr->state = FPGA_MGR_STATE_OPERATING;
153
154 return 0;
155 }
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173
174 static int fpga_mgr_buf_load_sg(struct fpga_manager *mgr,
175 struct fpga_image_info *info,
176 struct sg_table *sgt)
177 {
178 int ret;
179
180 ret = fpga_mgr_write_init_sg(mgr, info, sgt);
181 if (ret)
182 return ret;
183
184
185 mgr->state = FPGA_MGR_STATE_WRITE;
186 if (mgr->mops->write_sg) {
187 ret = mgr->mops->write_sg(mgr, sgt);
188 } else {
189 struct sg_mapping_iter miter;
190
191 sg_miter_start(&miter, sgt->sgl, sgt->nents, SG_MITER_FROM_SG);
192 while (sg_miter_next(&miter)) {
193 ret = mgr->mops->write(mgr, miter.addr, miter.length);
194 if (ret)
195 break;
196 }
197 sg_miter_stop(&miter);
198 }
199
200 if (ret) {
201 dev_err(&mgr->dev, "Error while writing image data to FPGA\n");
202 mgr->state = FPGA_MGR_STATE_WRITE_ERR;
203 return ret;
204 }
205
206 return fpga_mgr_write_complete(mgr, info);
207 }
208
209 static int fpga_mgr_buf_load_mapped(struct fpga_manager *mgr,
210 struct fpga_image_info *info,
211 const char *buf, size_t count)
212 {
213 int ret;
214
215 ret = fpga_mgr_write_init_buf(mgr, info, buf, count);
216 if (ret)
217 return ret;
218
219
220
221
222 mgr->state = FPGA_MGR_STATE_WRITE;
223 ret = mgr->mops->write(mgr, buf, count);
224 if (ret) {
225 dev_err(&mgr->dev, "Error while writing image data to FPGA\n");
226 mgr->state = FPGA_MGR_STATE_WRITE_ERR;
227 return ret;
228 }
229
230 return fpga_mgr_write_complete(mgr, info);
231 }
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246
247 static int fpga_mgr_buf_load(struct fpga_manager *mgr,
248 struct fpga_image_info *info,
249 const char *buf, size_t count)
250 {
251 struct page **pages;
252 struct sg_table sgt;
253 const void *p;
254 int nr_pages;
255 int index;
256 int rc;
257
258
259
260
261
262
263 if (mgr->mops->write)
264 return fpga_mgr_buf_load_mapped(mgr, info, buf, count);
265
266
267
268
269
270 nr_pages = DIV_ROUND_UP((unsigned long)buf + count, PAGE_SIZE) -
271 (unsigned long)buf / PAGE_SIZE;
272 pages = kmalloc_array(nr_pages, sizeof(struct page *), GFP_KERNEL);
273 if (!pages)
274 return -ENOMEM;
275
276 p = buf - offset_in_page(buf);
277 for (index = 0; index < nr_pages; index++) {
278 if (is_vmalloc_addr(p))
279 pages[index] = vmalloc_to_page(p);
280 else
281 pages[index] = kmap_to_page((void *)p);
282 if (!pages[index]) {
283 kfree(pages);
284 return -EFAULT;
285 }
286 p += PAGE_SIZE;
287 }
288
289
290
291
292
293 rc = sg_alloc_table_from_pages(&sgt, pages, index, offset_in_page(buf),
294 count, GFP_KERNEL);
295 kfree(pages);
296 if (rc)
297 return rc;
298
299 rc = fpga_mgr_buf_load_sg(mgr, info, &sgt);
300 sg_free_table(&sgt);
301
302 return rc;
303 }
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318
319 static int fpga_mgr_firmware_load(struct fpga_manager *mgr,
320 struct fpga_image_info *info,
321 const char *image_name)
322 {
323 struct device *dev = &mgr->dev;
324 const struct firmware *fw;
325 int ret;
326
327 dev_info(dev, "writing %s to %s\n", image_name, mgr->name);
328
329 mgr->state = FPGA_MGR_STATE_FIRMWARE_REQ;
330
331 ret = request_firmware(&fw, image_name, dev);
332 if (ret) {
333 mgr->state = FPGA_MGR_STATE_FIRMWARE_REQ_ERR;
334 dev_err(dev, "Error requesting firmware %s\n", image_name);
335 return ret;
336 }
337
338 ret = fpga_mgr_buf_load(mgr, info, fw->data, fw->size);
339
340 release_firmware(fw);
341
342 return ret;
343 }
344
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354
355 int fpga_mgr_load(struct fpga_manager *mgr, struct fpga_image_info *info)
356 {
357 if (info->sgt)
358 return fpga_mgr_buf_load_sg(mgr, info, info->sgt);
359 if (info->buf && info->count)
360 return fpga_mgr_buf_load(mgr, info, info->buf, info->count);
361 if (info->firmware_name)
362 return fpga_mgr_firmware_load(mgr, info, info->firmware_name);
363 return -EINVAL;
364 }
365 EXPORT_SYMBOL_GPL(fpga_mgr_load);
366
367 static const char * const state_str[] = {
368 [FPGA_MGR_STATE_UNKNOWN] = "unknown",
369 [FPGA_MGR_STATE_POWER_OFF] = "power off",
370 [FPGA_MGR_STATE_POWER_UP] = "power up",
371 [FPGA_MGR_STATE_RESET] = "reset",
372
373
374 [FPGA_MGR_STATE_FIRMWARE_REQ] = "firmware request",
375 [FPGA_MGR_STATE_FIRMWARE_REQ_ERR] = "firmware request error",
376
377
378 [FPGA_MGR_STATE_WRITE_INIT] = "write init",
379 [FPGA_MGR_STATE_WRITE_INIT_ERR] = "write init error",
380
381
382 [FPGA_MGR_STATE_WRITE] = "write",
383 [FPGA_MGR_STATE_WRITE_ERR] = "write error",
384
385
386 [FPGA_MGR_STATE_WRITE_COMPLETE] = "write complete",
387 [FPGA_MGR_STATE_WRITE_COMPLETE_ERR] = "write complete error",
388
389
390 [FPGA_MGR_STATE_OPERATING] = "operating",
391 };
392
393 static ssize_t name_show(struct device *dev,
394 struct device_attribute *attr, char *buf)
395 {
396 struct fpga_manager *mgr = to_fpga_manager(dev);
397
398 return sprintf(buf, "%s\n", mgr->name);
399 }
400
401 static ssize_t state_show(struct device *dev,
402 struct device_attribute *attr, char *buf)
403 {
404 struct fpga_manager *mgr = to_fpga_manager(dev);
405
406 return sprintf(buf, "%s\n", state_str[mgr->state]);
407 }
408
409 static ssize_t status_show(struct device *dev,
410 struct device_attribute *attr, char *buf)
411 {
412 struct fpga_manager *mgr = to_fpga_manager(dev);
413 u64 status;
414 int len = 0;
415
416 if (!mgr->mops->status)
417 return -ENOENT;
418
419 status = mgr->mops->status(mgr);
420
421 if (status & FPGA_MGR_STATUS_OPERATION_ERR)
422 len += sprintf(buf + len, "reconfig operation error\n");
423 if (status & FPGA_MGR_STATUS_CRC_ERR)
424 len += sprintf(buf + len, "reconfig CRC error\n");
425 if (status & FPGA_MGR_STATUS_INCOMPATIBLE_IMAGE_ERR)
426 len += sprintf(buf + len, "reconfig incompatible image\n");
427 if (status & FPGA_MGR_STATUS_IP_PROTOCOL_ERR)
428 len += sprintf(buf + len, "reconfig IP protocol error\n");
429 if (status & FPGA_MGR_STATUS_FIFO_OVERFLOW_ERR)
430 len += sprintf(buf + len, "reconfig fifo overflow error\n");
431
432 return len;
433 }
434
435 static DEVICE_ATTR_RO(name);
436 static DEVICE_ATTR_RO(state);
437 static DEVICE_ATTR_RO(status);
438
439 static struct attribute *fpga_mgr_attrs[] = {
440 &dev_attr_name.attr,
441 &dev_attr_state.attr,
442 &dev_attr_status.attr,
443 NULL,
444 };
445 ATTRIBUTE_GROUPS(fpga_mgr);
446
447 static struct fpga_manager *__fpga_mgr_get(struct device *dev)
448 {
449 struct fpga_manager *mgr;
450
451 mgr = to_fpga_manager(dev);
452
453 if (!try_module_get(dev->parent->driver->owner))
454 goto err_dev;
455
456 return mgr;
457
458 err_dev:
459 put_device(dev);
460 return ERR_PTR(-ENODEV);
461 }
462
463 static int fpga_mgr_dev_match(struct device *dev, const void *data)
464 {
465 return dev->parent == data;
466 }
467
468
469
470
471
472
473
474 struct fpga_manager *fpga_mgr_get(struct device *dev)
475 {
476 struct device *mgr_dev = class_find_device(fpga_mgr_class, NULL, dev,
477 fpga_mgr_dev_match);
478 if (!mgr_dev)
479 return ERR_PTR(-ENODEV);
480
481 return __fpga_mgr_get(mgr_dev);
482 }
483 EXPORT_SYMBOL_GPL(fpga_mgr_get);
484
485
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488
489
490
491
492 struct fpga_manager *of_fpga_mgr_get(struct device_node *node)
493 {
494 struct device *dev;
495
496 dev = class_find_device_by_of_node(fpga_mgr_class, node);
497 if (!dev)
498 return ERR_PTR(-ENODEV);
499
500 return __fpga_mgr_get(dev);
501 }
502 EXPORT_SYMBOL_GPL(of_fpga_mgr_get);
503
504
505
506
507
508 void fpga_mgr_put(struct fpga_manager *mgr)
509 {
510 module_put(mgr->dev.parent->driver->owner);
511 put_device(&mgr->dev);
512 }
513 EXPORT_SYMBOL_GPL(fpga_mgr_put);
514
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520
521
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525
526
527 int fpga_mgr_lock(struct fpga_manager *mgr)
528 {
529 if (!mutex_trylock(&mgr->ref_mutex)) {
530 dev_err(&mgr->dev, "FPGA manager is in use.\n");
531 return -EBUSY;
532 }
533
534 return 0;
535 }
536 EXPORT_SYMBOL_GPL(fpga_mgr_lock);
537
538
539
540
541
542 void fpga_mgr_unlock(struct fpga_manager *mgr)
543 {
544 mutex_unlock(&mgr->ref_mutex);
545 }
546 EXPORT_SYMBOL_GPL(fpga_mgr_unlock);
547
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557
558
559
560 struct fpga_manager *fpga_mgr_create(struct device *dev, const char *name,
561 const struct fpga_manager_ops *mops,
562 void *priv)
563 {
564 struct fpga_manager *mgr;
565 int id, ret;
566
567 if (!mops || !mops->write_complete || !mops->state ||
568 !mops->write_init || (!mops->write && !mops->write_sg) ||
569 (mops->write && mops->write_sg)) {
570 dev_err(dev, "Attempt to register without fpga_manager_ops\n");
571 return NULL;
572 }
573
574 if (!name || !strlen(name)) {
575 dev_err(dev, "Attempt to register with no name!\n");
576 return NULL;
577 }
578
579 mgr = kzalloc(sizeof(*mgr), GFP_KERNEL);
580 if (!mgr)
581 return NULL;
582
583 id = ida_simple_get(&fpga_mgr_ida, 0, 0, GFP_KERNEL);
584 if (id < 0) {
585 ret = id;
586 goto error_kfree;
587 }
588
589 mutex_init(&mgr->ref_mutex);
590
591 mgr->name = name;
592 mgr->mops = mops;
593 mgr->priv = priv;
594
595 device_initialize(&mgr->dev);
596 mgr->dev.class = fpga_mgr_class;
597 mgr->dev.groups = mops->groups;
598 mgr->dev.parent = dev;
599 mgr->dev.of_node = dev->of_node;
600 mgr->dev.id = id;
601
602 ret = dev_set_name(&mgr->dev, "fpga%d", id);
603 if (ret)
604 goto error_device;
605
606 return mgr;
607
608 error_device:
609 ida_simple_remove(&fpga_mgr_ida, id);
610 error_kfree:
611 kfree(mgr);
612
613 return NULL;
614 }
615 EXPORT_SYMBOL_GPL(fpga_mgr_create);
616
617
618
619
620
621 void fpga_mgr_free(struct fpga_manager *mgr)
622 {
623 ida_simple_remove(&fpga_mgr_ida, mgr->dev.id);
624 kfree(mgr);
625 }
626 EXPORT_SYMBOL_GPL(fpga_mgr_free);
627
628 static void devm_fpga_mgr_release(struct device *dev, void *res)
629 {
630 struct fpga_manager *mgr = *(struct fpga_manager **)res;
631
632 fpga_mgr_free(mgr);
633 }
634
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650
651
652 struct fpga_manager *devm_fpga_mgr_create(struct device *dev, const char *name,
653 const struct fpga_manager_ops *mops,
654 void *priv)
655 {
656 struct fpga_manager **ptr, *mgr;
657
658 ptr = devres_alloc(devm_fpga_mgr_release, sizeof(*ptr), GFP_KERNEL);
659 if (!ptr)
660 return NULL;
661
662 mgr = fpga_mgr_create(dev, name, mops, priv);
663 if (!mgr) {
664 devres_free(ptr);
665 } else {
666 *ptr = mgr;
667 devres_add(dev, ptr);
668 }
669
670 return mgr;
671 }
672 EXPORT_SYMBOL_GPL(devm_fpga_mgr_create);
673
674
675
676
677
678
679
680 int fpga_mgr_register(struct fpga_manager *mgr)
681 {
682 int ret;
683
684
685
686
687
688
689 mgr->state = mgr->mops->state(mgr);
690
691 ret = device_add(&mgr->dev);
692 if (ret)
693 goto error_device;
694
695 dev_info(&mgr->dev, "%s registered\n", mgr->name);
696
697 return 0;
698
699 error_device:
700 ida_simple_remove(&fpga_mgr_ida, mgr->dev.id);
701
702 return ret;
703 }
704 EXPORT_SYMBOL_GPL(fpga_mgr_register);
705
706
707
708
709
710
711
712 void fpga_mgr_unregister(struct fpga_manager *mgr)
713 {
714 dev_info(&mgr->dev, "%s %s\n", __func__, mgr->name);
715
716
717
718
719
720 if (mgr->mops->fpga_remove)
721 mgr->mops->fpga_remove(mgr);
722
723 device_unregister(&mgr->dev);
724 }
725 EXPORT_SYMBOL_GPL(fpga_mgr_unregister);
726
727 static void fpga_mgr_dev_release(struct device *dev)
728 {
729 }
730
731 static int __init fpga_mgr_class_init(void)
732 {
733 pr_info("FPGA manager framework\n");
734
735 fpga_mgr_class = class_create(THIS_MODULE, "fpga_manager");
736 if (IS_ERR(fpga_mgr_class))
737 return PTR_ERR(fpga_mgr_class);
738
739 fpga_mgr_class->dev_groups = fpga_mgr_groups;
740 fpga_mgr_class->dev_release = fpga_mgr_dev_release;
741
742 return 0;
743 }
744
745 static void __exit fpga_mgr_class_exit(void)
746 {
747 class_destroy(fpga_mgr_class);
748 ida_destroy(&fpga_mgr_ida);
749 }
750
751 MODULE_AUTHOR("Alan Tull <atull@kernel.org>");
752 MODULE_DESCRIPTION("FPGA manager framework");
753 MODULE_LICENSE("GPL v2");
754
755 subsys_initcall(fpga_mgr_class_init);
756 module_exit(fpga_mgr_class_exit);