drivers/hwmon/pmbus/pmbus.h

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   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2 /*
   3  * pmbus.h - Common defines and structures for PMBus devices
   4  *
   5  * Copyright (c) 2010, 2011 Ericsson AB.
   6  * Copyright (c) 2012 Guenter Roeck
   7  */
   8 
   9 #ifndef PMBUS_H
  10 #define PMBUS_H
  11 
  12 #include <linux/bitops.h>
  13 #include <linux/regulator/driver.h>
  14 
  15 /*
  16  * Registers
  17  */
  18 enum pmbus_regs {
  19         PMBUS_PAGE                      = 0x00,
  20         PMBUS_OPERATION                 = 0x01,
  21         PMBUS_ON_OFF_CONFIG             = 0x02,
  22         PMBUS_CLEAR_FAULTS              = 0x03,
  23         PMBUS_PHASE                     = 0x04,
  24 
  25         PMBUS_CAPABILITY                = 0x19,
  26         PMBUS_QUERY                     = 0x1A,
  27 
  28         PMBUS_VOUT_MODE                 = 0x20,
  29         PMBUS_VOUT_COMMAND              = 0x21,
  30         PMBUS_VOUT_TRIM                 = 0x22,
  31         PMBUS_VOUT_CAL_OFFSET           = 0x23,
  32         PMBUS_VOUT_MAX                  = 0x24,
  33         PMBUS_VOUT_MARGIN_HIGH          = 0x25,
  34         PMBUS_VOUT_MARGIN_LOW           = 0x26,
  35         PMBUS_VOUT_TRANSITION_RATE      = 0x27,
  36         PMBUS_VOUT_DROOP                = 0x28,
  37         PMBUS_VOUT_SCALE_LOOP           = 0x29,
  38         PMBUS_VOUT_SCALE_MONITOR        = 0x2A,
  39 
  40         PMBUS_COEFFICIENTS              = 0x30,
  41         PMBUS_POUT_MAX                  = 0x31,
  42 
  43         PMBUS_FAN_CONFIG_12             = 0x3A,
  44         PMBUS_FAN_COMMAND_1             = 0x3B,
  45         PMBUS_FAN_COMMAND_2             = 0x3C,
  46         PMBUS_FAN_CONFIG_34             = 0x3D,
  47         PMBUS_FAN_COMMAND_3             = 0x3E,
  48         PMBUS_FAN_COMMAND_4             = 0x3F,
  49 
  50         PMBUS_VOUT_OV_FAULT_LIMIT       = 0x40,
  51         PMBUS_VOUT_OV_FAULT_RESPONSE    = 0x41,
  52         PMBUS_VOUT_OV_WARN_LIMIT        = 0x42,
  53         PMBUS_VOUT_UV_WARN_LIMIT        = 0x43,
  54         PMBUS_VOUT_UV_FAULT_LIMIT       = 0x44,
  55         PMBUS_VOUT_UV_FAULT_RESPONSE    = 0x45,
  56         PMBUS_IOUT_OC_FAULT_LIMIT       = 0x46,
  57         PMBUS_IOUT_OC_FAULT_RESPONSE    = 0x47,
  58         PMBUS_IOUT_OC_LV_FAULT_LIMIT    = 0x48,
  59         PMBUS_IOUT_OC_LV_FAULT_RESPONSE = 0x49,
  60         PMBUS_IOUT_OC_WARN_LIMIT        = 0x4A,
  61         PMBUS_IOUT_UC_FAULT_LIMIT       = 0x4B,
  62         PMBUS_IOUT_UC_FAULT_RESPONSE    = 0x4C,
  63 
  64         PMBUS_OT_FAULT_LIMIT            = 0x4F,
  65         PMBUS_OT_FAULT_RESPONSE         = 0x50,
  66         PMBUS_OT_WARN_LIMIT             = 0x51,
  67         PMBUS_UT_WARN_LIMIT             = 0x52,
  68         PMBUS_UT_FAULT_LIMIT            = 0x53,
  69         PMBUS_UT_FAULT_RESPONSE         = 0x54,
  70         PMBUS_VIN_OV_FAULT_LIMIT        = 0x55,
  71         PMBUS_VIN_OV_FAULT_RESPONSE     = 0x56,
  72         PMBUS_VIN_OV_WARN_LIMIT         = 0x57,
  73         PMBUS_VIN_UV_WARN_LIMIT         = 0x58,
  74         PMBUS_VIN_UV_FAULT_LIMIT        = 0x59,
  75 
  76         PMBUS_IIN_OC_FAULT_LIMIT        = 0x5B,
  77         PMBUS_IIN_OC_WARN_LIMIT         = 0x5D,
  78 
  79         PMBUS_POUT_OP_FAULT_LIMIT       = 0x68,
  80         PMBUS_POUT_OP_WARN_LIMIT        = 0x6A,
  81         PMBUS_PIN_OP_WARN_LIMIT         = 0x6B,
  82 
  83         PMBUS_STATUS_BYTE               = 0x78,
  84         PMBUS_STATUS_WORD               = 0x79,
  85         PMBUS_STATUS_VOUT               = 0x7A,
  86         PMBUS_STATUS_IOUT               = 0x7B,
  87         PMBUS_STATUS_INPUT              = 0x7C,
  88         PMBUS_STATUS_TEMPERATURE        = 0x7D,
  89         PMBUS_STATUS_CML                = 0x7E,
  90         PMBUS_STATUS_OTHER              = 0x7F,
  91         PMBUS_STATUS_MFR_SPECIFIC       = 0x80,
  92         PMBUS_STATUS_FAN_12             = 0x81,
  93         PMBUS_STATUS_FAN_34             = 0x82,
  94 
  95         PMBUS_READ_VIN                  = 0x88,
  96         PMBUS_READ_IIN                  = 0x89,
  97         PMBUS_READ_VCAP                 = 0x8A,
  98         PMBUS_READ_VOUT                 = 0x8B,
  99         PMBUS_READ_IOUT                 = 0x8C,
 100         PMBUS_READ_TEMPERATURE_1        = 0x8D,
 101         PMBUS_READ_TEMPERATURE_2        = 0x8E,
 102         PMBUS_READ_TEMPERATURE_3        = 0x8F,
 103         PMBUS_READ_FAN_SPEED_1          = 0x90,
 104         PMBUS_READ_FAN_SPEED_2          = 0x91,
 105         PMBUS_READ_FAN_SPEED_3          = 0x92,
 106         PMBUS_READ_FAN_SPEED_4          = 0x93,
 107         PMBUS_READ_DUTY_CYCLE           = 0x94,
 108         PMBUS_READ_FREQUENCY            = 0x95,
 109         PMBUS_READ_POUT                 = 0x96,
 110         PMBUS_READ_PIN                  = 0x97,
 111 
 112         PMBUS_REVISION                  = 0x98,
 113         PMBUS_MFR_ID                    = 0x99,
 114         PMBUS_MFR_MODEL                 = 0x9A,
 115         PMBUS_MFR_REVISION              = 0x9B,
 116         PMBUS_MFR_LOCATION              = 0x9C,
 117         PMBUS_MFR_DATE                  = 0x9D,
 118         PMBUS_MFR_SERIAL                = 0x9E,
 119 
 120 /*
 121  * Virtual registers.
 122  * Useful to support attributes which are not supported by standard PMBus
 123  * registers but exist as manufacturer specific registers on individual chips.
 124  * Must be mapped to real registers in device specific code.
 125  *
 126  * Semantics:
 127  * Virtual registers are all word size.
 128  * READ registers are read-only; writes are either ignored or return an error.
 129  * RESET registers are read/write. Reading reset registers returns zero
 130  * (used for detection), writing any value causes the associated history to be
 131  * reset.
 132  * Virtual registers have to be handled in device specific driver code. Chip
 133  * driver code returns non-negative register values if a virtual register is
 134  * supported, or a negative error code if not. The chip driver may return
 135  * -ENODATA or any other error code in this case, though an error code other
 136  * than -ENODATA is handled more efficiently and thus preferred. Either case,
 137  * the calling PMBus core code will abort if the chip driver returns an error
 138  * code when reading or writing virtual registers.
 139  */
 140         PMBUS_VIRT_BASE                 = 0x100,
 141         PMBUS_VIRT_READ_TEMP_AVG,
 142         PMBUS_VIRT_READ_TEMP_MIN,
 143         PMBUS_VIRT_READ_TEMP_MAX,
 144         PMBUS_VIRT_RESET_TEMP_HISTORY,
 145         PMBUS_VIRT_READ_VIN_AVG,
 146         PMBUS_VIRT_READ_VIN_MIN,
 147         PMBUS_VIRT_READ_VIN_MAX,
 148         PMBUS_VIRT_RESET_VIN_HISTORY,
 149         PMBUS_VIRT_READ_IIN_AVG,
 150         PMBUS_VIRT_READ_IIN_MIN,
 151         PMBUS_VIRT_READ_IIN_MAX,
 152         PMBUS_VIRT_RESET_IIN_HISTORY,
 153         PMBUS_VIRT_READ_PIN_AVG,
 154         PMBUS_VIRT_READ_PIN_MIN,
 155         PMBUS_VIRT_READ_PIN_MAX,
 156         PMBUS_VIRT_RESET_PIN_HISTORY,
 157         PMBUS_VIRT_READ_POUT_AVG,
 158         PMBUS_VIRT_READ_POUT_MIN,
 159         PMBUS_VIRT_READ_POUT_MAX,
 160         PMBUS_VIRT_RESET_POUT_HISTORY,
 161         PMBUS_VIRT_READ_VOUT_AVG,
 162         PMBUS_VIRT_READ_VOUT_MIN,
 163         PMBUS_VIRT_READ_VOUT_MAX,
 164         PMBUS_VIRT_RESET_VOUT_HISTORY,
 165         PMBUS_VIRT_READ_IOUT_AVG,
 166         PMBUS_VIRT_READ_IOUT_MIN,
 167         PMBUS_VIRT_READ_IOUT_MAX,
 168         PMBUS_VIRT_RESET_IOUT_HISTORY,
 169         PMBUS_VIRT_READ_TEMP2_AVG,
 170         PMBUS_VIRT_READ_TEMP2_MIN,
 171         PMBUS_VIRT_READ_TEMP2_MAX,
 172         PMBUS_VIRT_RESET_TEMP2_HISTORY,
 173 
 174         PMBUS_VIRT_READ_VMON,
 175         PMBUS_VIRT_VMON_UV_WARN_LIMIT,
 176         PMBUS_VIRT_VMON_OV_WARN_LIMIT,
 177         PMBUS_VIRT_VMON_UV_FAULT_LIMIT,
 178         PMBUS_VIRT_VMON_OV_FAULT_LIMIT,
 179         PMBUS_VIRT_STATUS_VMON,
 180 
 181         /*
 182          * RPM and PWM Fan control
 183          *
 184          * Drivers wanting to expose PWM control must define the behaviour of
 185          * PMBUS_VIRT_PWM_[1-4] and PMBUS_VIRT_PWM_ENABLE_[1-4] in the
 186          * {read,write}_word_data callback.
 187          *
 188          * pmbus core provides a default implementation for
 189          * PMBUS_VIRT_FAN_TARGET_[1-4].
 190          *
 191          * TARGET, PWM and PWM_ENABLE members must be defined sequentially;
 192          * pmbus core uses the difference between the provided register and
 193          * it's _1 counterpart to calculate the FAN/PWM ID.
 194          */
 195         PMBUS_VIRT_FAN_TARGET_1,
 196         PMBUS_VIRT_FAN_TARGET_2,
 197         PMBUS_VIRT_FAN_TARGET_3,
 198         PMBUS_VIRT_FAN_TARGET_4,
 199         PMBUS_VIRT_PWM_1,
 200         PMBUS_VIRT_PWM_2,
 201         PMBUS_VIRT_PWM_3,
 202         PMBUS_VIRT_PWM_4,
 203         PMBUS_VIRT_PWM_ENABLE_1,
 204         PMBUS_VIRT_PWM_ENABLE_2,
 205         PMBUS_VIRT_PWM_ENABLE_3,
 206         PMBUS_VIRT_PWM_ENABLE_4,
 207 
 208         /* Samples for average
 209          *
 210          * Drivers wanting to expose functionality for changing the number of
 211          * samples used for average values should implement support in
 212          * {read,write}_word_data callback for either PMBUS_VIRT_SAMPLES if it
 213          * applies to all types of measurements, or any number of specific
 214          * PMBUS_VIRT_*_SAMPLES registers to allow for individual control.
 215          */
 216         PMBUS_VIRT_SAMPLES,
 217         PMBUS_VIRT_IN_SAMPLES,
 218         PMBUS_VIRT_CURR_SAMPLES,
 219         PMBUS_VIRT_POWER_SAMPLES,
 220         PMBUS_VIRT_TEMP_SAMPLES,
 221 };
 222 
 223 /*
 224  * OPERATION
 225  */
 226 #define PB_OPERATION_CONTROL_ON         BIT(7)
 227 
 228 /*
 229  * CAPABILITY
 230  */
 231 #define PB_CAPABILITY_SMBALERT          BIT(4)
 232 #define PB_CAPABILITY_ERROR_CHECK       BIT(7)
 233 
 234 /*
 235  * VOUT_MODE
 236  */
 237 #define PB_VOUT_MODE_MODE_MASK          0xe0
 238 #define PB_VOUT_MODE_PARAM_MASK         0x1f
 239 
 240 #define PB_VOUT_MODE_LINEAR             0x00
 241 #define PB_VOUT_MODE_VID                0x20
 242 #define PB_VOUT_MODE_DIRECT             0x40
 243 
 244 /*
 245  * Fan configuration
 246  */
 247 #define PB_FAN_2_PULSE_MASK             (BIT(0) | BIT(1))
 248 #define PB_FAN_2_RPM                    BIT(2)
 249 #define PB_FAN_2_INSTALLED              BIT(3)
 250 #define PB_FAN_1_PULSE_MASK             (BIT(4) | BIT(5))
 251 #define PB_FAN_1_RPM                    BIT(6)
 252 #define PB_FAN_1_INSTALLED              BIT(7)
 253 
 254 enum pmbus_fan_mode { percent = 0, rpm };
 255 
 256 /*
 257  * STATUS_BYTE, STATUS_WORD (lower)
 258  */
 259 #define PB_STATUS_NONE_ABOVE            BIT(0)
 260 #define PB_STATUS_CML                   BIT(1)
 261 #define PB_STATUS_TEMPERATURE           BIT(2)
 262 #define PB_STATUS_VIN_UV                BIT(3)
 263 #define PB_STATUS_IOUT_OC               BIT(4)
 264 #define PB_STATUS_VOUT_OV               BIT(5)
 265 #define PB_STATUS_OFF                   BIT(6)
 266 #define PB_STATUS_BUSY                  BIT(7)
 267 
 268 /*
 269  * STATUS_WORD (upper)
 270  */
 271 #define PB_STATUS_UNKNOWN               BIT(8)
 272 #define PB_STATUS_OTHER                 BIT(9)
 273 #define PB_STATUS_FANS                  BIT(10)
 274 #define PB_STATUS_POWER_GOOD_N          BIT(11)
 275 #define PB_STATUS_WORD_MFR              BIT(12)
 276 #define PB_STATUS_INPUT                 BIT(13)
 277 #define PB_STATUS_IOUT_POUT             BIT(14)
 278 #define PB_STATUS_VOUT                  BIT(15)
 279 
 280 /*
 281  * STATUS_IOUT
 282  */
 283 #define PB_POUT_OP_WARNING              BIT(0)
 284 #define PB_POUT_OP_FAULT                BIT(1)
 285 #define PB_POWER_LIMITING               BIT(2)
 286 #define PB_CURRENT_SHARE_FAULT          BIT(3)
 287 #define PB_IOUT_UC_FAULT                BIT(4)
 288 #define PB_IOUT_OC_WARNING              BIT(5)
 289 #define PB_IOUT_OC_LV_FAULT             BIT(6)
 290 #define PB_IOUT_OC_FAULT                BIT(7)
 291 
 292 /*
 293  * STATUS_VOUT, STATUS_INPUT
 294  */
 295 #define PB_VOLTAGE_UV_FAULT             BIT(4)
 296 #define PB_VOLTAGE_UV_WARNING           BIT(5)
 297 #define PB_VOLTAGE_OV_WARNING           BIT(6)
 298 #define PB_VOLTAGE_OV_FAULT             BIT(7)
 299 
 300 /*
 301  * STATUS_INPUT
 302  */
 303 #define PB_PIN_OP_WARNING               BIT(0)
 304 #define PB_IIN_OC_WARNING               BIT(1)
 305 #define PB_IIN_OC_FAULT                 BIT(2)
 306 
 307 /*
 308  * STATUS_TEMPERATURE
 309  */
 310 #define PB_TEMP_UT_FAULT                BIT(4)
 311 #define PB_TEMP_UT_WARNING              BIT(5)
 312 #define PB_TEMP_OT_WARNING              BIT(6)
 313 #define PB_TEMP_OT_FAULT                BIT(7)
 314 
 315 /*
 316  * STATUS_FAN
 317  */
 318 #define PB_FAN_AIRFLOW_WARNING          BIT(0)
 319 #define PB_FAN_AIRFLOW_FAULT            BIT(1)
 320 #define PB_FAN_FAN2_SPEED_OVERRIDE      BIT(2)
 321 #define PB_FAN_FAN1_SPEED_OVERRIDE      BIT(3)
 322 #define PB_FAN_FAN2_WARNING             BIT(4)
 323 #define PB_FAN_FAN1_WARNING             BIT(5)
 324 #define PB_FAN_FAN2_FAULT               BIT(6)
 325 #define PB_FAN_FAN1_FAULT               BIT(7)
 326 
 327 /*
 328  * CML_FAULT_STATUS
 329  */
 330 #define PB_CML_FAULT_OTHER_MEM_LOGIC    BIT(0)
 331 #define PB_CML_FAULT_OTHER_COMM         BIT(1)
 332 #define PB_CML_FAULT_PROCESSOR          BIT(3)
 333 #define PB_CML_FAULT_MEMORY             BIT(4)
 334 #define PB_CML_FAULT_PACKET_ERROR       BIT(5)
 335 #define PB_CML_FAULT_INVALID_DATA       BIT(6)
 336 #define PB_CML_FAULT_INVALID_COMMAND    BIT(7)
 337 
 338 enum pmbus_sensor_classes {
 339         PSC_VOLTAGE_IN = 0,
 340         PSC_VOLTAGE_OUT,
 341         PSC_CURRENT_IN,
 342         PSC_CURRENT_OUT,
 343         PSC_POWER,
 344         PSC_TEMPERATURE,
 345         PSC_FAN,
 346         PSC_PWM,
 347         PSC_NUM_CLASSES         /* Number of power sensor classes */
 348 };
 349 
 350 #define PMBUS_PAGES     32      /* Per PMBus specification */
 351 
 352 /* Functionality bit mask */
 353 #define PMBUS_HAVE_VIN          BIT(0)
 354 #define PMBUS_HAVE_VCAP         BIT(1)
 355 #define PMBUS_HAVE_VOUT         BIT(2)
 356 #define PMBUS_HAVE_IIN          BIT(3)
 357 #define PMBUS_HAVE_IOUT         BIT(4)
 358 #define PMBUS_HAVE_PIN          BIT(5)
 359 #define PMBUS_HAVE_POUT         BIT(6)
 360 #define PMBUS_HAVE_FAN12        BIT(7)
 361 #define PMBUS_HAVE_FAN34        BIT(8)
 362 #define PMBUS_HAVE_TEMP         BIT(9)
 363 #define PMBUS_HAVE_TEMP2        BIT(10)
 364 #define PMBUS_HAVE_TEMP3        BIT(11)
 365 #define PMBUS_HAVE_STATUS_VOUT  BIT(12)
 366 #define PMBUS_HAVE_STATUS_IOUT  BIT(13)
 367 #define PMBUS_HAVE_STATUS_INPUT BIT(14)
 368 #define PMBUS_HAVE_STATUS_TEMP  BIT(15)
 369 #define PMBUS_HAVE_STATUS_FAN12 BIT(16)
 370 #define PMBUS_HAVE_STATUS_FAN34 BIT(17)
 371 #define PMBUS_HAVE_VMON         BIT(18)
 372 #define PMBUS_HAVE_STATUS_VMON  BIT(19)
 373 #define PMBUS_HAVE_PWM12        BIT(20)
 374 #define PMBUS_HAVE_PWM34        BIT(21)
 375 #define PMBUS_HAVE_SAMPLES      BIT(22)
 376 
 377 #define PMBUS_PAGE_VIRTUAL      BIT(31)
 378 
 379 enum pmbus_data_format { linear = 0, direct, vid };
 380 enum vrm_version { vr11 = 0, vr12, vr13 };
 381 
 382 struct pmbus_driver_info {
 383         int pages;              /* Total number of pages */
 384         enum pmbus_data_format format[PSC_NUM_CLASSES];
 385         enum vrm_version vrm_version;
 386         /*
 387          * Support one set of coefficients for each sensor type
 388          * Used for chips providing data in direct mode.
 389          */
 390         int m[PSC_NUM_CLASSES]; /* mantissa for direct data format */
 391         int b[PSC_NUM_CLASSES]; /* offset */
 392         int R[PSC_NUM_CLASSES]; /* exponent */
 393 
 394         u32 func[PMBUS_PAGES];  /* Functionality, per page */
 395         /*
 396          * The following functions map manufacturing specific register values
 397          * to PMBus standard register values. Specify only if mapping is
 398          * necessary.
 399          * Functions return the register value (read) or zero (write) if
 400          * successful. A return value of -ENODATA indicates that there is no
 401          * manufacturer specific register, but that a standard PMBus register
 402          * may exist. Any other negative return value indicates that the
 403          * register does not exist, and that no attempt should be made to read
 404          * the standard register.
 405          */
 406         int (*read_byte_data)(struct i2c_client *client, int page, int reg);
 407         int (*read_word_data)(struct i2c_client *client, int page, int reg);
 408         int (*write_word_data)(struct i2c_client *client, int page, int reg,
 409                                u16 word);
 410         int (*write_byte)(struct i2c_client *client, int page, u8 value);
 411         /*
 412          * The identify function determines supported PMBus functionality.
 413          * This function is only necessary if a chip driver supports multiple
 414          * chips, and the chip functionality is not pre-determined.
 415          */
 416         int (*identify)(struct i2c_client *client,
 417                         struct pmbus_driver_info *info);
 418 
 419         /* Regulator functionality, if supported by this chip driver. */
 420         int num_regulators;
 421         const struct regulator_desc *reg_desc;
 422 
 423         /* custom attributes */
 424         const struct attribute_group **groups;
 425 };
 426 
 427 /* Regulator ops */
 428 
 429 extern const struct regulator_ops pmbus_regulator_ops;
 430 
 431 /* Macro for filling in array of struct regulator_desc */
 432 #define PMBUS_REGULATOR(_name, _id)                             \
 433         [_id] = {                                               \
 434                 .name = (_name # _id),                          \
 435                 .id = (_id),                                    \
 436                 .of_match = of_match_ptr(_name # _id),          \
 437                 .regulators_node = of_match_ptr("regulators"),  \
 438                 .ops = &pmbus_regulator_ops,                    \
 439                 .type = REGULATOR_VOLTAGE,                      \
 440                 .owner = THIS_MODULE,                           \
 441         }
 442 
 443 /* Function declarations */
 444 
 445 void pmbus_clear_cache(struct i2c_client *client);
 446 int pmbus_set_page(struct i2c_client *client, int page);
 447 int pmbus_read_word_data(struct i2c_client *client, int page, u8 reg);
 448 int pmbus_write_word_data(struct i2c_client *client, int page, u8 reg, u16 word);
 449 int pmbus_read_byte_data(struct i2c_client *client, int page, u8 reg);
 450 int pmbus_write_byte(struct i2c_client *client, int page, u8 value);
 451 int pmbus_write_byte_data(struct i2c_client *client, int page, u8 reg,
 452                           u8 value);
 453 int pmbus_update_byte_data(struct i2c_client *client, int page, u8 reg,
 454                            u8 mask, u8 value);
 455 void pmbus_clear_faults(struct i2c_client *client);
 456 bool pmbus_check_byte_register(struct i2c_client *client, int page, int reg);
 457 bool pmbus_check_word_register(struct i2c_client *client, int page, int reg);
 458 int pmbus_do_probe(struct i2c_client *client, const struct i2c_device_id *id,
 459                    struct pmbus_driver_info *info);
 460 int pmbus_do_remove(struct i2c_client *client);
 461 const struct pmbus_driver_info *pmbus_get_driver_info(struct i2c_client
 462                                                       *client);
 463 int pmbus_get_fan_rate_device(struct i2c_client *client, int page, int id,
 464                               enum pmbus_fan_mode mode);
 465 int pmbus_get_fan_rate_cached(struct i2c_client *client, int page, int id,
 466                               enum pmbus_fan_mode mode);
 467 int pmbus_update_fan(struct i2c_client *client, int page, int id,
 468                      u8 config, u8 mask, u16 command);
 469 struct dentry *pmbus_get_debugfs_dir(struct i2c_client *client);
 470 
 471 #endif /* PMBUS_H */
/* [<][>][^][v][top][bottom][index][help] */
root/drivers/hwmon/pmbus/pmbus.h

INCLUDED FROM
