root/drivers/hwmon/dme1737.c

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DEFINITIONS

This source file includes following definitions.
  1. IN_FROM_REG
  2. IN_TO_REG
  3. TEMP_FROM_REG
  4. TEMP_TO_REG
  5. TEMP_RANGE_FROM_REG
  6. TEMP_RANGE_TO_REG
  7. TEMP_HYST_FROM_REG
  8. TEMP_HYST_TO_REG
  9. FAN_FROM_REG
  10. FAN_TO_REG
  11. FAN_TPC_FROM_REG
  12. FAN_TYPE_FROM_REG
  13. FAN_TYPE_TO_REG
  14. FAN_MAX_FROM_REG
  15. FAN_MAX_TO_REG
  16. PWM_EN_FROM_REG
  17. PWM_EN_TO_REG
  18. PWM_ACZ_FROM_REG
  19. PWM_ACZ_TO_REG
  20. PWM_FREQ_FROM_REG
  21. PWM_FREQ_TO_REG
  22. PWM_RR_FROM_REG
  23. PWM_RR_TO_REG
  24. PWM_RR_EN_FROM_REG
  25. PWM_RR_EN_TO_REG
  26. PWM_OFF_FROM_REG
  27. PWM_OFF_TO_REG
  28. dme1737_read
  29. dme1737_write
  30. dme1737_update_device
  31. show_in
  32. set_in
  33. show_temp
  34. set_temp
  35. show_zone
  36. set_zone
  37. show_fan
  38. set_fan
  39. show_pwm
  40. set_pwm
  41. vrm_show
  42. vrm_store
  43. cpu0_vid_show
  44. name_show
  45. dme1737_sio_enter
  46. dme1737_sio_exit
  47. dme1737_sio_inb
  48. dme1737_sio_outb
  49. dme1737_chmod_file
  50. dme1737_chmod_group
  51. dme1737_remove_files
  52. dme1737_create_files
  53. dme1737_init_device
  54. dme1737_i2c_get_features
  55. dme1737_i2c_detect
  56. dme1737_i2c_probe
  57. dme1737_i2c_remove
  58. dme1737_isa_detect
  59. dme1737_isa_device_add
  60. dme1737_isa_probe
  61. dme1737_isa_remove
  62. dme1737_init
  63. dme1737_exit

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * dme1737.c - Driver for the SMSC DME1737, Asus A8000, SMSC SCH311x, SCH5027,
   4  *             and SCH5127 Super-I/O chips integrated hardware monitoring
   5  *             features.
   6  * Copyright (c) 2007, 2008, 2009, 2010 Juerg Haefliger <juergh@gmail.com>
   7  *
   8  * This driver is an I2C/ISA hybrid, meaning that it uses the I2C bus to access
   9  * the chip registers if a DME1737, A8000, or SCH5027 is found and the ISA bus
  10  * if a SCH311x or SCH5127 chip is found. Both types of chips have very
  11  * similar hardware monitoring capabilities but differ in the way they can be
  12  * accessed.
  13  */
  14 
  15 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  16 
  17 #include <linux/module.h>
  18 #include <linux/init.h>
  19 #include <linux/slab.h>
  20 #include <linux/jiffies.h>
  21 #include <linux/i2c.h>
  22 #include <linux/platform_device.h>
  23 #include <linux/hwmon.h>
  24 #include <linux/hwmon-sysfs.h>
  25 #include <linux/hwmon-vid.h>
  26 #include <linux/err.h>
  27 #include <linux/mutex.h>
  28 #include <linux/acpi.h>
  29 #include <linux/io.h>
  30 
  31 /* ISA device, if found */
  32 static struct platform_device *pdev;
  33 
  34 /* Module load parameters */
  35 static bool force_start;
  36 module_param(force_start, bool, 0);
  37 MODULE_PARM_DESC(force_start, "Force the chip to start monitoring inputs");
  38 
  39 static unsigned short force_id;
  40 module_param(force_id, ushort, 0);
  41 MODULE_PARM_DESC(force_id, "Override the detected device ID");
  42 
  43 static bool probe_all_addr;
  44 module_param(probe_all_addr, bool, 0);
  45 MODULE_PARM_DESC(probe_all_addr,
  46                  "Include probing of non-standard LPC addresses");
  47 
  48 /* Addresses to scan */
  49 static const unsigned short normal_i2c[] = {0x2c, 0x2d, 0x2e, I2C_CLIENT_END};
  50 
  51 enum chips { dme1737, sch5027, sch311x, sch5127 };
  52 
  53 #define DO_REPORT "Please report to the driver maintainer."
  54 
  55 /* ---------------------------------------------------------------------
  56  * Registers
  57  *
  58  * The sensors are defined as follows:
  59  *
  60  * Voltages                          Temperatures
  61  * --------                          ------------
  62  * in0   +5VTR (+5V stdby)           temp1   Remote diode 1
  63  * in1   Vccp  (proc core)           temp2   Internal temp
  64  * in2   VCC   (internal +3.3V)      temp3   Remote diode 2
  65  * in3   +5V
  66  * in4   +12V
  67  * in5   VTR   (+3.3V stby)
  68  * in6   Vbat
  69  * in7   Vtrip (sch5127 only)
  70  *
  71  * --------------------------------------------------------------------- */
  72 
  73 /* Voltages (in) numbered 0-7 (ix) */
  74 #define DME1737_REG_IN(ix)              ((ix) < 5 ? 0x20 + (ix) : \
  75                                          (ix) < 7 ? 0x94 + (ix) : \
  76                                                     0x1f)
  77 #define DME1737_REG_IN_MIN(ix)          ((ix) < 5 ? 0x44 + (ix) * 2 \
  78                                                   : 0x91 + (ix) * 2)
  79 #define DME1737_REG_IN_MAX(ix)          ((ix) < 5 ? 0x45 + (ix) * 2 \
  80                                                   : 0x92 + (ix) * 2)
  81 
  82 /* Temperatures (temp) numbered 0-2 (ix) */
  83 #define DME1737_REG_TEMP(ix)            (0x25 + (ix))
  84 #define DME1737_REG_TEMP_MIN(ix)        (0x4e + (ix) * 2)
  85 #define DME1737_REG_TEMP_MAX(ix)        (0x4f + (ix) * 2)
  86 #define DME1737_REG_TEMP_OFFSET(ix)     ((ix) == 0 ? 0x1f \
  87                                                    : 0x1c + (ix))
  88 
  89 /*
  90  * Voltage and temperature LSBs
  91  * The LSBs (4 bits each) are stored in 5 registers with the following layouts:
  92  *    IN_TEMP_LSB(0) = [in5, in6]
  93  *    IN_TEMP_LSB(1) = [temp3, temp1]
  94  *    IN_TEMP_LSB(2) = [in4, temp2]
  95  *    IN_TEMP_LSB(3) = [in3, in0]
  96  *    IN_TEMP_LSB(4) = [in2, in1]
  97  *    IN_TEMP_LSB(5) = [res, in7]
  98  */
  99 #define DME1737_REG_IN_TEMP_LSB(ix)     (0x84 + (ix))
 100 static const u8 DME1737_REG_IN_LSB[] = {3, 4, 4, 3, 2, 0, 0, 5};
 101 static const u8 DME1737_REG_IN_LSB_SHL[] = {4, 4, 0, 0, 0, 0, 4, 4};
 102 static const u8 DME1737_REG_TEMP_LSB[] = {1, 2, 1};
 103 static const u8 DME1737_REG_TEMP_LSB_SHL[] = {4, 4, 0};
 104 
 105 /* Fans numbered 0-5 (ix) */
 106 #define DME1737_REG_FAN(ix)             ((ix) < 4 ? 0x28 + (ix) * 2 \
 107                                                   : 0xa1 + (ix) * 2)
 108 #define DME1737_REG_FAN_MIN(ix)         ((ix) < 4 ? 0x54 + (ix) * 2 \
 109                                                   : 0xa5 + (ix) * 2)
 110 #define DME1737_REG_FAN_OPT(ix)         ((ix) < 4 ? 0x90 + (ix) \
 111                                                   : 0xb2 + (ix))
 112 #define DME1737_REG_FAN_MAX(ix)         (0xb4 + (ix)) /* only for fan[4-5] */
 113 
 114 /* PWMs numbered 0-2, 4-5 (ix) */
 115 #define DME1737_REG_PWM(ix)             ((ix) < 3 ? 0x30 + (ix) \
 116                                                   : 0xa1 + (ix))
 117 #define DME1737_REG_PWM_CONFIG(ix)      (0x5c + (ix)) /* only for pwm[0-2] */
 118 #define DME1737_REG_PWM_MIN(ix)         (0x64 + (ix)) /* only for pwm[0-2] */
 119 #define DME1737_REG_PWM_FREQ(ix)        ((ix) < 3 ? 0x5f + (ix) \
 120                                                   : 0xa3 + (ix))
 121 /*
 122  * The layout of the ramp rate registers is different from the other pwm
 123  * registers. The bits for the 3 PWMs are stored in 2 registers:
 124  *    PWM_RR(0) = [OFF3, OFF2,  OFF1,  RES,   RR1E, RR1-2, RR1-1, RR1-0]
 125  *    PWM_RR(1) = [RR2E, RR2-2, RR2-1, RR2-0, RR3E, RR3-2, RR3-1, RR3-0]
 126  */
 127 #define DME1737_REG_PWM_RR(ix)          (0x62 + (ix)) /* only for pwm[0-2] */
 128 
 129 /* Thermal zones 0-2 */
 130 #define DME1737_REG_ZONE_LOW(ix)        (0x67 + (ix))
 131 #define DME1737_REG_ZONE_ABS(ix)        (0x6a + (ix))
 132 /*
 133  * The layout of the hysteresis registers is different from the other zone
 134  * registers. The bits for the 3 zones are stored in 2 registers:
 135  *    ZONE_HYST(0) = [H1-3,  H1-2,  H1-1, H1-0, H2-3, H2-2, H2-1, H2-0]
 136  *    ZONE_HYST(1) = [H3-3,  H3-2,  H3-1, H3-0, RES,  RES,  RES,  RES]
 137  */
 138 #define DME1737_REG_ZONE_HYST(ix)       (0x6d + (ix))
 139 
 140 /*
 141  * Alarm registers and bit mapping
 142  * The 3 8-bit alarm registers will be concatenated to a single 32-bit
 143  * alarm value [0, ALARM3, ALARM2, ALARM1].
 144  */
 145 #define DME1737_REG_ALARM1              0x41
 146 #define DME1737_REG_ALARM2              0x42
 147 #define DME1737_REG_ALARM3              0x83
 148 static const u8 DME1737_BIT_ALARM_IN[] = {0, 1, 2, 3, 8, 16, 17, 18};
 149 static const u8 DME1737_BIT_ALARM_TEMP[] = {4, 5, 6};
 150 static const u8 DME1737_BIT_ALARM_FAN[] = {10, 11, 12, 13, 22, 23};
 151 
 152 /* Miscellaneous registers */
 153 #define DME1737_REG_DEVICE              0x3d
 154 #define DME1737_REG_COMPANY             0x3e
 155 #define DME1737_REG_VERSTEP             0x3f
 156 #define DME1737_REG_CONFIG              0x40
 157 #define DME1737_REG_CONFIG2             0x7f
 158 #define DME1737_REG_VID                 0x43
 159 #define DME1737_REG_TACH_PWM            0x81
 160 
 161 /* ---------------------------------------------------------------------
 162  * Misc defines
 163  * --------------------------------------------------------------------- */
 164 
 165 /* Chip identification */
 166 #define DME1737_COMPANY_SMSC    0x5c
 167 #define DME1737_VERSTEP         0x88
 168 #define DME1737_VERSTEP_MASK    0xf8
 169 #define SCH311X_DEVICE          0x8c
 170 #define SCH5027_VERSTEP         0x69
 171 #define SCH5127_DEVICE          0x8e
 172 
 173 /* Device ID values (global configuration register index 0x20) */
 174 #define DME1737_ID_1    0x77
 175 #define DME1737_ID_2    0x78
 176 #define SCH3112_ID      0x7c
 177 #define SCH3114_ID      0x7d
 178 #define SCH3116_ID      0x7f
 179 #define SCH5027_ID      0x89
 180 #define SCH5127_ID      0x86
 181 
 182 /* Length of ISA address segment */
 183 #define DME1737_EXTENT  2
 184 
 185 /* chip-dependent features */
 186 #define HAS_TEMP_OFFSET         (1 << 0)                /* bit 0 */
 187 #define HAS_VID                 (1 << 1)                /* bit 1 */
 188 #define HAS_ZONE3               (1 << 2)                /* bit 2 */
 189 #define HAS_ZONE_HYST           (1 << 3)                /* bit 3 */
 190 #define HAS_PWM_MIN             (1 << 4)                /* bit 4 */
 191 #define HAS_FAN(ix)             (1 << ((ix) + 5))       /* bits 5-10 */
 192 #define HAS_PWM(ix)             (1 << ((ix) + 11))      /* bits 11-16 */
 193 #define HAS_IN7                 (1 << 17)               /* bit 17 */
 194 
 195 /* ---------------------------------------------------------------------
 196  * Data structures and manipulation thereof
 197  * --------------------------------------------------------------------- */
 198 
 199 struct dme1737_data {
 200         struct i2c_client *client;      /* for I2C devices only */
 201         struct device *hwmon_dev;
 202         const char *name;
 203         unsigned int addr;              /* for ISA devices only */
 204 
 205         struct mutex update_lock;
 206         int valid;                      /* !=0 if following fields are valid */
 207         unsigned long last_update;      /* in jiffies */
 208         unsigned long last_vbat;        /* in jiffies */
 209         enum chips type;
 210         const int *in_nominal;          /* pointer to IN_NOMINAL array */
 211 
 212         u8 vid;
 213         u8 pwm_rr_en;
 214         u32 has_features;
 215 
 216         /* Register values */
 217         u16 in[8];
 218         u8  in_min[8];
 219         u8  in_max[8];
 220         s16 temp[3];
 221         s8  temp_min[3];
 222         s8  temp_max[3];
 223         s8  temp_offset[3];
 224         u8  config;
 225         u8  config2;
 226         u8  vrm;
 227         u16 fan[6];
 228         u16 fan_min[6];
 229         u8  fan_max[2];
 230         u8  fan_opt[6];
 231         u8  pwm[6];
 232         u8  pwm_min[3];
 233         u8  pwm_config[3];
 234         u8  pwm_acz[3];
 235         u8  pwm_freq[6];
 236         u8  pwm_rr[2];
 237         s8  zone_low[3];
 238         s8  zone_abs[3];
 239         u8  zone_hyst[2];
 240         u32 alarms;
 241 };
 242 
 243 /* Nominal voltage values */
 244 static const int IN_NOMINAL_DME1737[] = {5000, 2250, 3300, 5000, 12000, 3300,
 245                                          3300};
 246 static const int IN_NOMINAL_SCH311x[] = {2500, 1500, 3300, 5000, 12000, 3300,
 247                                          3300};
 248 static const int IN_NOMINAL_SCH5027[] = {5000, 2250, 3300, 1125, 1125, 3300,
 249                                          3300};
 250 static const int IN_NOMINAL_SCH5127[] = {2500, 2250, 3300, 1125, 1125, 3300,
 251                                          3300, 1500};
 252 #define IN_NOMINAL(type)        ((type) == sch311x ? IN_NOMINAL_SCH311x : \
 253                                  (type) == sch5027 ? IN_NOMINAL_SCH5027 : \
 254                                  (type) == sch5127 ? IN_NOMINAL_SCH5127 : \
 255                                  IN_NOMINAL_DME1737)
 256 
 257 /*
 258  * Voltage input
 259  * Voltage inputs have 16 bits resolution, limit values have 8 bits
 260  * resolution.
 261  */
 262 static inline int IN_FROM_REG(int reg, int nominal, int res)
 263 {
 264         return (reg * nominal + (3 << (res - 3))) / (3 << (res - 2));
 265 }
 266 
 267 static inline int IN_TO_REG(long val, int nominal)
 268 {
 269         val = clamp_val(val, 0, 255 * nominal / 192);
 270         return DIV_ROUND_CLOSEST(val * 192, nominal);
 271 }
 272 
 273 /*
 274  * Temperature input
 275  * The register values represent temperatures in 2's complement notation from
 276  * -127 degrees C to +127 degrees C. Temp inputs have 16 bits resolution, limit
 277  * values have 8 bits resolution.
 278  */
 279 static inline int TEMP_FROM_REG(int reg, int res)
 280 {
 281         return (reg * 1000) >> (res - 8);
 282 }
 283 
 284 static inline int TEMP_TO_REG(long val)
 285 {
 286         val = clamp_val(val, -128000, 127000);
 287         return DIV_ROUND_CLOSEST(val, 1000);
 288 }
 289 
 290 /* Temperature range */
 291 static const int TEMP_RANGE[] = {2000, 2500, 3333, 4000, 5000, 6666, 8000,
 292                                  10000, 13333, 16000, 20000, 26666, 32000,
 293                                  40000, 53333, 80000};
 294 
 295 static inline int TEMP_RANGE_FROM_REG(int reg)
 296 {
 297         return TEMP_RANGE[(reg >> 4) & 0x0f];
 298 }
 299 
 300 static int TEMP_RANGE_TO_REG(long val, int reg)
 301 {
 302         int i;
 303 
 304         for (i = 15; i > 0; i--) {
 305                 if (val > (TEMP_RANGE[i] + TEMP_RANGE[i - 1] + 1) / 2)
 306                         break;
 307         }
 308 
 309         return (reg & 0x0f) | (i << 4);
 310 }
 311 
 312 /*
 313  * Temperature hysteresis
 314  * Register layout:
 315  *    reg[0] = [H1-3, H1-2, H1-1, H1-0, H2-3, H2-2, H2-1, H2-0]
 316  *    reg[1] = [H3-3, H3-2, H3-1, H3-0, xxxx, xxxx, xxxx, xxxx]
 317  */
 318 static inline int TEMP_HYST_FROM_REG(int reg, int ix)
 319 {
 320         return (((ix == 1) ? reg : reg >> 4) & 0x0f) * 1000;
 321 }
 322 
 323 static inline int TEMP_HYST_TO_REG(int temp, long hyst, int ix, int reg)
 324 {
 325         hyst = clamp_val(hyst, temp - 15000, temp);
 326         hyst = DIV_ROUND_CLOSEST(temp - hyst, 1000);
 327 
 328         return (ix == 1) ? (reg & 0xf0) | hyst : (reg & 0x0f) | (hyst << 4);
 329 }
 330 
 331 /* Fan input RPM */
 332 static inline int FAN_FROM_REG(int reg, int tpc)
 333 {
 334         if (tpc)
 335                 return tpc * reg;
 336         else
 337                 return (reg == 0 || reg == 0xffff) ? 0 : 90000 * 60 / reg;
 338 }
 339 
 340 static inline int FAN_TO_REG(long val, int tpc)
 341 {
 342         if (tpc) {
 343                 return clamp_val(val / tpc, 0, 0xffff);
 344         } else {
 345                 return (val <= 0) ? 0xffff :
 346                         clamp_val(90000 * 60 / val, 0, 0xfffe);
 347         }
 348 }
 349 
 350 /*
 351  * Fan TPC (tach pulse count)
 352  * Converts a register value to a TPC multiplier or returns 0 if the tachometer
 353  * is configured in legacy (non-tpc) mode
 354  */
 355 static inline int FAN_TPC_FROM_REG(int reg)
 356 {
 357         return (reg & 0x20) ? 0 : 60 >> (reg & 0x03);
 358 }
 359 
 360 /*
 361  * Fan type
 362  * The type of a fan is expressed in number of pulses-per-revolution that it
 363  * emits
 364  */
 365 static inline int FAN_TYPE_FROM_REG(int reg)
 366 {
 367         int edge = (reg >> 1) & 0x03;
 368 
 369         return (edge > 0) ? 1 << (edge - 1) : 0;
 370 }
 371 
 372 static inline int FAN_TYPE_TO_REG(long val, int reg)
 373 {
 374         int edge = (val == 4) ? 3 : val;
 375 
 376         return (reg & 0xf9) | (edge << 1);
 377 }
 378 
 379 /* Fan max RPM */
 380 static const int FAN_MAX[] = {0x54, 0x38, 0x2a, 0x21, 0x1c, 0x18, 0x15, 0x12,
 381                               0x11, 0x0f, 0x0e};
 382 
 383 static int FAN_MAX_FROM_REG(int reg)
 384 {
 385         int i;
 386 
 387         for (i = 10; i > 0; i--) {
 388                 if (reg == FAN_MAX[i])
 389                         break;
 390         }
 391 
 392         return 1000 + i * 500;
 393 }
 394 
 395 static int FAN_MAX_TO_REG(long val)
 396 {
 397         int i;
 398 
 399         for (i = 10; i > 0; i--) {
 400                 if (val > (1000 + (i - 1) * 500))
 401                         break;
 402         }
 403 
 404         return FAN_MAX[i];
 405 }
 406 
 407 /*
 408  * PWM enable
 409  * Register to enable mapping:
 410  * 000:  2  fan on zone 1 auto
 411  * 001:  2  fan on zone 2 auto
 412  * 010:  2  fan on zone 3 auto
 413  * 011:  0  fan full on
 414  * 100: -1  fan disabled
 415  * 101:  2  fan on hottest of zones 2,3 auto
 416  * 110:  2  fan on hottest of zones 1,2,3 auto
 417  * 111:  1  fan in manual mode
 418  */
 419 static inline int PWM_EN_FROM_REG(int reg)
 420 {
 421         static const int en[] = {2, 2, 2, 0, -1, 2, 2, 1};
 422 
 423         return en[(reg >> 5) & 0x07];
 424 }
 425 
 426 static inline int PWM_EN_TO_REG(int val, int reg)
 427 {
 428         int en = (val == 1) ? 7 : 3;
 429 
 430         return (reg & 0x1f) | ((en & 0x07) << 5);
 431 }
 432 
 433 /*
 434  * PWM auto channels zone
 435  * Register to auto channels zone mapping (ACZ is a bitfield with bit x
 436  * corresponding to zone x+1):
 437  * 000: 001  fan on zone 1 auto
 438  * 001: 010  fan on zone 2 auto
 439  * 010: 100  fan on zone 3 auto
 440  * 011: 000  fan full on
 441  * 100: 000  fan disabled
 442  * 101: 110  fan on hottest of zones 2,3 auto
 443  * 110: 111  fan on hottest of zones 1,2,3 auto
 444  * 111: 000  fan in manual mode
 445  */
 446 static inline int PWM_ACZ_FROM_REG(int reg)
 447 {
 448         static const int acz[] = {1, 2, 4, 0, 0, 6, 7, 0};
 449 
 450         return acz[(reg >> 5) & 0x07];
 451 }
 452 
 453 static inline int PWM_ACZ_TO_REG(long val, int reg)
 454 {
 455         int acz = (val == 4) ? 2 : val - 1;
 456 
 457         return (reg & 0x1f) | ((acz & 0x07) << 5);
 458 }
 459 
 460 /* PWM frequency */
 461 static const int PWM_FREQ[] = {11, 15, 22, 29, 35, 44, 59, 88,
 462                                15000, 20000, 30000, 25000, 0, 0, 0, 0};
 463 
 464 static inline int PWM_FREQ_FROM_REG(int reg)
 465 {
 466         return PWM_FREQ[reg & 0x0f];
 467 }
 468 
 469 static int PWM_FREQ_TO_REG(long val, int reg)
 470 {
 471         int i;
 472 
 473         /* the first two cases are special - stupid chip design! */
 474         if (val > 27500) {
 475                 i = 10;
 476         } else if (val > 22500) {
 477                 i = 11;
 478         } else {
 479                 for (i = 9; i > 0; i--) {
 480                         if (val > (PWM_FREQ[i] + PWM_FREQ[i - 1] + 1) / 2)
 481                                 break;
 482                 }
 483         }
 484 
 485         return (reg & 0xf0) | i;
 486 }
 487 
 488 /*
 489  * PWM ramp rate
 490  * Register layout:
 491  *    reg[0] = [OFF3,  OFF2,  OFF1,  RES,   RR1-E, RR1-2, RR1-1, RR1-0]
 492  *    reg[1] = [RR2-E, RR2-2, RR2-1, RR2-0, RR3-E, RR3-2, RR3-1, RR3-0]
 493  */
 494 static const u8 PWM_RR[] = {206, 104, 69, 41, 26, 18, 10, 5};
 495 
 496 static inline int PWM_RR_FROM_REG(int reg, int ix)
 497 {
 498         int rr = (ix == 1) ? reg >> 4 : reg;
 499 
 500         return (rr & 0x08) ? PWM_RR[rr & 0x07] : 0;
 501 }
 502 
 503 static int PWM_RR_TO_REG(long val, int ix, int reg)
 504 {
 505         int i;
 506 
 507         for (i = 0; i < 7; i++) {
 508                 if (val > (PWM_RR[i] + PWM_RR[i + 1] + 1) / 2)
 509                         break;
 510         }
 511 
 512         return (ix == 1) ? (reg & 0x8f) | (i << 4) : (reg & 0xf8) | i;
 513 }
 514 
 515 /* PWM ramp rate enable */
 516 static inline int PWM_RR_EN_FROM_REG(int reg, int ix)
 517 {
 518         return PWM_RR_FROM_REG(reg, ix) ? 1 : 0;
 519 }
 520 
 521 static inline int PWM_RR_EN_TO_REG(long val, int ix, int reg)
 522 {
 523         int en = (ix == 1) ? 0x80 : 0x08;
 524 
 525         return val ? reg | en : reg & ~en;
 526 }
 527 
 528 /*
 529  * PWM min/off
 530  * The PWM min/off bits are part of the PMW ramp rate register 0 (see above for
 531  * the register layout).
 532  */
 533 static inline int PWM_OFF_FROM_REG(int reg, int ix)
 534 {
 535         return (reg >> (ix + 5)) & 0x01;
 536 }
 537 
 538 static inline int PWM_OFF_TO_REG(int val, int ix, int reg)
 539 {
 540         return (reg & ~(1 << (ix + 5))) | ((val & 0x01) << (ix + 5));
 541 }
 542 
 543 /* ---------------------------------------------------------------------
 544  * Device I/O access
 545  *
 546  * ISA access is performed through an index/data register pair and needs to
 547  * be protected by a mutex during runtime (not required for initialization).
 548  * We use data->update_lock for this and need to ensure that we acquire it
 549  * before calling dme1737_read or dme1737_write.
 550  * --------------------------------------------------------------------- */
 551 
 552 static u8 dme1737_read(const struct dme1737_data *data, u8 reg)
 553 {
 554         struct i2c_client *client = data->client;
 555         s32 val;
 556 
 557         if (client) { /* I2C device */
 558                 val = i2c_smbus_read_byte_data(client, reg);
 559 
 560                 if (val < 0) {
 561                         dev_warn(&client->dev,
 562                                  "Read from register 0x%02x failed! %s\n",
 563                                  reg, DO_REPORT);
 564                 }
 565         } else { /* ISA device */
 566                 outb(reg, data->addr);
 567                 val = inb(data->addr + 1);
 568         }
 569 
 570         return val;
 571 }
 572 
 573 static s32 dme1737_write(const struct dme1737_data *data, u8 reg, u8 val)
 574 {
 575         struct i2c_client *client = data->client;
 576         s32 res = 0;
 577 
 578         if (client) { /* I2C device */
 579                 res = i2c_smbus_write_byte_data(client, reg, val);
 580 
 581                 if (res < 0) {
 582                         dev_warn(&client->dev,
 583                                  "Write to register 0x%02x failed! %s\n",
 584                                  reg, DO_REPORT);
 585                 }
 586         } else { /* ISA device */
 587                 outb(reg, data->addr);
 588                 outb(val, data->addr + 1);
 589         }
 590 
 591         return res;
 592 }
 593 
 594 static struct dme1737_data *dme1737_update_device(struct device *dev)
 595 {
 596         struct dme1737_data *data = dev_get_drvdata(dev);
 597         int ix;
 598         u8 lsb[6];
 599 
 600         mutex_lock(&data->update_lock);
 601 
 602         /* Enable a Vbat monitoring cycle every 10 mins */
 603         if (time_after(jiffies, data->last_vbat + 600 * HZ) || !data->valid) {
 604                 dme1737_write(data, DME1737_REG_CONFIG, dme1737_read(data,
 605                                                 DME1737_REG_CONFIG) | 0x10);
 606                 data->last_vbat = jiffies;
 607         }
 608 
 609         /* Sample register contents every 1 sec */
 610         if (time_after(jiffies, data->last_update + HZ) || !data->valid) {
 611                 if (data->has_features & HAS_VID) {
 612                         data->vid = dme1737_read(data, DME1737_REG_VID) &
 613                                 0x3f;
 614                 }
 615 
 616                 /* In (voltage) registers */
 617                 for (ix = 0; ix < ARRAY_SIZE(data->in); ix++) {
 618                         /*
 619                          * Voltage inputs are stored as 16 bit values even
 620                          * though they have only 12 bits resolution. This is
 621                          * to make it consistent with the temp inputs.
 622                          */
 623                         if (ix == 7 && !(data->has_features & HAS_IN7))
 624                                 continue;
 625                         data->in[ix] = dme1737_read(data,
 626                                         DME1737_REG_IN(ix)) << 8;
 627                         data->in_min[ix] = dme1737_read(data,
 628                                         DME1737_REG_IN_MIN(ix));
 629                         data->in_max[ix] = dme1737_read(data,
 630                                         DME1737_REG_IN_MAX(ix));
 631                 }
 632 
 633                 /* Temp registers */
 634                 for (ix = 0; ix < ARRAY_SIZE(data->temp); ix++) {
 635                         /*
 636                          * Temp inputs are stored as 16 bit values even
 637                          * though they have only 12 bits resolution. This is
 638                          * to take advantage of implicit conversions between
 639                          * register values (2's complement) and temp values
 640                          * (signed decimal).
 641                          */
 642                         data->temp[ix] = dme1737_read(data,
 643                                         DME1737_REG_TEMP(ix)) << 8;
 644                         data->temp_min[ix] = dme1737_read(data,
 645                                         DME1737_REG_TEMP_MIN(ix));
 646                         data->temp_max[ix] = dme1737_read(data,
 647                                         DME1737_REG_TEMP_MAX(ix));
 648                         if (data->has_features & HAS_TEMP_OFFSET) {
 649                                 data->temp_offset[ix] = dme1737_read(data,
 650                                                 DME1737_REG_TEMP_OFFSET(ix));
 651                         }
 652                 }
 653 
 654                 /*
 655                  * In and temp LSB registers
 656                  * The LSBs are latched when the MSBs are read, so the order in
 657                  * which the registers are read (MSB first, then LSB) is
 658                  * important!
 659                  */
 660                 for (ix = 0; ix < ARRAY_SIZE(lsb); ix++) {
 661                         if (ix == 5 && !(data->has_features & HAS_IN7))
 662                                 continue;
 663                         lsb[ix] = dme1737_read(data,
 664                                         DME1737_REG_IN_TEMP_LSB(ix));
 665                 }
 666                 for (ix = 0; ix < ARRAY_SIZE(data->in); ix++) {
 667                         if (ix == 7 && !(data->has_features & HAS_IN7))
 668                                 continue;
 669                         data->in[ix] |= (lsb[DME1737_REG_IN_LSB[ix]] <<
 670                                         DME1737_REG_IN_LSB_SHL[ix]) & 0xf0;
 671                 }
 672                 for (ix = 0; ix < ARRAY_SIZE(data->temp); ix++) {
 673                         data->temp[ix] |= (lsb[DME1737_REG_TEMP_LSB[ix]] <<
 674                                         DME1737_REG_TEMP_LSB_SHL[ix]) & 0xf0;
 675                 }
 676 
 677                 /* Fan registers */
 678                 for (ix = 0; ix < ARRAY_SIZE(data->fan); ix++) {
 679                         /*
 680                          * Skip reading registers if optional fans are not
 681                          * present
 682                          */
 683                         if (!(data->has_features & HAS_FAN(ix)))
 684                                 continue;
 685                         data->fan[ix] = dme1737_read(data,
 686                                         DME1737_REG_FAN(ix));
 687                         data->fan[ix] |= dme1737_read(data,
 688                                         DME1737_REG_FAN(ix) + 1) << 8;
 689                         data->fan_min[ix] = dme1737_read(data,
 690                                         DME1737_REG_FAN_MIN(ix));
 691                         data->fan_min[ix] |= dme1737_read(data,
 692                                         DME1737_REG_FAN_MIN(ix) + 1) << 8;
 693                         data->fan_opt[ix] = dme1737_read(data,
 694                                         DME1737_REG_FAN_OPT(ix));
 695                         /* fan_max exists only for fan[5-6] */
 696                         if (ix > 3) {
 697                                 data->fan_max[ix - 4] = dme1737_read(data,
 698                                         DME1737_REG_FAN_MAX(ix));
 699                         }
 700                 }
 701 
 702                 /* PWM registers */
 703                 for (ix = 0; ix < ARRAY_SIZE(data->pwm); ix++) {
 704                         /*
 705                          * Skip reading registers if optional PWMs are not
 706                          * present
 707                          */
 708                         if (!(data->has_features & HAS_PWM(ix)))
 709                                 continue;
 710                         data->pwm[ix] = dme1737_read(data,
 711                                         DME1737_REG_PWM(ix));
 712                         data->pwm_freq[ix] = dme1737_read(data,
 713                                         DME1737_REG_PWM_FREQ(ix));
 714                         /* pwm_config and pwm_min exist only for pwm[1-3] */
 715                         if (ix < 3) {
 716                                 data->pwm_config[ix] = dme1737_read(data,
 717                                                 DME1737_REG_PWM_CONFIG(ix));
 718                                 data->pwm_min[ix] = dme1737_read(data,
 719                                                 DME1737_REG_PWM_MIN(ix));
 720                         }
 721                 }
 722                 for (ix = 0; ix < ARRAY_SIZE(data->pwm_rr); ix++) {
 723                         data->pwm_rr[ix] = dme1737_read(data,
 724                                                 DME1737_REG_PWM_RR(ix));
 725                 }
 726 
 727                 /* Thermal zone registers */
 728                 for (ix = 0; ix < ARRAY_SIZE(data->zone_low); ix++) {
 729                         /* Skip reading registers if zone3 is not present */
 730                         if ((ix == 2) && !(data->has_features & HAS_ZONE3))
 731                                 continue;
 732                         /* sch5127 zone2 registers are special */
 733                         if ((ix == 1) && (data->type == sch5127)) {
 734                                 data->zone_low[1] = dme1737_read(data,
 735                                                 DME1737_REG_ZONE_LOW(2));
 736                                 data->zone_abs[1] = dme1737_read(data,
 737                                                 DME1737_REG_ZONE_ABS(2));
 738                         } else {
 739                                 data->zone_low[ix] = dme1737_read(data,
 740                                                 DME1737_REG_ZONE_LOW(ix));
 741                                 data->zone_abs[ix] = dme1737_read(data,
 742                                                 DME1737_REG_ZONE_ABS(ix));
 743                         }
 744                 }
 745                 if (data->has_features & HAS_ZONE_HYST) {
 746                         for (ix = 0; ix < ARRAY_SIZE(data->zone_hyst); ix++) {
 747                                 data->zone_hyst[ix] = dme1737_read(data,
 748                                                 DME1737_REG_ZONE_HYST(ix));
 749                         }
 750                 }
 751 
 752                 /* Alarm registers */
 753                 data->alarms = dme1737_read(data,
 754                                                 DME1737_REG_ALARM1);
 755                 /*
 756                  * Bit 7 tells us if the other alarm registers are non-zero and
 757                  * therefore also need to be read
 758                  */
 759                 if (data->alarms & 0x80) {
 760                         data->alarms |= dme1737_read(data,
 761                                                 DME1737_REG_ALARM2) << 8;
 762                         data->alarms |= dme1737_read(data,
 763                                                 DME1737_REG_ALARM3) << 16;
 764                 }
 765 
 766                 /*
 767                  * The ISA chips require explicit clearing of alarm bits.
 768                  * Don't worry, an alarm will come back if the condition
 769                  * that causes it still exists
 770                  */
 771                 if (!data->client) {
 772                         if (data->alarms & 0xff0000)
 773                                 dme1737_write(data, DME1737_REG_ALARM3, 0xff);
 774                         if (data->alarms & 0xff00)
 775                                 dme1737_write(data, DME1737_REG_ALARM2, 0xff);
 776                         if (data->alarms & 0xff)
 777                                 dme1737_write(data, DME1737_REG_ALARM1, 0xff);
 778                 }
 779 
 780                 data->last_update = jiffies;
 781                 data->valid = 1;
 782         }
 783 
 784         mutex_unlock(&data->update_lock);
 785 
 786         return data;
 787 }
 788 
 789 /* ---------------------------------------------------------------------
 790  * Voltage sysfs attributes
 791  * ix = [0-7]
 792  * --------------------------------------------------------------------- */
 793 
 794 #define SYS_IN_INPUT    0
 795 #define SYS_IN_MIN      1
 796 #define SYS_IN_MAX      2
 797 #define SYS_IN_ALARM    3
 798 
 799 static ssize_t show_in(struct device *dev, struct device_attribute *attr,
 800                        char *buf)
 801 {
 802         struct dme1737_data *data = dme1737_update_device(dev);
 803         struct sensor_device_attribute_2
 804                 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
 805         int ix = sensor_attr_2->index;
 806         int fn = sensor_attr_2->nr;
 807         int res;
 808 
 809         switch (fn) {
 810         case SYS_IN_INPUT:
 811                 res = IN_FROM_REG(data->in[ix], data->in_nominal[ix], 16);
 812                 break;
 813         case SYS_IN_MIN:
 814                 res = IN_FROM_REG(data->in_min[ix], data->in_nominal[ix], 8);
 815                 break;
 816         case SYS_IN_MAX:
 817                 res = IN_FROM_REG(data->in_max[ix], data->in_nominal[ix], 8);
 818                 break;
 819         case SYS_IN_ALARM:
 820                 res = (data->alarms >> DME1737_BIT_ALARM_IN[ix]) & 0x01;
 821                 break;
 822         default:
 823                 res = 0;
 824                 dev_dbg(dev, "Unknown function %d.\n", fn);
 825         }
 826 
 827         return sprintf(buf, "%d\n", res);
 828 }
 829 
 830 static ssize_t set_in(struct device *dev, struct device_attribute *attr,
 831                       const char *buf, size_t count)
 832 {
 833         struct dme1737_data *data = dev_get_drvdata(dev);
 834         struct sensor_device_attribute_2
 835                 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
 836         int ix = sensor_attr_2->index;
 837         int fn = sensor_attr_2->nr;
 838         long val;
 839         int err;
 840 
 841         err = kstrtol(buf, 10, &val);
 842         if (err)
 843                 return err;
 844 
 845         mutex_lock(&data->update_lock);
 846         switch (fn) {
 847         case SYS_IN_MIN:
 848                 data->in_min[ix] = IN_TO_REG(val, data->in_nominal[ix]);
 849                 dme1737_write(data, DME1737_REG_IN_MIN(ix),
 850                               data->in_min[ix]);
 851                 break;
 852         case SYS_IN_MAX:
 853                 data->in_max[ix] = IN_TO_REG(val, data->in_nominal[ix]);
 854                 dme1737_write(data, DME1737_REG_IN_MAX(ix),
 855                               data->in_max[ix]);
 856                 break;
 857         default:
 858                 dev_dbg(dev, "Unknown function %d.\n", fn);
 859         }
 860         mutex_unlock(&data->update_lock);
 861 
 862         return count;
 863 }
 864 
 865 /* ---------------------------------------------------------------------
 866  * Temperature sysfs attributes
 867  * ix = [0-2]
 868  * --------------------------------------------------------------------- */
 869 
 870 #define SYS_TEMP_INPUT                  0
 871 #define SYS_TEMP_MIN                    1
 872 #define SYS_TEMP_MAX                    2
 873 #define SYS_TEMP_OFFSET                 3
 874 #define SYS_TEMP_ALARM                  4
 875 #define SYS_TEMP_FAULT                  5
 876 
 877 static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
 878                          char *buf)
 879 {
 880         struct dme1737_data *data = dme1737_update_device(dev);
 881         struct sensor_device_attribute_2
 882                 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
 883         int ix = sensor_attr_2->index;
 884         int fn = sensor_attr_2->nr;
 885         int res;
 886 
 887         switch (fn) {
 888         case SYS_TEMP_INPUT:
 889                 res = TEMP_FROM_REG(data->temp[ix], 16);
 890                 break;
 891         case SYS_TEMP_MIN:
 892                 res = TEMP_FROM_REG(data->temp_min[ix], 8);
 893                 break;
 894         case SYS_TEMP_MAX:
 895                 res = TEMP_FROM_REG(data->temp_max[ix], 8);
 896                 break;
 897         case SYS_TEMP_OFFSET:
 898                 res = TEMP_FROM_REG(data->temp_offset[ix], 8);
 899                 break;
 900         case SYS_TEMP_ALARM:
 901                 res = (data->alarms >> DME1737_BIT_ALARM_TEMP[ix]) & 0x01;
 902                 break;
 903         case SYS_TEMP_FAULT:
 904                 res = (((u16)data->temp[ix] & 0xff00) == 0x8000);
 905                 break;
 906         default:
 907                 res = 0;
 908                 dev_dbg(dev, "Unknown function %d.\n", fn);
 909         }
 910 
 911         return sprintf(buf, "%d\n", res);
 912 }
 913 
 914 static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
 915                         const char *buf, size_t count)
 916 {
 917         struct dme1737_data *data = dev_get_drvdata(dev);
 918         struct sensor_device_attribute_2
 919                 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
 920         int ix = sensor_attr_2->index;
 921         int fn = sensor_attr_2->nr;
 922         long val;
 923         int err;
 924 
 925         err = kstrtol(buf, 10, &val);
 926         if (err)
 927                 return err;
 928 
 929         mutex_lock(&data->update_lock);
 930         switch (fn) {
 931         case SYS_TEMP_MIN:
 932                 data->temp_min[ix] = TEMP_TO_REG(val);
 933                 dme1737_write(data, DME1737_REG_TEMP_MIN(ix),
 934                               data->temp_min[ix]);
 935                 break;
 936         case SYS_TEMP_MAX:
 937                 data->temp_max[ix] = TEMP_TO_REG(val);
 938                 dme1737_write(data, DME1737_REG_TEMP_MAX(ix),
 939                               data->temp_max[ix]);
 940                 break;
 941         case SYS_TEMP_OFFSET:
 942                 data->temp_offset[ix] = TEMP_TO_REG(val);
 943                 dme1737_write(data, DME1737_REG_TEMP_OFFSET(ix),
 944                               data->temp_offset[ix]);
 945                 break;
 946         default:
 947                 dev_dbg(dev, "Unknown function %d.\n", fn);
 948         }
 949         mutex_unlock(&data->update_lock);
 950 
 951         return count;
 952 }
 953 
 954 /* ---------------------------------------------------------------------
 955  * Zone sysfs attributes
 956  * ix = [0-2]
 957  * --------------------------------------------------------------------- */
 958 
 959 #define SYS_ZONE_AUTO_CHANNELS_TEMP     0
 960 #define SYS_ZONE_AUTO_POINT1_TEMP_HYST  1
 961 #define SYS_ZONE_AUTO_POINT1_TEMP       2
 962 #define SYS_ZONE_AUTO_POINT2_TEMP       3
 963 #define SYS_ZONE_AUTO_POINT3_TEMP       4
 964 
 965 static ssize_t show_zone(struct device *dev, struct device_attribute *attr,
 966                          char *buf)
 967 {
 968         struct dme1737_data *data = dme1737_update_device(dev);
 969         struct sensor_device_attribute_2
 970                 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
 971         int ix = sensor_attr_2->index;
 972         int fn = sensor_attr_2->nr;
 973         int res;
 974 
 975         switch (fn) {
 976         case SYS_ZONE_AUTO_CHANNELS_TEMP:
 977                 /* check config2 for non-standard temp-to-zone mapping */
 978                 if ((ix == 1) && (data->config2 & 0x02))
 979                         res = 4;
 980                 else
 981                         res = 1 << ix;
 982                 break;
 983         case SYS_ZONE_AUTO_POINT1_TEMP_HYST:
 984                 res = TEMP_FROM_REG(data->zone_low[ix], 8) -
 985                       TEMP_HYST_FROM_REG(data->zone_hyst[ix == 2], ix);
 986                 break;
 987         case SYS_ZONE_AUTO_POINT1_TEMP:
 988                 res = TEMP_FROM_REG(data->zone_low[ix], 8);
 989                 break;
 990         case SYS_ZONE_AUTO_POINT2_TEMP:
 991                 /* pwm_freq holds the temp range bits in the upper nibble */
 992                 res = TEMP_FROM_REG(data->zone_low[ix], 8) +
 993                       TEMP_RANGE_FROM_REG(data->pwm_freq[ix]);
 994                 break;
 995         case SYS_ZONE_AUTO_POINT3_TEMP:
 996                 res = TEMP_FROM_REG(data->zone_abs[ix], 8);
 997                 break;
 998         default:
 999                 res = 0;
1000                 dev_dbg(dev, "Unknown function %d.\n", fn);
1001         }
1002 
1003         return sprintf(buf, "%d\n", res);
1004 }
1005 
1006 static ssize_t set_zone(struct device *dev, struct device_attribute *attr,
1007                         const char *buf, size_t count)
1008 {
1009         struct dme1737_data *data = dev_get_drvdata(dev);
1010         struct sensor_device_attribute_2
1011                 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
1012         int ix = sensor_attr_2->index;
1013         int fn = sensor_attr_2->nr;
1014         long val;
1015         int temp;
1016         int err;
1017         u8 reg;
1018 
1019         err = kstrtol(buf, 10, &val);
1020         if (err)
1021                 return err;
1022 
1023         mutex_lock(&data->update_lock);
1024         switch (fn) {
1025         case SYS_ZONE_AUTO_POINT1_TEMP_HYST:
1026                 /* Refresh the cache */
1027                 data->zone_low[ix] = dme1737_read(data,
1028                                                   DME1737_REG_ZONE_LOW(ix));
1029                 /* Modify the temp hyst value */
1030                 temp = TEMP_FROM_REG(data->zone_low[ix], 8);
1031                 reg = dme1737_read(data, DME1737_REG_ZONE_HYST(ix == 2));
1032                 data->zone_hyst[ix == 2] = TEMP_HYST_TO_REG(temp, val, ix, reg);
1033                 dme1737_write(data, DME1737_REG_ZONE_HYST(ix == 2),
1034                               data->zone_hyst[ix == 2]);
1035                 break;
1036         case SYS_ZONE_AUTO_POINT1_TEMP:
1037                 data->zone_low[ix] = TEMP_TO_REG(val);
1038                 dme1737_write(data, DME1737_REG_ZONE_LOW(ix),
1039                               data->zone_low[ix]);
1040                 break;
1041         case SYS_ZONE_AUTO_POINT2_TEMP:
1042                 /* Refresh the cache */
1043                 data->zone_low[ix] = dme1737_read(data,
1044                                                   DME1737_REG_ZONE_LOW(ix));
1045                 /*
1046                  * Modify the temp range value (which is stored in the upper
1047                  * nibble of the pwm_freq register)
1048                  */
1049                 temp = TEMP_FROM_REG(data->zone_low[ix], 8);
1050                 val = clamp_val(val, temp, temp + 80000);
1051                 reg = dme1737_read(data, DME1737_REG_PWM_FREQ(ix));
1052                 data->pwm_freq[ix] = TEMP_RANGE_TO_REG(val - temp, reg);
1053                 dme1737_write(data, DME1737_REG_PWM_FREQ(ix),
1054                               data->pwm_freq[ix]);
1055                 break;
1056         case SYS_ZONE_AUTO_POINT3_TEMP:
1057                 data->zone_abs[ix] = TEMP_TO_REG(val);
1058                 dme1737_write(data, DME1737_REG_ZONE_ABS(ix),
1059                               data->zone_abs[ix]);
1060                 break;
1061         default:
1062                 dev_dbg(dev, "Unknown function %d.\n", fn);
1063         }
1064         mutex_unlock(&data->update_lock);
1065 
1066         return count;
1067 }
1068 
1069 /* ---------------------------------------------------------------------
1070  * Fan sysfs attributes
1071  * ix = [0-5]
1072  * --------------------------------------------------------------------- */
1073 
1074 #define SYS_FAN_INPUT   0
1075 #define SYS_FAN_MIN     1
1076 #define SYS_FAN_MAX     2
1077 #define SYS_FAN_ALARM   3
1078 #define SYS_FAN_TYPE    4
1079 
1080 static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
1081                         char *buf)
1082 {
1083         struct dme1737_data *data = dme1737_update_device(dev);
1084         struct sensor_device_attribute_2
1085                 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
1086         int ix = sensor_attr_2->index;
1087         int fn = sensor_attr_2->nr;
1088         int res;
1089 
1090         switch (fn) {
1091         case SYS_FAN_INPUT:
1092                 res = FAN_FROM_REG(data->fan[ix],
1093                                    ix < 4 ? 0 :
1094                                    FAN_TPC_FROM_REG(data->fan_opt[ix]));
1095                 break;
1096         case SYS_FAN_MIN:
1097                 res = FAN_FROM_REG(data->fan_min[ix],
1098                                    ix < 4 ? 0 :
1099                                    FAN_TPC_FROM_REG(data->fan_opt[ix]));
1100                 break;
1101         case SYS_FAN_MAX:
1102                 /* only valid for fan[5-6] */
1103                 res = FAN_MAX_FROM_REG(data->fan_max[ix - 4]);
1104                 break;
1105         case SYS_FAN_ALARM:
1106                 res = (data->alarms >> DME1737_BIT_ALARM_FAN[ix]) & 0x01;
1107                 break;
1108         case SYS_FAN_TYPE:
1109                 /* only valid for fan[1-4] */
1110                 res = FAN_TYPE_FROM_REG(data->fan_opt[ix]);
1111                 break;
1112         default:
1113                 res = 0;
1114                 dev_dbg(dev, "Unknown function %d.\n", fn);
1115         }
1116 
1117         return sprintf(buf, "%d\n", res);
1118 }
1119 
1120 static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
1121                        const char *buf, size_t count)
1122 {
1123         struct dme1737_data *data = dev_get_drvdata(dev);
1124         struct sensor_device_attribute_2
1125                 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
1126         int ix = sensor_attr_2->index;
1127         int fn = sensor_attr_2->nr;
1128         long val;
1129         int err;
1130 
1131         err = kstrtol(buf, 10, &val);
1132         if (err)
1133                 return err;
1134 
1135         mutex_lock(&data->update_lock);
1136         switch (fn) {
1137         case SYS_FAN_MIN:
1138                 if (ix < 4) {
1139                         data->fan_min[ix] = FAN_TO_REG(val, 0);
1140                 } else {
1141                         /* Refresh the cache */
1142                         data->fan_opt[ix] = dme1737_read(data,
1143                                                 DME1737_REG_FAN_OPT(ix));
1144                         /* Modify the fan min value */
1145                         data->fan_min[ix] = FAN_TO_REG(val,
1146                                         FAN_TPC_FROM_REG(data->fan_opt[ix]));
1147                 }
1148                 dme1737_write(data, DME1737_REG_FAN_MIN(ix),
1149                               data->fan_min[ix] & 0xff);
1150                 dme1737_write(data, DME1737_REG_FAN_MIN(ix) + 1,
1151                               data->fan_min[ix] >> 8);
1152                 break;
1153         case SYS_FAN_MAX:
1154                 /* Only valid for fan[5-6] */
1155                 data->fan_max[ix - 4] = FAN_MAX_TO_REG(val);
1156                 dme1737_write(data, DME1737_REG_FAN_MAX(ix),
1157                               data->fan_max[ix - 4]);
1158                 break;
1159         case SYS_FAN_TYPE:
1160                 /* Only valid for fan[1-4] */
1161                 if (!(val == 1 || val == 2 || val == 4)) {
1162                         count = -EINVAL;
1163                         dev_warn(dev,
1164                                  "Fan type value %ld not supported. Choose one of 1, 2, or 4.\n",
1165                                  val);
1166                         goto exit;
1167                 }
1168                 data->fan_opt[ix] = FAN_TYPE_TO_REG(val, dme1737_read(data,
1169                                         DME1737_REG_FAN_OPT(ix)));
1170                 dme1737_write(data, DME1737_REG_FAN_OPT(ix),
1171                               data->fan_opt[ix]);
1172                 break;
1173         default:
1174                 dev_dbg(dev, "Unknown function %d.\n", fn);
1175         }
1176 exit:
1177         mutex_unlock(&data->update_lock);
1178 
1179         return count;
1180 }
1181 
1182 /* ---------------------------------------------------------------------
1183  * PWM sysfs attributes
1184  * ix = [0-4]
1185  * --------------------------------------------------------------------- */
1186 
1187 #define SYS_PWM                         0
1188 #define SYS_PWM_FREQ                    1
1189 #define SYS_PWM_ENABLE                  2
1190 #define SYS_PWM_RAMP_RATE               3
1191 #define SYS_PWM_AUTO_CHANNELS_ZONE      4
1192 #define SYS_PWM_AUTO_PWM_MIN            5
1193 #define SYS_PWM_AUTO_POINT1_PWM         6
1194 #define SYS_PWM_AUTO_POINT2_PWM         7
1195 
1196 static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
1197                         char *buf)
1198 {
1199         struct dme1737_data *data = dme1737_update_device(dev);
1200         struct sensor_device_attribute_2
1201                 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
1202         int ix = sensor_attr_2->index;
1203         int fn = sensor_attr_2->nr;
1204         int res;
1205 
1206         switch (fn) {
1207         case SYS_PWM:
1208                 if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 0)
1209                         res = 255;
1210                 else
1211                         res = data->pwm[ix];
1212                 break;
1213         case SYS_PWM_FREQ:
1214                 res = PWM_FREQ_FROM_REG(data->pwm_freq[ix]);
1215                 break;
1216         case SYS_PWM_ENABLE:
1217                 if (ix >= 3)
1218                         res = 1; /* pwm[5-6] hard-wired to manual mode */
1219                 else
1220                         res = PWM_EN_FROM_REG(data->pwm_config[ix]);
1221                 break;
1222         case SYS_PWM_RAMP_RATE:
1223                 /* Only valid for pwm[1-3] */
1224                 res = PWM_RR_FROM_REG(data->pwm_rr[ix > 0], ix);
1225                 break;
1226         case SYS_PWM_AUTO_CHANNELS_ZONE:
1227                 /* Only valid for pwm[1-3] */
1228                 if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2)
1229                         res = PWM_ACZ_FROM_REG(data->pwm_config[ix]);
1230                 else
1231                         res = data->pwm_acz[ix];
1232                 break;
1233         case SYS_PWM_AUTO_PWM_MIN:
1234                 /* Only valid for pwm[1-3] */
1235                 if (PWM_OFF_FROM_REG(data->pwm_rr[0], ix))
1236                         res = data->pwm_min[ix];
1237                 else
1238                         res = 0;
1239                 break;
1240         case SYS_PWM_AUTO_POINT1_PWM:
1241                 /* Only valid for pwm[1-3] */
1242                 res = data->pwm_min[ix];
1243                 break;
1244         case SYS_PWM_AUTO_POINT2_PWM:
1245                 /* Only valid for pwm[1-3] */
1246                 res = 255; /* hard-wired */
1247                 break;
1248         default:
1249                 res = 0;
1250                 dev_dbg(dev, "Unknown function %d.\n", fn);
1251         }
1252 
1253         return sprintf(buf, "%d\n", res);
1254 }
1255 
1256 static struct attribute *dme1737_pwm_chmod_attr[];
1257 static void dme1737_chmod_file(struct device*, struct attribute*, umode_t);
1258 
1259 static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
1260                        const char *buf, size_t count)
1261 {
1262         struct dme1737_data *data = dev_get_drvdata(dev);
1263         struct sensor_device_attribute_2
1264                 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
1265         int ix = sensor_attr_2->index;
1266         int fn = sensor_attr_2->nr;
1267         long val;
1268         int err;
1269 
1270         err = kstrtol(buf, 10, &val);
1271         if (err)
1272                 return err;
1273 
1274         mutex_lock(&data->update_lock);
1275         switch (fn) {
1276         case SYS_PWM:
1277                 data->pwm[ix] = clamp_val(val, 0, 255);
1278                 dme1737_write(data, DME1737_REG_PWM(ix), data->pwm[ix]);
1279                 break;
1280         case SYS_PWM_FREQ:
1281                 data->pwm_freq[ix] = PWM_FREQ_TO_REG(val, dme1737_read(data,
1282                                                 DME1737_REG_PWM_FREQ(ix)));
1283                 dme1737_write(data, DME1737_REG_PWM_FREQ(ix),
1284                               data->pwm_freq[ix]);
1285                 break;
1286         case SYS_PWM_ENABLE:
1287                 /* Only valid for pwm[1-3] */
1288                 if (val < 0 || val > 2) {
1289                         count = -EINVAL;
1290                         dev_warn(dev,
1291                                  "PWM enable %ld not supported. Choose one of 0, 1, or 2.\n",
1292                                  val);
1293                         goto exit;
1294                 }
1295                 /* Refresh the cache */
1296                 data->pwm_config[ix] = dme1737_read(data,
1297                                                 DME1737_REG_PWM_CONFIG(ix));
1298                 if (val == PWM_EN_FROM_REG(data->pwm_config[ix])) {
1299                         /* Bail out if no change */
1300                         goto exit;
1301                 }
1302                 /* Do some housekeeping if we are currently in auto mode */
1303                 if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) {
1304                         /* Save the current zone channel assignment */
1305                         data->pwm_acz[ix] = PWM_ACZ_FROM_REG(
1306                                                         data->pwm_config[ix]);
1307                         /* Save the current ramp rate state and disable it */
1308                         data->pwm_rr[ix > 0] = dme1737_read(data,
1309                                                 DME1737_REG_PWM_RR(ix > 0));
1310                         data->pwm_rr_en &= ~(1 << ix);
1311                         if (PWM_RR_EN_FROM_REG(data->pwm_rr[ix > 0], ix)) {
1312                                 data->pwm_rr_en |= (1 << ix);
1313                                 data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(0, ix,
1314                                                         data->pwm_rr[ix > 0]);
1315                                 dme1737_write(data,
1316                                               DME1737_REG_PWM_RR(ix > 0),
1317                                               data->pwm_rr[ix > 0]);
1318                         }
1319                 }
1320                 /* Set the new PWM mode */
1321                 switch (val) {
1322                 case 0:
1323                         /* Change permissions of pwm[ix] to read-only */
1324                         dme1737_chmod_file(dev, dme1737_pwm_chmod_attr[ix],
1325                                            S_IRUGO);
1326                         /* Turn fan fully on */
1327                         data->pwm_config[ix] = PWM_EN_TO_REG(0,
1328                                                         data->pwm_config[ix]);
1329                         dme1737_write(data, DME1737_REG_PWM_CONFIG(ix),
1330                                       data->pwm_config[ix]);
1331                         break;
1332                 case 1:
1333                         /* Turn on manual mode */
1334                         data->pwm_config[ix] = PWM_EN_TO_REG(1,
1335                                                         data->pwm_config[ix]);
1336                         dme1737_write(data, DME1737_REG_PWM_CONFIG(ix),
1337                                       data->pwm_config[ix]);
1338                         /* Change permissions of pwm[ix] to read-writeable */
1339                         dme1737_chmod_file(dev, dme1737_pwm_chmod_attr[ix],
1340                                            S_IRUGO | S_IWUSR);
1341                         break;
1342                 case 2:
1343                         /* Change permissions of pwm[ix] to read-only */
1344                         dme1737_chmod_file(dev, dme1737_pwm_chmod_attr[ix],
1345                                            S_IRUGO);
1346                         /*
1347                          * Turn on auto mode using the saved zone channel
1348                          * assignment
1349                          */
1350                         data->pwm_config[ix] = PWM_ACZ_TO_REG(
1351                                                         data->pwm_acz[ix],
1352                                                         data->pwm_config[ix]);
1353                         dme1737_write(data, DME1737_REG_PWM_CONFIG(ix),
1354                                       data->pwm_config[ix]);
1355                         /* Enable PWM ramp rate if previously enabled */
1356                         if (data->pwm_rr_en & (1 << ix)) {
1357                                 data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(1, ix,
1358                                                 dme1737_read(data,
1359                                                 DME1737_REG_PWM_RR(ix > 0)));
1360                                 dme1737_write(data,
1361                                               DME1737_REG_PWM_RR(ix > 0),
1362                                               data->pwm_rr[ix > 0]);
1363                         }
1364                         break;
1365                 }
1366                 break;
1367         case SYS_PWM_RAMP_RATE:
1368                 /* Only valid for pwm[1-3] */
1369                 /* Refresh the cache */
1370                 data->pwm_config[ix] = dme1737_read(data,
1371                                                 DME1737_REG_PWM_CONFIG(ix));
1372                 data->pwm_rr[ix > 0] = dme1737_read(data,
1373                                                 DME1737_REG_PWM_RR(ix > 0));
1374                 /* Set the ramp rate value */
1375                 if (val > 0) {
1376                         data->pwm_rr[ix > 0] = PWM_RR_TO_REG(val, ix,
1377                                                         data->pwm_rr[ix > 0]);
1378                 }
1379                 /*
1380                  * Enable/disable the feature only if the associated PWM
1381                  * output is in automatic mode.
1382                  */
1383                 if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) {
1384                         data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(val > 0, ix,
1385                                                         data->pwm_rr[ix > 0]);
1386                 }
1387                 dme1737_write(data, DME1737_REG_PWM_RR(ix > 0),
1388                               data->pwm_rr[ix > 0]);
1389                 break;
1390         case SYS_PWM_AUTO_CHANNELS_ZONE:
1391                 /* Only valid for pwm[1-3] */
1392                 if (!(val == 1 || val == 2 || val == 4 ||
1393                       val == 6 || val == 7)) {
1394                         count = -EINVAL;
1395                         dev_warn(dev,
1396                                  "PWM auto channels zone %ld not supported. Choose one of 1, 2, 4, 6, "
1397                                  "or 7.\n", val);
1398                         goto exit;
1399                 }
1400                 /* Refresh the cache */
1401                 data->pwm_config[ix] = dme1737_read(data,
1402                                                 DME1737_REG_PWM_CONFIG(ix));
1403                 if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) {
1404                         /*
1405                          * PWM is already in auto mode so update the temp
1406                          * channel assignment
1407                          */
1408                         data->pwm_config[ix] = PWM_ACZ_TO_REG(val,
1409                                                 data->pwm_config[ix]);
1410                         dme1737_write(data, DME1737_REG_PWM_CONFIG(ix),
1411                                       data->pwm_config[ix]);
1412                 } else {
1413                         /*
1414                          * PWM is not in auto mode so we save the temp
1415                          * channel assignment for later use
1416                          */
1417                         data->pwm_acz[ix] = val;
1418                 }
1419                 break;
1420         case SYS_PWM_AUTO_PWM_MIN:
1421                 /* Only valid for pwm[1-3] */
1422                 /* Refresh the cache */
1423                 data->pwm_min[ix] = dme1737_read(data,
1424                                                 DME1737_REG_PWM_MIN(ix));
1425                 /*
1426                  * There are only 2 values supported for the auto_pwm_min
1427                  * value: 0 or auto_point1_pwm. So if the temperature drops
1428                  * below the auto_point1_temp_hyst value, the fan either turns
1429                  * off or runs at auto_point1_pwm duty-cycle.
1430                  */
1431                 if (val > ((data->pwm_min[ix] + 1) / 2)) {
1432                         data->pwm_rr[0] = PWM_OFF_TO_REG(1, ix,
1433                                                 dme1737_read(data,
1434                                                 DME1737_REG_PWM_RR(0)));
1435                 } else {
1436                         data->pwm_rr[0] = PWM_OFF_TO_REG(0, ix,
1437                                                 dme1737_read(data,
1438                                                 DME1737_REG_PWM_RR(0)));
1439                 }
1440                 dme1737_write(data, DME1737_REG_PWM_RR(0),
1441                               data->pwm_rr[0]);
1442                 break;
1443         case SYS_PWM_AUTO_POINT1_PWM:
1444                 /* Only valid for pwm[1-3] */
1445                 data->pwm_min[ix] = clamp_val(val, 0, 255);
1446                 dme1737_write(data, DME1737_REG_PWM_MIN(ix),
1447                               data->pwm_min[ix]);
1448                 break;
1449         default:
1450                 dev_dbg(dev, "Unknown function %d.\n", fn);
1451         }
1452 exit:
1453         mutex_unlock(&data->update_lock);
1454 
1455         return count;
1456 }
1457 
1458 /* ---------------------------------------------------------------------
1459  * Miscellaneous sysfs attributes
1460  * --------------------------------------------------------------------- */
1461 
1462 static ssize_t vrm_show(struct device *dev, struct device_attribute *attr,
1463                         char *buf)
1464 {
1465         struct i2c_client *client = to_i2c_client(dev);
1466         struct dme1737_data *data = i2c_get_clientdata(client);
1467 
1468         return sprintf(buf, "%d\n", data->vrm);
1469 }
1470 
1471 static ssize_t vrm_store(struct device *dev, struct device_attribute *attr,
1472                          const char *buf, size_t count)
1473 {
1474         struct dme1737_data *data = dev_get_drvdata(dev);
1475         unsigned long val;
1476         int err;
1477 
1478         err = kstrtoul(buf, 10, &val);
1479         if (err)
1480                 return err;
1481 
1482         if (val > 255)
1483                 return -EINVAL;
1484 
1485         data->vrm = val;
1486         return count;
1487 }
1488 
1489 static ssize_t cpu0_vid_show(struct device *dev,
1490                              struct device_attribute *attr, char *buf)
1491 {
1492         struct dme1737_data *data = dme1737_update_device(dev);
1493 
1494         return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
1495 }
1496 
1497 static ssize_t name_show(struct device *dev, struct device_attribute *attr,
1498                          char *buf)
1499 {
1500         struct dme1737_data *data = dev_get_drvdata(dev);
1501 
1502         return sprintf(buf, "%s\n", data->name);
1503 }
1504 
1505 /* ---------------------------------------------------------------------
1506  * Sysfs device attribute defines and structs
1507  * --------------------------------------------------------------------- */
1508 
1509 /* Voltages 0-7 */
1510 
1511 #define SENSOR_DEVICE_ATTR_IN(ix) \
1512 static SENSOR_DEVICE_ATTR_2(in##ix##_input, S_IRUGO, \
1513         show_in, NULL, SYS_IN_INPUT, ix); \
1514 static SENSOR_DEVICE_ATTR_2(in##ix##_min, S_IRUGO | S_IWUSR, \
1515         show_in, set_in, SYS_IN_MIN, ix); \
1516 static SENSOR_DEVICE_ATTR_2(in##ix##_max, S_IRUGO | S_IWUSR, \
1517         show_in, set_in, SYS_IN_MAX, ix); \
1518 static SENSOR_DEVICE_ATTR_2(in##ix##_alarm, S_IRUGO, \
1519         show_in, NULL, SYS_IN_ALARM, ix)
1520 
1521 SENSOR_DEVICE_ATTR_IN(0);
1522 SENSOR_DEVICE_ATTR_IN(1);
1523 SENSOR_DEVICE_ATTR_IN(2);
1524 SENSOR_DEVICE_ATTR_IN(3);
1525 SENSOR_DEVICE_ATTR_IN(4);
1526 SENSOR_DEVICE_ATTR_IN(5);
1527 SENSOR_DEVICE_ATTR_IN(6);
1528 SENSOR_DEVICE_ATTR_IN(7);
1529 
1530 /* Temperatures 1-3 */
1531 
1532 #define SENSOR_DEVICE_ATTR_TEMP(ix) \
1533 static SENSOR_DEVICE_ATTR_2(temp##ix##_input, S_IRUGO, \
1534         show_temp, NULL, SYS_TEMP_INPUT, ix-1); \
1535 static SENSOR_DEVICE_ATTR_2(temp##ix##_min, S_IRUGO | S_IWUSR, \
1536         show_temp, set_temp, SYS_TEMP_MIN, ix-1); \
1537 static SENSOR_DEVICE_ATTR_2(temp##ix##_max, S_IRUGO | S_IWUSR, \
1538         show_temp, set_temp, SYS_TEMP_MAX, ix-1); \
1539 static SENSOR_DEVICE_ATTR_2(temp##ix##_offset, S_IRUGO, \
1540         show_temp, set_temp, SYS_TEMP_OFFSET, ix-1); \
1541 static SENSOR_DEVICE_ATTR_2(temp##ix##_alarm, S_IRUGO, \
1542         show_temp, NULL, SYS_TEMP_ALARM, ix-1); \
1543 static SENSOR_DEVICE_ATTR_2(temp##ix##_fault, S_IRUGO, \
1544         show_temp, NULL, SYS_TEMP_FAULT, ix-1)
1545 
1546 SENSOR_DEVICE_ATTR_TEMP(1);
1547 SENSOR_DEVICE_ATTR_TEMP(2);
1548 SENSOR_DEVICE_ATTR_TEMP(3);
1549 
1550 /* Zones 1-3 */
1551 
1552 #define SENSOR_DEVICE_ATTR_ZONE(ix) \
1553 static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_channels_temp, S_IRUGO, \
1554         show_zone, NULL, SYS_ZONE_AUTO_CHANNELS_TEMP, ix-1); \
1555 static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point1_temp_hyst, S_IRUGO, \
1556         show_zone, set_zone, SYS_ZONE_AUTO_POINT1_TEMP_HYST, ix-1); \
1557 static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point1_temp, S_IRUGO, \
1558         show_zone, set_zone, SYS_ZONE_AUTO_POINT1_TEMP, ix-1); \
1559 static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point2_temp, S_IRUGO, \
1560         show_zone, set_zone, SYS_ZONE_AUTO_POINT2_TEMP, ix-1); \
1561 static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point3_temp, S_IRUGO, \
1562         show_zone, set_zone, SYS_ZONE_AUTO_POINT3_TEMP, ix-1)
1563 
1564 SENSOR_DEVICE_ATTR_ZONE(1);
1565 SENSOR_DEVICE_ATTR_ZONE(2);
1566 SENSOR_DEVICE_ATTR_ZONE(3);
1567 
1568 /* Fans 1-4 */
1569 
1570 #define SENSOR_DEVICE_ATTR_FAN_1TO4(ix) \
1571 static SENSOR_DEVICE_ATTR_2(fan##ix##_input, S_IRUGO, \
1572         show_fan, NULL, SYS_FAN_INPUT, ix-1); \
1573 static SENSOR_DEVICE_ATTR_2(fan##ix##_min, S_IRUGO | S_IWUSR, \
1574         show_fan, set_fan, SYS_FAN_MIN, ix-1); \
1575 static SENSOR_DEVICE_ATTR_2(fan##ix##_alarm, S_IRUGO, \
1576         show_fan, NULL, SYS_FAN_ALARM, ix-1); \
1577 static SENSOR_DEVICE_ATTR_2(fan##ix##_type, S_IRUGO | S_IWUSR, \
1578         show_fan, set_fan, SYS_FAN_TYPE, ix-1)
1579 
1580 SENSOR_DEVICE_ATTR_FAN_1TO4(1);
1581 SENSOR_DEVICE_ATTR_FAN_1TO4(2);
1582 SENSOR_DEVICE_ATTR_FAN_1TO4(3);
1583 SENSOR_DEVICE_ATTR_FAN_1TO4(4);
1584 
1585 /* Fans 5-6 */
1586 
1587 #define SENSOR_DEVICE_ATTR_FAN_5TO6(ix) \
1588 static SENSOR_DEVICE_ATTR_2(fan##ix##_input, S_IRUGO, \
1589         show_fan, NULL, SYS_FAN_INPUT, ix-1); \
1590 static SENSOR_DEVICE_ATTR_2(fan##ix##_min, S_IRUGO | S_IWUSR, \
1591         show_fan, set_fan, SYS_FAN_MIN, ix-1); \
1592 static SENSOR_DEVICE_ATTR_2(fan##ix##_alarm, S_IRUGO, \
1593         show_fan, NULL, SYS_FAN_ALARM, ix-1); \
1594 static SENSOR_DEVICE_ATTR_2(fan##ix##_max, S_IRUGO | S_IWUSR, \
1595         show_fan, set_fan, SYS_FAN_MAX, ix-1)
1596 
1597 SENSOR_DEVICE_ATTR_FAN_5TO6(5);
1598 SENSOR_DEVICE_ATTR_FAN_5TO6(6);
1599 
1600 /* PWMs 1-3 */
1601 
1602 #define SENSOR_DEVICE_ATTR_PWM_1TO3(ix) \
1603 static SENSOR_DEVICE_ATTR_2(pwm##ix, S_IRUGO, \
1604         show_pwm, set_pwm, SYS_PWM, ix-1); \
1605 static SENSOR_DEVICE_ATTR_2(pwm##ix##_freq, S_IRUGO, \
1606         show_pwm, set_pwm, SYS_PWM_FREQ, ix-1); \
1607 static SENSOR_DEVICE_ATTR_2(pwm##ix##_enable, S_IRUGO, \
1608         show_pwm, set_pwm, SYS_PWM_ENABLE, ix-1); \
1609 static SENSOR_DEVICE_ATTR_2(pwm##ix##_ramp_rate, S_IRUGO, \
1610         show_pwm, set_pwm, SYS_PWM_RAMP_RATE, ix-1); \
1611 static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_channels_zone, S_IRUGO, \
1612         show_pwm, set_pwm, SYS_PWM_AUTO_CHANNELS_ZONE, ix-1); \
1613 static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_pwm_min, S_IRUGO, \
1614         show_pwm, set_pwm, SYS_PWM_AUTO_PWM_MIN, ix-1); \
1615 static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_point1_pwm, S_IRUGO, \
1616         show_pwm, set_pwm, SYS_PWM_AUTO_POINT1_PWM, ix-1); \
1617 static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_point2_pwm, S_IRUGO, \
1618         show_pwm, NULL, SYS_PWM_AUTO_POINT2_PWM, ix-1)
1619 
1620 SENSOR_DEVICE_ATTR_PWM_1TO3(1);
1621 SENSOR_DEVICE_ATTR_PWM_1TO3(2);
1622 SENSOR_DEVICE_ATTR_PWM_1TO3(3);
1623 
1624 /* PWMs 5-6 */
1625 
1626 #define SENSOR_DEVICE_ATTR_PWM_5TO6(ix) \
1627 static SENSOR_DEVICE_ATTR_2(pwm##ix, S_IRUGO, \
1628         show_pwm, set_pwm, SYS_PWM, ix-1); \
1629 static SENSOR_DEVICE_ATTR_2(pwm##ix##_freq, S_IRUGO, \
1630         show_pwm, set_pwm, SYS_PWM_FREQ, ix-1); \
1631 static SENSOR_DEVICE_ATTR_2(pwm##ix##_enable, S_IRUGO, \
1632         show_pwm, NULL, SYS_PWM_ENABLE, ix-1)
1633 
1634 SENSOR_DEVICE_ATTR_PWM_5TO6(5);
1635 SENSOR_DEVICE_ATTR_PWM_5TO6(6);
1636 
1637 /* Misc */
1638 
1639 static DEVICE_ATTR_RW(vrm);
1640 static DEVICE_ATTR_RO(cpu0_vid);
1641 static DEVICE_ATTR_RO(name);   /* for ISA devices */
1642 
1643 /*
1644  * This struct holds all the attributes that are always present and need to be
1645  * created unconditionally. The attributes that need modification of their
1646  * permissions are created read-only and write permissions are added or removed
1647  * on the fly when required
1648  */
1649 static struct attribute *dme1737_attr[] = {
1650         /* Voltages */
1651         &sensor_dev_attr_in0_input.dev_attr.attr,
1652         &sensor_dev_attr_in0_min.dev_attr.attr,
1653         &sensor_dev_attr_in0_max.dev_attr.attr,
1654         &sensor_dev_attr_in0_alarm.dev_attr.attr,
1655         &sensor_dev_attr_in1_input.dev_attr.attr,
1656         &sensor_dev_attr_in1_min.dev_attr.attr,
1657         &sensor_dev_attr_in1_max.dev_attr.attr,
1658         &sensor_dev_attr_in1_alarm.dev_attr.attr,
1659         &sensor_dev_attr_in2_input.dev_attr.attr,
1660         &sensor_dev_attr_in2_min.dev_attr.attr,
1661         &sensor_dev_attr_in2_max.dev_attr.attr,
1662         &sensor_dev_attr_in2_alarm.dev_attr.attr,
1663         &sensor_dev_attr_in3_input.dev_attr.attr,
1664         &sensor_dev_attr_in3_min.dev_attr.attr,
1665         &sensor_dev_attr_in3_max.dev_attr.attr,
1666         &sensor_dev_attr_in3_alarm.dev_attr.attr,
1667         &sensor_dev_attr_in4_input.dev_attr.attr,
1668         &sensor_dev_attr_in4_min.dev_attr.attr,
1669         &sensor_dev_attr_in4_max.dev_attr.attr,
1670         &sensor_dev_attr_in4_alarm.dev_attr.attr,
1671         &sensor_dev_attr_in5_input.dev_attr.attr,
1672         &sensor_dev_attr_in5_min.dev_attr.attr,
1673         &sensor_dev_attr_in5_max.dev_attr.attr,
1674         &sensor_dev_attr_in5_alarm.dev_attr.attr,
1675         &sensor_dev_attr_in6_input.dev_attr.attr,
1676         &sensor_dev_attr_in6_min.dev_attr.attr,
1677         &sensor_dev_attr_in6_max.dev_attr.attr,
1678         &sensor_dev_attr_in6_alarm.dev_attr.attr,
1679         /* Temperatures */
1680         &sensor_dev_attr_temp1_input.dev_attr.attr,
1681         &sensor_dev_attr_temp1_min.dev_attr.attr,
1682         &sensor_dev_attr_temp1_max.dev_attr.attr,
1683         &sensor_dev_attr_temp1_alarm.dev_attr.attr,
1684         &sensor_dev_attr_temp1_fault.dev_attr.attr,
1685         &sensor_dev_attr_temp2_input.dev_attr.attr,
1686         &sensor_dev_attr_temp2_min.dev_attr.attr,
1687         &sensor_dev_attr_temp2_max.dev_attr.attr,
1688         &sensor_dev_attr_temp2_alarm.dev_attr.attr,
1689         &sensor_dev_attr_temp2_fault.dev_attr.attr,
1690         &sensor_dev_attr_temp3_input.dev_attr.attr,
1691         &sensor_dev_attr_temp3_min.dev_attr.attr,
1692         &sensor_dev_attr_temp3_max.dev_attr.attr,
1693         &sensor_dev_attr_temp3_alarm.dev_attr.attr,
1694         &sensor_dev_attr_temp3_fault.dev_attr.attr,
1695         /* Zones */
1696         &sensor_dev_attr_zone1_auto_point1_temp.dev_attr.attr,
1697         &sensor_dev_attr_zone1_auto_point2_temp.dev_attr.attr,
1698         &sensor_dev_attr_zone1_auto_point3_temp.dev_attr.attr,
1699         &sensor_dev_attr_zone1_auto_channels_temp.dev_attr.attr,
1700         &sensor_dev_attr_zone2_auto_point1_temp.dev_attr.attr,
1701         &sensor_dev_attr_zone2_auto_point2_temp.dev_attr.attr,
1702         &sensor_dev_attr_zone2_auto_point3_temp.dev_attr.attr,
1703         &sensor_dev_attr_zone2_auto_channels_temp.dev_attr.attr,
1704         NULL
1705 };
1706 
1707 static const struct attribute_group dme1737_group = {
1708         .attrs = dme1737_attr,
1709 };
1710 
1711 /*
1712  * The following struct holds temp offset attributes, which are not available
1713  * in all chips. The following chips support them:
1714  * DME1737, SCH311x
1715  */
1716 static struct attribute *dme1737_temp_offset_attr[] = {
1717         &sensor_dev_attr_temp1_offset.dev_attr.attr,
1718         &sensor_dev_attr_temp2_offset.dev_attr.attr,
1719         &sensor_dev_attr_temp3_offset.dev_attr.attr,
1720         NULL
1721 };
1722 
1723 static const struct attribute_group dme1737_temp_offset_group = {
1724         .attrs = dme1737_temp_offset_attr,
1725 };
1726 
1727 /*
1728  * The following struct holds VID related attributes, which are not available
1729  * in all chips. The following chips support them:
1730  * DME1737
1731  */
1732 static struct attribute *dme1737_vid_attr[] = {
1733         &dev_attr_vrm.attr,
1734         &dev_attr_cpu0_vid.attr,
1735         NULL
1736 };
1737 
1738 static const struct attribute_group dme1737_vid_group = {
1739         .attrs = dme1737_vid_attr,
1740 };
1741 
1742 /*
1743  * The following struct holds temp zone 3 related attributes, which are not
1744  * available in all chips. The following chips support them:
1745  * DME1737, SCH311x, SCH5027
1746  */
1747 static struct attribute *dme1737_zone3_attr[] = {
1748         &sensor_dev_attr_zone3_auto_point1_temp.dev_attr.attr,
1749         &sensor_dev_attr_zone3_auto_point2_temp.dev_attr.attr,
1750         &sensor_dev_attr_zone3_auto_point3_temp.dev_attr.attr,
1751         &sensor_dev_attr_zone3_auto_channels_temp.dev_attr.attr,
1752         NULL
1753 };
1754 
1755 static const struct attribute_group dme1737_zone3_group = {
1756         .attrs = dme1737_zone3_attr,
1757 };
1758 
1759 
1760 /*
1761  * The following struct holds temp zone hysteresis related attributes, which
1762  * are not available in all chips. The following chips support them:
1763  * DME1737, SCH311x
1764  */
1765 static struct attribute *dme1737_zone_hyst_attr[] = {
1766         &sensor_dev_attr_zone1_auto_point1_temp_hyst.dev_attr.attr,
1767         &sensor_dev_attr_zone2_auto_point1_temp_hyst.dev_attr.attr,
1768         &sensor_dev_attr_zone3_auto_point1_temp_hyst.dev_attr.attr,
1769         NULL
1770 };
1771 
1772 static const struct attribute_group dme1737_zone_hyst_group = {
1773         .attrs = dme1737_zone_hyst_attr,
1774 };
1775 
1776 /*
1777  * The following struct holds voltage in7 related attributes, which
1778  * are not available in all chips. The following chips support them:
1779  * SCH5127
1780  */
1781 static struct attribute *dme1737_in7_attr[] = {
1782         &sensor_dev_attr_in7_input.dev_attr.attr,
1783         &sensor_dev_attr_in7_min.dev_attr.attr,
1784         &sensor_dev_attr_in7_max.dev_attr.attr,
1785         &sensor_dev_attr_in7_alarm.dev_attr.attr,
1786         NULL
1787 };
1788 
1789 static const struct attribute_group dme1737_in7_group = {
1790         .attrs = dme1737_in7_attr,
1791 };
1792 
1793 /*
1794  * The following structs hold the PWM attributes, some of which are optional.
1795  * Their creation depends on the chip configuration which is determined during
1796  * module load.
1797  */
1798 static struct attribute *dme1737_pwm1_attr[] = {
1799         &sensor_dev_attr_pwm1.dev_attr.attr,
1800         &sensor_dev_attr_pwm1_freq.dev_attr.attr,
1801         &sensor_dev_attr_pwm1_enable.dev_attr.attr,
1802         &sensor_dev_attr_pwm1_ramp_rate.dev_attr.attr,
1803         &sensor_dev_attr_pwm1_auto_channels_zone.dev_attr.attr,
1804         &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
1805         &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
1806         NULL
1807 };
1808 static struct attribute *dme1737_pwm2_attr[] = {
1809         &sensor_dev_attr_pwm2.dev_attr.attr,
1810         &sensor_dev_attr_pwm2_freq.dev_attr.attr,
1811         &sensor_dev_attr_pwm2_enable.dev_attr.attr,
1812         &sensor_dev_attr_pwm2_ramp_rate.dev_attr.attr,
1813         &sensor_dev_attr_pwm2_auto_channels_zone.dev_attr.attr,
1814         &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,
1815         &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
1816         NULL
1817 };
1818 static struct attribute *dme1737_pwm3_attr[] = {
1819         &sensor_dev_attr_pwm3.dev_attr.attr,
1820         &sensor_dev_attr_pwm3_freq.dev_attr.attr,
1821         &sensor_dev_attr_pwm3_enable.dev_attr.attr,
1822         &sensor_dev_attr_pwm3_ramp_rate.dev_attr.attr,
1823         &sensor_dev_attr_pwm3_auto_channels_zone.dev_attr.attr,
1824         &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,
1825         &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
1826         NULL
1827 };
1828 static struct attribute *dme1737_pwm5_attr[] = {
1829         &sensor_dev_attr_pwm5.dev_attr.attr,
1830         &sensor_dev_attr_pwm5_freq.dev_attr.attr,
1831         &sensor_dev_attr_pwm5_enable.dev_attr.attr,
1832         NULL
1833 };
1834 static struct attribute *dme1737_pwm6_attr[] = {
1835         &sensor_dev_attr_pwm6.dev_attr.attr,
1836         &sensor_dev_attr_pwm6_freq.dev_attr.attr,
1837         &sensor_dev_attr_pwm6_enable.dev_attr.attr,
1838         NULL
1839 };
1840 
1841 static const struct attribute_group dme1737_pwm_group[] = {
1842         { .attrs = dme1737_pwm1_attr },
1843         { .attrs = dme1737_pwm2_attr },
1844         { .attrs = dme1737_pwm3_attr },
1845         { .attrs = NULL },
1846         { .attrs = dme1737_pwm5_attr },
1847         { .attrs = dme1737_pwm6_attr },
1848 };
1849 
1850 /*
1851  * The following struct holds auto PWM min attributes, which are not available
1852  * in all chips. Their creation depends on the chip type which is determined
1853  * during module load.
1854  */
1855 static struct attribute *dme1737_auto_pwm_min_attr[] = {
1856         &sensor_dev_attr_pwm1_auto_pwm_min.dev_attr.attr,
1857         &sensor_dev_attr_pwm2_auto_pwm_min.dev_attr.attr,
1858         &sensor_dev_attr_pwm3_auto_pwm_min.dev_attr.attr,
1859 };
1860 
1861 /*
1862  * The following structs hold the fan attributes, some of which are optional.
1863  * Their creation depends on the chip configuration which is determined during
1864  * module load.
1865  */
1866 static struct attribute *dme1737_fan1_attr[] = {
1867         &sensor_dev_attr_fan1_input.dev_attr.attr,
1868         &sensor_dev_attr_fan1_min.dev_attr.attr,
1869         &sensor_dev_attr_fan1_alarm.dev_attr.attr,
1870         &sensor_dev_attr_fan1_type.dev_attr.attr,
1871         NULL
1872 };
1873 static struct attribute *dme1737_fan2_attr[] = {
1874         &sensor_dev_attr_fan2_input.dev_attr.attr,
1875         &sensor_dev_attr_fan2_min.dev_attr.attr,
1876         &sensor_dev_attr_fan2_alarm.dev_attr.attr,
1877         &sensor_dev_attr_fan2_type.dev_attr.attr,
1878         NULL
1879 };
1880 static struct attribute *dme1737_fan3_attr[] = {
1881         &sensor_dev_attr_fan3_input.dev_attr.attr,
1882         &sensor_dev_attr_fan3_min.dev_attr.attr,
1883         &sensor_dev_attr_fan3_alarm.dev_attr.attr,
1884         &sensor_dev_attr_fan3_type.dev_attr.attr,
1885         NULL
1886 };
1887 static struct attribute *dme1737_fan4_attr[] = {
1888         &sensor_dev_attr_fan4_input.dev_attr.attr,
1889         &sensor_dev_attr_fan4_min.dev_attr.attr,
1890         &sensor_dev_attr_fan4_alarm.dev_attr.attr,
1891         &sensor_dev_attr_fan4_type.dev_attr.attr,
1892         NULL
1893 };
1894 static struct attribute *dme1737_fan5_attr[] = {
1895         &sensor_dev_attr_fan5_input.dev_attr.attr,
1896         &sensor_dev_attr_fan5_min.dev_attr.attr,
1897         &sensor_dev_attr_fan5_alarm.dev_attr.attr,
1898         &sensor_dev_attr_fan5_max.dev_attr.attr,
1899         NULL
1900 };
1901 static struct attribute *dme1737_fan6_attr[] = {
1902         &sensor_dev_attr_fan6_input.dev_attr.attr,
1903         &sensor_dev_attr_fan6_min.dev_attr.attr,
1904         &sensor_dev_attr_fan6_alarm.dev_attr.attr,
1905         &sensor_dev_attr_fan6_max.dev_attr.attr,
1906         NULL
1907 };
1908 
1909 static const struct attribute_group dme1737_fan_group[] = {
1910         { .attrs = dme1737_fan1_attr },
1911         { .attrs = dme1737_fan2_attr },
1912         { .attrs = dme1737_fan3_attr },
1913         { .attrs = dme1737_fan4_attr },
1914         { .attrs = dme1737_fan5_attr },
1915         { .attrs = dme1737_fan6_attr },
1916 };
1917 
1918 /*
1919  * The permissions of the following zone attributes are changed to read-
1920  * writeable if the chip is *not* locked. Otherwise they stay read-only.
1921  */
1922 static struct attribute *dme1737_zone_chmod_attr[] = {
1923         &sensor_dev_attr_zone1_auto_point1_temp.dev_attr.attr,
1924         &sensor_dev_attr_zone1_auto_point2_temp.dev_attr.attr,
1925         &sensor_dev_attr_zone1_auto_point3_temp.dev_attr.attr,
1926         &sensor_dev_attr_zone2_auto_point1_temp.dev_attr.attr,
1927         &sensor_dev_attr_zone2_auto_point2_temp.dev_attr.attr,
1928         &sensor_dev_attr_zone2_auto_point3_temp.dev_attr.attr,
1929         NULL
1930 };
1931 
1932 static const struct attribute_group dme1737_zone_chmod_group = {
1933         .attrs = dme1737_zone_chmod_attr,
1934 };
1935 
1936 
1937 /*
1938  * The permissions of the following zone 3 attributes are changed to read-
1939  * writeable if the chip is *not* locked. Otherwise they stay read-only.
1940  */
1941 static struct attribute *dme1737_zone3_chmod_attr[] = {
1942         &sensor_dev_attr_zone3_auto_point1_temp.dev_attr.attr,
1943         &sensor_dev_attr_zone3_auto_point2_temp.dev_attr.attr,
1944         &sensor_dev_attr_zone3_auto_point3_temp.dev_attr.attr,
1945         NULL
1946 };
1947 
1948 static const struct attribute_group dme1737_zone3_chmod_group = {
1949         .attrs = dme1737_zone3_chmod_attr,
1950 };
1951 
1952 /*
1953  * The permissions of the following PWM attributes are changed to read-
1954  * writeable if the chip is *not* locked and the respective PWM is available.
1955  * Otherwise they stay read-only.
1956  */
1957 static struct attribute *dme1737_pwm1_chmod_attr[] = {
1958         &sensor_dev_attr_pwm1_freq.dev_attr.attr,
1959         &sensor_dev_attr_pwm1_enable.dev_attr.attr,
1960         &sensor_dev_attr_pwm1_ramp_rate.dev_attr.attr,
1961         &sensor_dev_attr_pwm1_auto_channels_zone.dev_attr.attr,
1962         &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
1963         NULL
1964 };
1965 static struct attribute *dme1737_pwm2_chmod_attr[] = {
1966         &sensor_dev_attr_pwm2_freq.dev_attr.attr,
1967         &sensor_dev_attr_pwm2_enable.dev_attr.attr,
1968         &sensor_dev_attr_pwm2_ramp_rate.dev_attr.attr,
1969         &sensor_dev_attr_pwm2_auto_channels_zone.dev_attr.attr,
1970         &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,
1971         NULL
1972 };
1973 static struct attribute *dme1737_pwm3_chmod_attr[] = {
1974         &sensor_dev_attr_pwm3_freq.dev_attr.attr,
1975         &sensor_dev_attr_pwm3_enable.dev_attr.attr,
1976         &sensor_dev_attr_pwm3_ramp_rate.dev_attr.attr,
1977         &sensor_dev_attr_pwm3_auto_channels_zone.dev_attr.attr,
1978         &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,
1979         NULL
1980 };
1981 static struct attribute *dme1737_pwm5_chmod_attr[] = {
1982         &sensor_dev_attr_pwm5.dev_attr.attr,
1983         &sensor_dev_attr_pwm5_freq.dev_attr.attr,
1984         NULL
1985 };
1986 static struct attribute *dme1737_pwm6_chmod_attr[] = {
1987         &sensor_dev_attr_pwm6.dev_attr.attr,
1988         &sensor_dev_attr_pwm6_freq.dev_attr.attr,
1989         NULL
1990 };
1991 
1992 static const struct attribute_group dme1737_pwm_chmod_group[] = {
1993         { .attrs = dme1737_pwm1_chmod_attr },
1994         { .attrs = dme1737_pwm2_chmod_attr },
1995         { .attrs = dme1737_pwm3_chmod_attr },
1996         { .attrs = NULL },
1997         { .attrs = dme1737_pwm5_chmod_attr },
1998         { .attrs = dme1737_pwm6_chmod_attr },
1999 };
2000 
2001 /*
2002  * Pwm[1-3] are read-writeable if the associated pwm is in manual mode and the
2003  * chip is not locked. Otherwise they are read-only.
2004  */
2005 static struct attribute *dme1737_pwm_chmod_attr[] = {
2006         &sensor_dev_attr_pwm1.dev_attr.attr,
2007         &sensor_dev_attr_pwm2.dev_attr.attr,
2008         &sensor_dev_attr_pwm3.dev_attr.attr,
2009 };
2010 
2011 /* ---------------------------------------------------------------------
2012  * Super-IO functions
2013  * --------------------------------------------------------------------- */
2014 
2015 static inline void dme1737_sio_enter(int sio_cip)
2016 {
2017         outb(0x55, sio_cip);
2018 }
2019 
2020 static inline void dme1737_sio_exit(int sio_cip)
2021 {
2022         outb(0xaa, sio_cip);
2023 }
2024 
2025 static inline int dme1737_sio_inb(int sio_cip, int reg)
2026 {
2027         outb(reg, sio_cip);
2028         return inb(sio_cip + 1);
2029 }
2030 
2031 static inline void dme1737_sio_outb(int sio_cip, int reg, int val)
2032 {
2033         outb(reg, sio_cip);
2034         outb(val, sio_cip + 1);
2035 }
2036 
2037 /* ---------------------------------------------------------------------
2038  * Device initialization
2039  * --------------------------------------------------------------------- */
2040 
2041 static int dme1737_i2c_get_features(int, struct dme1737_data*);
2042 
2043 static void dme1737_chmod_file(struct device *dev,
2044                                struct attribute *attr, umode_t mode)
2045 {
2046         if (sysfs_chmod_file(&dev->kobj, attr, mode)) {
2047                 dev_warn(dev, "Failed to change permissions of %s.\n",
2048                          attr->name);
2049         }
2050 }
2051 
2052 static void dme1737_chmod_group(struct device *dev,
2053                                 const struct attribute_group *group,
2054                                 umode_t mode)
2055 {
2056         struct attribute **attr;
2057 
2058         for (attr = group->attrs; *attr; attr++)
2059                 dme1737_chmod_file(dev, *attr, mode);
2060 }
2061 
2062 static void dme1737_remove_files(struct device *dev)
2063 {
2064         struct dme1737_data *data = dev_get_drvdata(dev);
2065         int ix;
2066 
2067         for (ix = 0; ix < ARRAY_SIZE(dme1737_fan_group); ix++) {
2068                 if (data->has_features & HAS_FAN(ix)) {
2069                         sysfs_remove_group(&dev->kobj,
2070                                            &dme1737_fan_group[ix]);
2071                 }
2072         }
2073 
2074         for (ix = 0; ix < ARRAY_SIZE(dme1737_pwm_group); ix++) {
2075                 if (data->has_features & HAS_PWM(ix)) {
2076                         sysfs_remove_group(&dev->kobj,
2077                                            &dme1737_pwm_group[ix]);
2078                         if ((data->has_features & HAS_PWM_MIN) && ix < 3) {
2079                                 sysfs_remove_file(&dev->kobj,
2080                                                 dme1737_auto_pwm_min_attr[ix]);
2081                         }
2082                 }
2083         }
2084 
2085         if (data->has_features & HAS_TEMP_OFFSET)
2086                 sysfs_remove_group(&dev->kobj, &dme1737_temp_offset_group);
2087         if (data->has_features & HAS_VID)
2088                 sysfs_remove_group(&dev->kobj, &dme1737_vid_group);
2089         if (data->has_features & HAS_ZONE3)
2090                 sysfs_remove_group(&dev->kobj, &dme1737_zone3_group);
2091         if (data->has_features & HAS_ZONE_HYST)
2092                 sysfs_remove_group(&dev->kobj, &dme1737_zone_hyst_group);
2093         if (data->has_features & HAS_IN7)
2094                 sysfs_remove_group(&dev->kobj, &dme1737_in7_group);
2095         sysfs_remove_group(&dev->kobj, &dme1737_group);
2096 
2097         if (!data->client)
2098                 sysfs_remove_file(&dev->kobj, &dev_attr_name.attr);
2099 }
2100 
2101 static int dme1737_create_files(struct device *dev)
2102 {
2103         struct dme1737_data *data = dev_get_drvdata(dev);
2104         int err, ix;
2105 
2106         /* Create a name attribute for ISA devices */
2107         if (!data->client) {
2108                 err = sysfs_create_file(&dev->kobj, &dev_attr_name.attr);
2109                 if (err)
2110                         goto exit;
2111         }
2112 
2113         /* Create standard sysfs attributes */
2114         err = sysfs_create_group(&dev->kobj, &dme1737_group);
2115         if (err)
2116                 goto exit_remove;
2117 
2118         /* Create chip-dependent sysfs attributes */
2119         if (data->has_features & HAS_TEMP_OFFSET) {
2120                 err = sysfs_create_group(&dev->kobj,
2121                                          &dme1737_temp_offset_group);
2122                 if (err)
2123                         goto exit_remove;
2124         }
2125         if (data->has_features & HAS_VID) {
2126                 err = sysfs_create_group(&dev->kobj, &dme1737_vid_group);
2127                 if (err)
2128                         goto exit_remove;
2129         }
2130         if (data->has_features & HAS_ZONE3) {
2131                 err = sysfs_create_group(&dev->kobj, &dme1737_zone3_group);
2132                 if (err)
2133                         goto exit_remove;
2134         }
2135         if (data->has_features & HAS_ZONE_HYST) {
2136                 err = sysfs_create_group(&dev->kobj, &dme1737_zone_hyst_group);
2137                 if (err)
2138                         goto exit_remove;
2139         }
2140         if (data->has_features & HAS_IN7) {
2141                 err = sysfs_create_group(&dev->kobj, &dme1737_in7_group);
2142                 if (err)
2143                         goto exit_remove;
2144         }
2145 
2146         /* Create fan sysfs attributes */
2147         for (ix = 0; ix < ARRAY_SIZE(dme1737_fan_group); ix++) {
2148                 if (data->has_features & HAS_FAN(ix)) {
2149                         err = sysfs_create_group(&dev->kobj,
2150                                                  &dme1737_fan_group[ix]);
2151                         if (err)
2152                                 goto exit_remove;
2153                 }
2154         }
2155 
2156         /* Create PWM sysfs attributes */
2157         for (ix = 0; ix < ARRAY_SIZE(dme1737_pwm_group); ix++) {
2158                 if (data->has_features & HAS_PWM(ix)) {
2159                         err = sysfs_create_group(&dev->kobj,
2160                                                  &dme1737_pwm_group[ix]);
2161                         if (err)
2162                                 goto exit_remove;
2163                         if ((data->has_features & HAS_PWM_MIN) && (ix < 3)) {
2164                                 err = sysfs_create_file(&dev->kobj,
2165                                                 dme1737_auto_pwm_min_attr[ix]);
2166                                 if (err)
2167                                         goto exit_remove;
2168                         }
2169                 }
2170         }
2171 
2172         /*
2173          * Inform if the device is locked. Otherwise change the permissions of
2174          * selected attributes from read-only to read-writeable.
2175          */
2176         if (data->config & 0x02) {
2177                 dev_info(dev,
2178                          "Device is locked. Some attributes will be read-only.\n");
2179         } else {
2180                 /* Change permissions of zone sysfs attributes */
2181                 dme1737_chmod_group(dev, &dme1737_zone_chmod_group,
2182                                     S_IRUGO | S_IWUSR);
2183 
2184                 /* Change permissions of chip-dependent sysfs attributes */
2185                 if (data->has_features & HAS_TEMP_OFFSET) {
2186                         dme1737_chmod_group(dev, &dme1737_temp_offset_group,
2187                                             S_IRUGO | S_IWUSR);
2188                 }
2189                 if (data->has_features & HAS_ZONE3) {
2190                         dme1737_chmod_group(dev, &dme1737_zone3_chmod_group,
2191                                             S_IRUGO | S_IWUSR);
2192                 }
2193                 if (data->has_features & HAS_ZONE_HYST) {
2194                         dme1737_chmod_group(dev, &dme1737_zone_hyst_group,
2195                                             S_IRUGO | S_IWUSR);
2196                 }
2197 
2198                 /* Change permissions of PWM sysfs attributes */
2199                 for (ix = 0; ix < ARRAY_SIZE(dme1737_pwm_chmod_group); ix++) {
2200                         if (data->has_features & HAS_PWM(ix)) {
2201                                 dme1737_chmod_group(dev,
2202                                                 &dme1737_pwm_chmod_group[ix],
2203                                                 S_IRUGO | S_IWUSR);
2204                                 if ((data->has_features & HAS_PWM_MIN) &&
2205                                     ix < 3) {
2206                                         dme1737_chmod_file(dev,
2207                                                 dme1737_auto_pwm_min_attr[ix],
2208                                                 S_IRUGO | S_IWUSR);
2209                                 }
2210                         }
2211                 }
2212 
2213                 /* Change permissions of pwm[1-3] if in manual mode */
2214                 for (ix = 0; ix < 3; ix++) {
2215                         if ((data->has_features & HAS_PWM(ix)) &&
2216                             (PWM_EN_FROM_REG(data->pwm_config[ix]) == 1)) {
2217                                 dme1737_chmod_file(dev,
2218                                                 dme1737_pwm_chmod_attr[ix],
2219                                                 S_IRUGO | S_IWUSR);
2220                         }
2221                 }
2222         }
2223 
2224         return 0;
2225 
2226 exit_remove:
2227         dme1737_remove_files(dev);
2228 exit:
2229         return err;
2230 }
2231 
2232 static int dme1737_init_device(struct device *dev)
2233 {
2234         struct dme1737_data *data = dev_get_drvdata(dev);
2235         struct i2c_client *client = data->client;
2236         int ix;
2237         u8 reg;
2238 
2239         /* Point to the right nominal voltages array */
2240         data->in_nominal = IN_NOMINAL(data->type);
2241 
2242         data->config = dme1737_read(data, DME1737_REG_CONFIG);
2243         /* Inform if part is not monitoring/started */
2244         if (!(data->config & 0x01)) {
2245                 if (!force_start) {
2246                         dev_err(dev,
2247                                 "Device is not monitoring. Use the force_start load parameter to override.\n");
2248                         return -EFAULT;
2249                 }
2250 
2251                 /* Force monitoring */
2252                 data->config |= 0x01;
2253                 dme1737_write(data, DME1737_REG_CONFIG, data->config);
2254         }
2255         /* Inform if part is not ready */
2256         if (!(data->config & 0x04)) {
2257                 dev_err(dev, "Device is not ready.\n");
2258                 return -EFAULT;
2259         }
2260 
2261         /*
2262          * Determine which optional fan and pwm features are enabled (only
2263          * valid for I2C devices)
2264          */
2265         if (client) {   /* I2C chip */
2266                 data->config2 = dme1737_read(data, DME1737_REG_CONFIG2);
2267                 /* Check if optional fan3 input is enabled */
2268                 if (data->config2 & 0x04)
2269                         data->has_features |= HAS_FAN(2);
2270 
2271                 /*
2272                  * Fan4 and pwm3 are only available if the client's I2C address
2273                  * is the default 0x2e. Otherwise the I/Os associated with
2274                  * these functions are used for addr enable/select.
2275                  */
2276                 if (client->addr == 0x2e)
2277                         data->has_features |= HAS_FAN(3) | HAS_PWM(2);
2278 
2279                 /*
2280                  * Determine which of the optional fan[5-6] and pwm[5-6]
2281                  * features are enabled. For this, we need to query the runtime
2282                  * registers through the Super-IO LPC interface. Try both
2283                  * config ports 0x2e and 0x4e.
2284                  */
2285                 if (dme1737_i2c_get_features(0x2e, data) &&
2286                     dme1737_i2c_get_features(0x4e, data)) {
2287                         dev_warn(dev,
2288                                  "Failed to query Super-IO for optional features.\n");
2289                 }
2290         }
2291 
2292         /* Fan[1-2] and pwm[1-2] are present in all chips */
2293         data->has_features |= HAS_FAN(0) | HAS_FAN(1) | HAS_PWM(0) | HAS_PWM(1);
2294 
2295         /* Chip-dependent features */
2296         switch (data->type) {
2297         case dme1737:
2298                 data->has_features |= HAS_TEMP_OFFSET | HAS_VID | HAS_ZONE3 |
2299                         HAS_ZONE_HYST | HAS_PWM_MIN;
2300                 break;
2301         case sch311x:
2302                 data->has_features |= HAS_TEMP_OFFSET | HAS_ZONE3 |
2303                         HAS_ZONE_HYST | HAS_PWM_MIN | HAS_FAN(2) | HAS_PWM(2);
2304                 break;
2305         case sch5027:
2306                 data->has_features |= HAS_ZONE3;
2307                 break;
2308         case sch5127:
2309                 data->has_features |= HAS_FAN(2) | HAS_PWM(2) | HAS_IN7;
2310                 break;
2311         default:
2312                 break;
2313         }
2314 
2315         dev_info(dev,
2316                  "Optional features: pwm3=%s, pwm5=%s, pwm6=%s, fan3=%s, fan4=%s, fan5=%s, fan6=%s.\n",
2317                  (data->has_features & HAS_PWM(2)) ? "yes" : "no",
2318                  (data->has_features & HAS_PWM(4)) ? "yes" : "no",
2319                  (data->has_features & HAS_PWM(5)) ? "yes" : "no",
2320                  (data->has_features & HAS_FAN(2)) ? "yes" : "no",
2321                  (data->has_features & HAS_FAN(3)) ? "yes" : "no",
2322                  (data->has_features & HAS_FAN(4)) ? "yes" : "no",
2323                  (data->has_features & HAS_FAN(5)) ? "yes" : "no");
2324 
2325         reg = dme1737_read(data, DME1737_REG_TACH_PWM);
2326         /* Inform if fan-to-pwm mapping differs from the default */
2327         if (client && reg != 0xa4) {   /* I2C chip */
2328                 dev_warn(dev,
2329                          "Non-standard fan to pwm mapping: fan1->pwm%d, fan2->pwm%d, fan3->pwm%d, fan4->pwm%d. %s\n",
2330                          (reg & 0x03) + 1, ((reg >> 2) & 0x03) + 1,
2331                          ((reg >> 4) & 0x03) + 1, ((reg >> 6) & 0x03) + 1,
2332                          DO_REPORT);
2333         } else if (!client && reg != 0x24) {   /* ISA chip */
2334                 dev_warn(dev,
2335                          "Non-standard fan to pwm mapping: fan1->pwm%d, fan2->pwm%d, fan3->pwm%d. %s\n",
2336                          (reg & 0x03) + 1, ((reg >> 2) & 0x03) + 1,
2337                          ((reg >> 4) & 0x03) + 1, DO_REPORT);
2338         }
2339 
2340         /*
2341          * Switch pwm[1-3] to manual mode if they are currently disabled and
2342          * set the duty-cycles to 0% (which is identical to the PWMs being
2343          * disabled).
2344          */
2345         if (!(data->config & 0x02)) {
2346                 for (ix = 0; ix < 3; ix++) {
2347                         data->pwm_config[ix] = dme1737_read(data,
2348                                                 DME1737_REG_PWM_CONFIG(ix));
2349                         if ((data->has_features & HAS_PWM(ix)) &&
2350                             (PWM_EN_FROM_REG(data->pwm_config[ix]) == -1)) {
2351                                 dev_info(dev,
2352                                          "Switching pwm%d to manual mode.\n",
2353                                          ix + 1);
2354                                 data->pwm_config[ix] = PWM_EN_TO_REG(1,
2355                                                         data->pwm_config[ix]);
2356                                 dme1737_write(data, DME1737_REG_PWM(ix), 0);
2357                                 dme1737_write(data,
2358                                               DME1737_REG_PWM_CONFIG(ix),
2359                                               data->pwm_config[ix]);
2360                         }
2361                 }
2362         }
2363 
2364         /* Initialize the default PWM auto channels zone (acz) assignments */
2365         data->pwm_acz[0] = 1;   /* pwm1 -> zone1 */
2366         data->pwm_acz[1] = 2;   /* pwm2 -> zone2 */
2367         data->pwm_acz[2] = 4;   /* pwm3 -> zone3 */
2368 
2369         /* Set VRM */
2370         if (data->has_features & HAS_VID)
2371                 data->vrm = vid_which_vrm();
2372 
2373         return 0;
2374 }
2375 
2376 /* ---------------------------------------------------------------------
2377  * I2C device detection and registration
2378  * --------------------------------------------------------------------- */
2379 
2380 static struct i2c_driver dme1737_i2c_driver;
2381 
2382 static int dme1737_i2c_get_features(int sio_cip, struct dme1737_data *data)
2383 {
2384         int err = 0, reg;
2385         u16 addr;
2386 
2387         dme1737_sio_enter(sio_cip);
2388 
2389         /*
2390          * Check device ID
2391          * We currently know about two kinds of DME1737 and SCH5027.
2392          */
2393         reg = force_id ? force_id : dme1737_sio_inb(sio_cip, 0x20);
2394         if (!(reg == DME1737_ID_1 || reg == DME1737_ID_2 ||
2395               reg == SCH5027_ID)) {
2396                 err = -ENODEV;
2397                 goto exit;
2398         }
2399 
2400         /* Select logical device A (runtime registers) */
2401         dme1737_sio_outb(sio_cip, 0x07, 0x0a);
2402 
2403         /* Get the base address of the runtime registers */
2404         addr = (dme1737_sio_inb(sio_cip, 0x60) << 8) |
2405                 dme1737_sio_inb(sio_cip, 0x61);
2406         if (!addr) {
2407                 err = -ENODEV;
2408                 goto exit;
2409         }
2410 
2411         /*
2412          * Read the runtime registers to determine which optional features
2413          * are enabled and available. Bits [3:2] of registers 0x43-0x46 are set
2414          * to '10' if the respective feature is enabled.
2415          */
2416         if ((inb(addr + 0x43) & 0x0c) == 0x08) /* fan6 */
2417                 data->has_features |= HAS_FAN(5);
2418         if ((inb(addr + 0x44) & 0x0c) == 0x08) /* pwm6 */
2419                 data->has_features |= HAS_PWM(5);
2420         if ((inb(addr + 0x45) & 0x0c) == 0x08) /* fan5 */
2421                 data->has_features |= HAS_FAN(4);
2422         if ((inb(addr + 0x46) & 0x0c) == 0x08) /* pwm5 */
2423                 data->has_features |= HAS_PWM(4);
2424 
2425 exit:
2426         dme1737_sio_exit(sio_cip);
2427 
2428         return err;
2429 }
2430 
2431 /* Return 0 if detection is successful, -ENODEV otherwise */
2432 static int dme1737_i2c_detect(struct i2c_client *client,
2433                               struct i2c_board_info *info)
2434 {
2435         struct i2c_adapter *adapter = client->adapter;
2436         struct device *dev = &adapter->dev;
2437         u8 company, verstep = 0;
2438         const char *name;
2439 
2440         if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
2441                 return -ENODEV;
2442 
2443         company = i2c_smbus_read_byte_data(client, DME1737_REG_COMPANY);
2444         verstep = i2c_smbus_read_byte_data(client, DME1737_REG_VERSTEP);
2445 
2446         if (company == DME1737_COMPANY_SMSC &&
2447             verstep == SCH5027_VERSTEP) {
2448                 name = "sch5027";
2449         } else if (company == DME1737_COMPANY_SMSC &&
2450                    (verstep & DME1737_VERSTEP_MASK) == DME1737_VERSTEP) {
2451                 name = "dme1737";
2452         } else {
2453                 return -ENODEV;
2454         }
2455 
2456         dev_info(dev, "Found a %s chip at 0x%02x (rev 0x%02x).\n",
2457                  verstep == SCH5027_VERSTEP ? "SCH5027" : "DME1737",
2458                  client->addr, verstep);
2459         strlcpy(info->type, name, I2C_NAME_SIZE);
2460 
2461         return 0;
2462 }
2463 
2464 static int dme1737_i2c_probe(struct i2c_client *client,
2465                              const struct i2c_device_id *id)
2466 {
2467         struct dme1737_data *data;
2468         struct device *dev = &client->dev;
2469         int err;
2470 
2471         data = devm_kzalloc(dev, sizeof(struct dme1737_data), GFP_KERNEL);
2472         if (!data)
2473                 return -ENOMEM;
2474 
2475         i2c_set_clientdata(client, data);
2476         data->type = id->driver_data;
2477         data->client = client;
2478         data->name = client->name;
2479         mutex_init(&data->update_lock);
2480 
2481         /* Initialize the DME1737 chip */
2482         err = dme1737_init_device(dev);
2483         if (err) {
2484                 dev_err(dev, "Failed to initialize device.\n");
2485                 return err;
2486         }
2487 
2488         /* Create sysfs files */
2489         err = dme1737_create_files(dev);
2490         if (err) {
2491                 dev_err(dev, "Failed to create sysfs files.\n");
2492                 return err;
2493         }
2494 
2495         /* Register device */
2496         data->hwmon_dev = hwmon_device_register(dev);
2497         if (IS_ERR(data->hwmon_dev)) {
2498                 dev_err(dev, "Failed to register device.\n");
2499                 err = PTR_ERR(data->hwmon_dev);
2500                 goto exit_remove;
2501         }
2502 
2503         return 0;
2504 
2505 exit_remove:
2506         dme1737_remove_files(dev);
2507         return err;
2508 }
2509 
2510 static int dme1737_i2c_remove(struct i2c_client *client)
2511 {
2512         struct dme1737_data *data = i2c_get_clientdata(client);
2513 
2514         hwmon_device_unregister(data->hwmon_dev);
2515         dme1737_remove_files(&client->dev);
2516 
2517         return 0;
2518 }
2519 
2520 static const struct i2c_device_id dme1737_id[] = {
2521         { "dme1737", dme1737 },
2522         { "sch5027", sch5027 },
2523         { }
2524 };
2525 MODULE_DEVICE_TABLE(i2c, dme1737_id);
2526 
2527 static struct i2c_driver dme1737_i2c_driver = {
2528         .class = I2C_CLASS_HWMON,
2529         .driver = {
2530                 .name = "dme1737",
2531         },
2532         .probe = dme1737_i2c_probe,
2533         .remove = dme1737_i2c_remove,
2534         .id_table = dme1737_id,
2535         .detect = dme1737_i2c_detect,
2536         .address_list = normal_i2c,
2537 };
2538 
2539 /* ---------------------------------------------------------------------
2540  * ISA device detection and registration
2541  * --------------------------------------------------------------------- */
2542 
2543 static int __init dme1737_isa_detect(int sio_cip, unsigned short *addr)
2544 {
2545         int err = 0, reg;
2546         unsigned short base_addr;
2547 
2548         dme1737_sio_enter(sio_cip);
2549 
2550         /*
2551          * Check device ID
2552          * We currently know about SCH3112, SCH3114, SCH3116, and SCH5127
2553          */
2554         reg = force_id ? force_id : dme1737_sio_inb(sio_cip, 0x20);
2555         if (!(reg == SCH3112_ID || reg == SCH3114_ID || reg == SCH3116_ID ||
2556               reg == SCH5127_ID)) {
2557                 err = -ENODEV;
2558                 goto exit;
2559         }
2560 
2561         /* Select logical device A (runtime registers) */
2562         dme1737_sio_outb(sio_cip, 0x07, 0x0a);
2563 
2564         /* Get the base address of the runtime registers */
2565         base_addr = (dme1737_sio_inb(sio_cip, 0x60) << 8) |
2566                      dme1737_sio_inb(sio_cip, 0x61);
2567         if (!base_addr) {
2568                 pr_err("Base address not set\n");
2569                 err = -ENODEV;
2570                 goto exit;
2571         }
2572 
2573         /*
2574          * Access to the hwmon registers is through an index/data register
2575          * pair located at offset 0x70/0x71.
2576          */
2577         *addr = base_addr + 0x70;
2578 
2579 exit:
2580         dme1737_sio_exit(sio_cip);
2581         return err;
2582 }
2583 
2584 static int __init dme1737_isa_device_add(unsigned short addr)
2585 {
2586         struct resource res = {
2587                 .start  = addr,
2588                 .end    = addr + DME1737_EXTENT - 1,
2589                 .name   = "dme1737",
2590                 .flags  = IORESOURCE_IO,
2591         };
2592         int err;
2593 
2594         err = acpi_check_resource_conflict(&res);
2595         if (err)
2596                 goto exit;
2597 
2598         pdev = platform_device_alloc("dme1737", addr);
2599         if (!pdev) {
2600                 pr_err("Failed to allocate device\n");
2601                 err = -ENOMEM;
2602                 goto exit;
2603         }
2604 
2605         err = platform_device_add_resources(pdev, &res, 1);
2606         if (err) {
2607                 pr_err("Failed to add device resource (err = %d)\n", err);
2608                 goto exit_device_put;
2609         }
2610 
2611         err = platform_device_add(pdev);
2612         if (err) {
2613                 pr_err("Failed to add device (err = %d)\n", err);
2614                 goto exit_device_put;
2615         }
2616 
2617         return 0;
2618 
2619 exit_device_put:
2620         platform_device_put(pdev);
2621         pdev = NULL;
2622 exit:
2623         return err;
2624 }
2625 
2626 static int dme1737_isa_probe(struct platform_device *pdev)
2627 {
2628         u8 company, device;
2629         struct resource *res;
2630         struct dme1737_data *data;
2631         struct device *dev = &pdev->dev;
2632         int err;
2633 
2634         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
2635         if (!devm_request_region(dev, res->start, DME1737_EXTENT, "dme1737")) {
2636                 dev_err(dev, "Failed to request region 0x%04x-0x%04x.\n",
2637                         (unsigned short)res->start,
2638                         (unsigned short)res->start + DME1737_EXTENT - 1);
2639                 return -EBUSY;
2640         }
2641 
2642         data = devm_kzalloc(dev, sizeof(struct dme1737_data), GFP_KERNEL);
2643         if (!data)
2644                 return -ENOMEM;
2645 
2646         data->addr = res->start;
2647         platform_set_drvdata(pdev, data);
2648 
2649         /* Skip chip detection if module is loaded with force_id parameter */
2650         switch (force_id) {
2651         case SCH3112_ID:
2652         case SCH3114_ID:
2653         case SCH3116_ID:
2654                 data->type = sch311x;
2655                 break;
2656         case SCH5127_ID:
2657                 data->type = sch5127;
2658                 break;
2659         default:
2660                 company = dme1737_read(data, DME1737_REG_COMPANY);
2661                 device = dme1737_read(data, DME1737_REG_DEVICE);
2662 
2663                 if ((company == DME1737_COMPANY_SMSC) &&
2664                     (device == SCH311X_DEVICE)) {
2665                         data->type = sch311x;
2666                 } else if ((company == DME1737_COMPANY_SMSC) &&
2667                            (device == SCH5127_DEVICE)) {
2668                         data->type = sch5127;
2669                 } else {
2670                         return -ENODEV;
2671                 }
2672         }
2673 
2674         if (data->type == sch5127)
2675                 data->name = "sch5127";
2676         else
2677                 data->name = "sch311x";
2678 
2679         /* Initialize the mutex */
2680         mutex_init(&data->update_lock);
2681 
2682         dev_info(dev, "Found a %s chip at 0x%04x\n",
2683                  data->type == sch5127 ? "SCH5127" : "SCH311x", data->addr);
2684 
2685         /* Initialize the chip */
2686         err = dme1737_init_device(dev);
2687         if (err) {
2688                 dev_err(dev, "Failed to initialize device.\n");
2689                 return err;
2690         }
2691 
2692         /* Create sysfs files */
2693         err = dme1737_create_files(dev);
2694         if (err) {
2695                 dev_err(dev, "Failed to create sysfs files.\n");
2696                 return err;
2697         }
2698 
2699         /* Register device */
2700         data->hwmon_dev = hwmon_device_register(dev);
2701         if (IS_ERR(data->hwmon_dev)) {
2702                 dev_err(dev, "Failed to register device.\n");
2703                 err = PTR_ERR(data->hwmon_dev);
2704                 goto exit_remove_files;
2705         }
2706 
2707         return 0;
2708 
2709 exit_remove_files:
2710         dme1737_remove_files(dev);
2711         return err;
2712 }
2713 
2714 static int dme1737_isa_remove(struct platform_device *pdev)
2715 {
2716         struct dme1737_data *data = platform_get_drvdata(pdev);
2717 
2718         hwmon_device_unregister(data->hwmon_dev);
2719         dme1737_remove_files(&pdev->dev);
2720 
2721         return 0;
2722 }
2723 
2724 static struct platform_driver dme1737_isa_driver = {
2725         .driver = {
2726                 .name = "dme1737",
2727         },
2728         .probe = dme1737_isa_probe,
2729         .remove = dme1737_isa_remove,
2730 };
2731 
2732 /* ---------------------------------------------------------------------
2733  * Module initialization and cleanup
2734  * --------------------------------------------------------------------- */
2735 
2736 static int __init dme1737_init(void)
2737 {
2738         int err;
2739         unsigned short addr;
2740 
2741         err = i2c_add_driver(&dme1737_i2c_driver);
2742         if (err)
2743                 goto exit;
2744 
2745         if (dme1737_isa_detect(0x2e, &addr) &&
2746             dme1737_isa_detect(0x4e, &addr) &&
2747             (!probe_all_addr ||
2748              (dme1737_isa_detect(0x162e, &addr) &&
2749               dme1737_isa_detect(0x164e, &addr)))) {
2750                 /* Return 0 if we didn't find an ISA device */
2751                 return 0;
2752         }
2753 
2754         err = platform_driver_register(&dme1737_isa_driver);
2755         if (err)
2756                 goto exit_del_i2c_driver;
2757 
2758         /* Sets global pdev as a side effect */
2759         err = dme1737_isa_device_add(addr);
2760         if (err)
2761                 goto exit_del_isa_driver;
2762 
2763         return 0;
2764 
2765 exit_del_isa_driver:
2766         platform_driver_unregister(&dme1737_isa_driver);
2767 exit_del_i2c_driver:
2768         i2c_del_driver(&dme1737_i2c_driver);
2769 exit:
2770         return err;
2771 }
2772 
2773 static void __exit dme1737_exit(void)
2774 {
2775         if (pdev) {
2776                 platform_device_unregister(pdev);
2777                 platform_driver_unregister(&dme1737_isa_driver);
2778         }
2779 
2780         i2c_del_driver(&dme1737_i2c_driver);
2781 }
2782 
2783 MODULE_AUTHOR("Juerg Haefliger <juergh@gmail.com>");
2784 MODULE_DESCRIPTION("DME1737 sensors");
2785 MODULE_LICENSE("GPL");
2786 
2787 module_init(dme1737_init);
2788 module_exit(dme1737_exit);

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