root/arch/mips/include/asm/netlogic/common.h

INCLUDED FROM

DEFINITIONS

1. nlm_get_boot_data
2. nlm_set_nmi_handler
3. nlm_irq_to_xirq
4. nlm_cores_per_node
5. nlm_threads_per_node
6. nlm_hwtid_to_node

   1 /*
   2  * Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights
   3  * reserved.
   4  *
   5  * This software is available to you under a choice of one of two
   6  * licenses.  You may choose to be licensed under the terms of the GNU
   7  * General Public License (GPL) Version 2, available from the file
   8  * COPYING in the main directory of this source tree, or the NetLogic
   9  * license below:
  10  *
  11  * Redistribution and use in source and binary forms, with or without
  12  * modification, are permitted provided that the following conditions
  13  * are met:
  14  *
  15  * 1. Redistributions of source code must retain the above copyright
  16  *    notice, this list of conditions and the following disclaimer.
  17  * 2. Redistributions in binary form must reproduce the above copyright
  18  *    notice, this list of conditions and the following disclaimer in
  19  *    the documentation and/or other materials provided with the
  20  *    distribution.
  21  *
  22  * THIS SOFTWARE IS PROVIDED BY NETLOGIC ``AS IS'' AND ANY EXPRESS OR
  23  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  24  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  25  * ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE LIABLE
  26  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  27  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  28  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
  29  * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
  30  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
  31  * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
  32  * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  33  */
  34 
  35 #ifndef _NETLOGIC_COMMON_H_
  36 #define _NETLOGIC_COMMON_H_
  37 
  38 /*
  39  * Common SMP definitions
  40  */
  41 #define RESET_VEC_PHYS          0x1fc00000
  42 #define RESET_VEC_SIZE          8192            /* 8KB reset code and data */
  43 #define RESET_DATA_PHYS         (RESET_VEC_PHYS + (1<<10))
  44 
  45 /* Offsets of parameters in the RESET_DATA_PHYS area */
  46 #define BOOT_THREAD_MODE        0
  47 #define BOOT_NMI_LOCK           4
  48 #define BOOT_NMI_HANDLER        8
  49 
  50 /* CPU ready flags for each CPU */
  51 #define BOOT_CPU_READY          2048
  52 
  53 #ifndef __ASSEMBLY__
  54 #include <linux/cpumask.h>
  55 #include <linux/spinlock.h>
  56 #include <asm/irq.h>
  57 #include <asm/mach-netlogic/multi-node.h>
  58 
  59 struct irq_desc;
  60 void nlm_smp_function_ipi_handler(struct irq_desc *desc);
  61 void nlm_smp_resched_ipi_handler(struct irq_desc *desc);
  62 void nlm_smp_irq_init(int hwcpuid);
  63 void nlm_boot_secondary_cpus(void);
  64 int nlm_wakeup_secondary_cpus(void);
  65 void nlm_rmiboot_preboot(void);
  66 void nlm_percpu_init(int hwcpuid);
  67 
  68 static inline void *
  69 nlm_get_boot_data(int offset)
  70 {
  71         return (void *)(CKSEG1ADDR(RESET_DATA_PHYS) + offset);
  72 }
  73 
  74 static inline void
  75 nlm_set_nmi_handler(void *handler)
  76 {
  77         void *nmih = nlm_get_boot_data(BOOT_NMI_HANDLER);
  78 
  79         *(int64_t *)nmih = (long)handler;
  80 }
  81 
  82 /*
  83  * Misc.
  84  */
  85 void nlm_init_boot_cpu(void);
  86 unsigned int nlm_get_cpu_frequency(void);
  87 extern const struct plat_smp_ops nlm_smp_ops;
  88 extern char nlm_reset_entry[], nlm_reset_entry_end[];
  89 
  90 extern unsigned int nlm_threads_per_core;
  91 extern cpumask_t nlm_cpumask;
  92 
  93 struct irq_data;
  94 uint64_t nlm_pci_irqmask(int node);
  95 void nlm_setup_pic_irq(int node, int picirq, int irq, int irt);
  96 void nlm_set_pic_extra_ack(int node, int irq,  void (*xack)(struct irq_data *));
  97 
  98 #ifdef CONFIG_PCI_MSI
  99 void nlm_dispatch_msi(int node, int lirq);
 100 void nlm_dispatch_msix(int node, int msixirq);
 101 #endif
 102 
 103 /*
 104  * The NR_IRQs is divided between nodes, each of them has a separate irq space
 105  */
 106 static inline int nlm_irq_to_xirq(int node, int irq)
 107 {
 108         return node * NR_IRQS / NLM_NR_NODES + irq;
 109 }
 110 
 111 #ifdef CONFIG_CPU_XLR
 112 #define nlm_cores_per_node()    8
 113 #else
 114 static inline int nlm_cores_per_node(void)
 115 {
 116         return ((read_c0_prid() & PRID_IMP_MASK)
 117                                 == PRID_IMP_NETLOGIC_XLP9XX) ? 32 : 8;
 118 }
 119 #endif
 120 static inline int nlm_threads_per_node(void)
 121 {
 122         return nlm_cores_per_node() * NLM_THREADS_PER_CORE;
 123 }
 124 
 125 static inline int nlm_hwtid_to_node(int hwtid)
 126 {
 127         return hwtid / nlm_threads_per_node();
 128 }
 129 
 130 extern int nlm_cpu_ready[];
 131 #endif /* __ASSEMBLY__ */
 132 #endif /* _NETLOGIC_COMMON_H_ */