root/arch/mips/jz4740/setup.c

DEFINITIONS

1. jz4740_detect_mem
2. get_board_mach_type
3. plat_mem_setup
4. device_tree_init
5. get_system_type
6. arch_init_irq

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  *  Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
   4  *  Copyright (C) 2011, Maarten ter Huurne <maarten@treewalker.org>
   5  *  JZ4740 setup code
   6  */
   7 
   8 #include <linux/init.h>
   9 #include <linux/io.h>
  10 #include <linux/irqchip.h>
  11 #include <linux/kernel.h>
  12 #include <linux/libfdt.h>
  13 #include <linux/of_fdt.h>
  14 
  15 #include <asm/bootinfo.h>
  16 #include <asm/prom.h>
  17 
  18 #include "reset.h"
  19 
  20 #define JZ4740_EMC_BASE_ADDR 0x13010000
  21 
  22 #define JZ4740_EMC_SDRAM_CTRL 0x80
  23 
  24 static void __init jz4740_detect_mem(void)
  25 {
  26         void __iomem *jz_emc_base;
  27         u32 ctrl, bus, bank, rows, cols;
  28         phys_addr_t size;
  29 
  30         jz_emc_base = ioremap(JZ4740_EMC_BASE_ADDR, 0x100);
  31         ctrl = readl(jz_emc_base + JZ4740_EMC_SDRAM_CTRL);
  32         bus = 2 - ((ctrl >> 31) & 1);
  33         bank = 1 + ((ctrl >> 19) & 1);
  34         cols = 8 + ((ctrl >> 26) & 7);
  35         rows = 11 + ((ctrl >> 20) & 3);
  36         printk(KERN_DEBUG
  37                 "SDRAM preconfigured: bus:%u bank:%u rows:%u cols:%u\n",
  38                 bus, bank, rows, cols);
  39         iounmap(jz_emc_base);
  40 
  41         size = 1 << (bus + bank + cols + rows);
  42         add_memory_region(0, size, BOOT_MEM_RAM);
  43 }
  44 
  45 static unsigned long __init get_board_mach_type(const void *fdt)
  46 {
  47         if (!fdt_node_check_compatible(fdt, 0, "ingenic,x1000"))
  48                 return MACH_INGENIC_X1000;
  49         if (!fdt_node_check_compatible(fdt, 0, "ingenic,jz4780"))
  50                 return MACH_INGENIC_JZ4780;
  51         if (!fdt_node_check_compatible(fdt, 0, "ingenic,jz4770"))
  52                 return MACH_INGENIC_JZ4770;
  53 
  54         return MACH_INGENIC_JZ4740;
  55 }
  56 
  57 void __init plat_mem_setup(void)
  58 {
  59         int offset;
  60         void *dtb;
  61 
  62         jz4740_reset_init();
  63 
  64         if (__dtb_start != __dtb_end)
  65                 dtb = __dtb_start;
  66         else
  67                 dtb = (void *)fw_passed_dtb;
  68 
  69         __dt_setup_arch(dtb);
  70 
  71         offset = fdt_path_offset(dtb, "/memory");
  72         if (offset < 0)
  73                 jz4740_detect_mem();
  74 
  75         mips_machtype = get_board_mach_type(dtb);
  76 }
  77 
  78 void __init device_tree_init(void)
  79 {
  80         if (!initial_boot_params)
  81                 return;
  82 
  83         unflatten_and_copy_device_tree();
  84 }
  85 
  86 const char *get_system_type(void)
  87 {
  88         switch (mips_machtype) {
  89         case MACH_INGENIC_X1000:
  90                 return "X1000";
  91         case MACH_INGENIC_JZ4780:
  92                 return "JZ4780";
  93         case MACH_INGENIC_JZ4770:
  94                 return "JZ4770";
  95         default:
  96                 return "JZ4740";
  97         }
  98 }
  99 
 100 void __init arch_init_irq(void)
 101 {
 102         irqchip_init();
 103 }