This source file includes following definitions.
- __cvmx_helper_spi_enumerate
- __cvmx_helper_spi_probe
- __cvmx_helper_spi_enable
- __cvmx_helper_spi_link_get
- __cvmx_helper_spi_link_set
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32 #include <asm/octeon/octeon.h>
33
34 #include <asm/octeon/cvmx-config.h>
35 #include <asm/octeon/cvmx-spi.h>
36 #include <asm/octeon/cvmx-helper.h>
37
38 #include <asm/octeon/cvmx-pip-defs.h>
39 #include <asm/octeon/cvmx-pko-defs.h>
40 #include <asm/octeon/cvmx-spxx-defs.h>
41 #include <asm/octeon/cvmx-stxx-defs.h>
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47
48 #ifndef CVMX_HELPER_SPI_TIMEOUT
49 #define CVMX_HELPER_SPI_TIMEOUT 10
50 #endif
51
52 int __cvmx_helper_spi_enumerate(int interface)
53 {
54 if ((cvmx_sysinfo_get()->board_type != CVMX_BOARD_TYPE_SIM) &&
55 cvmx_spi4000_is_present(interface)) {
56 return 10;
57 } else {
58 return 16;
59 }
60 }
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70
71 int __cvmx_helper_spi_probe(int interface)
72 {
73 int num_ports = 0;
74
75 if ((cvmx_sysinfo_get()->board_type != CVMX_BOARD_TYPE_SIM) &&
76 cvmx_spi4000_is_present(interface)) {
77 num_ports = 10;
78 } else {
79 union cvmx_pko_reg_crc_enable enable;
80 num_ports = 16;
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87 enable.u64 = cvmx_read_csr(CVMX_PKO_REG_CRC_ENABLE);
88 enable.s.enable |= 0xffff << (interface * 16);
89 cvmx_write_csr(CVMX_PKO_REG_CRC_ENABLE, enable.u64);
90 }
91 __cvmx_helper_setup_gmx(interface, num_ports);
92 return num_ports;
93 }
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104 int __cvmx_helper_spi_enable(int interface)
105 {
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111 int num_ports = cvmx_helper_ports_on_interface(interface);
112 int ipd_port;
113 for (ipd_port = interface * 16; ipd_port < interface * 16 + num_ports;
114 ipd_port++) {
115 union cvmx_pip_prt_cfgx port_config;
116 port_config.u64 = cvmx_read_csr(CVMX_PIP_PRT_CFGX(ipd_port));
117 port_config.s.crc_en = 1;
118 cvmx_write_csr(CVMX_PIP_PRT_CFGX(ipd_port), port_config.u64);
119 }
120
121 if (cvmx_sysinfo_get()->board_type != CVMX_BOARD_TYPE_SIM) {
122 cvmx_spi_start_interface(interface, CVMX_SPI_MODE_DUPLEX,
123 CVMX_HELPER_SPI_TIMEOUT, num_ports);
124 if (cvmx_spi4000_is_present(interface))
125 cvmx_spi4000_initialize(interface);
126 }
127 __cvmx_interrupt_spxx_int_msk_enable(interface);
128 __cvmx_interrupt_stxx_int_msk_enable(interface);
129 __cvmx_interrupt_gmxx_enable(interface);
130 return 0;
131 }
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143 cvmx_helper_link_info_t __cvmx_helper_spi_link_get(int ipd_port)
144 {
145 cvmx_helper_link_info_t result;
146 int interface = cvmx_helper_get_interface_num(ipd_port);
147 int index = cvmx_helper_get_interface_index_num(ipd_port);
148 result.u64 = 0;
149
150 if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_SIM) {
151
152 result.s.link_up = 1;
153 result.s.full_duplex = 1;
154 result.s.speed = 10000;
155 } else if (cvmx_spi4000_is_present(interface)) {
156 union cvmx_gmxx_rxx_rx_inbnd inband =
157 cvmx_spi4000_check_speed(interface, index);
158 result.s.link_up = inband.s.status;
159 result.s.full_duplex = inband.s.duplex;
160 switch (inband.s.speed) {
161 case 0:
162 result.s.speed = 10;
163 break;
164 case 1:
165 result.s.speed = 100;
166 break;
167 case 2:
168 result.s.speed = 1000;
169 break;
170 case 3:
171 result.s.speed = 0;
172 result.s.link_up = 0;
173 break;
174 }
175 } else {
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178 result.s.link_up = 1;
179 result.s.full_duplex = 1;
180 result.s.speed = 10000;
181 }
182 return result;
183 }
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196 int __cvmx_helper_spi_link_set(int ipd_port, cvmx_helper_link_info_t link_info)
197 {
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200
201 return 0;
202 }