This source file includes following definitions.
- emma2rh_pci_init
- emma2rh_pci_setup
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10 #include <linux/kernel.h>
11 #include <linux/init.h>
12 #include <linux/types.h>
13 #include <linux/pci.h>
14
15 #include <asm/bootinfo.h>
16
17 #include <asm/emma/emma2rh.h>
18
19 static struct resource pci_io_resource = {
20 .name = "pci IO space",
21 .start = EMMA2RH_PCI_IO_BASE,
22 .end = EMMA2RH_PCI_IO_BASE + EMMA2RH_PCI_IO_SIZE - 1,
23 .flags = IORESOURCE_IO,
24 };
25
26 static struct resource pci_mem_resource = {
27 .name = "pci memory space",
28 .start = EMMA2RH_PCI_MEM_BASE,
29 .end = EMMA2RH_PCI_MEM_BASE + EMMA2RH_PCI_MEM_SIZE - 1,
30 .flags = IORESOURCE_MEM,
31 };
32
33 extern struct pci_ops emma2rh_pci_ops;
34
35 static struct pci_controller emma2rh_pci_controller = {
36 .pci_ops = &emma2rh_pci_ops,
37 .mem_resource = &pci_mem_resource,
38 .io_resource = &pci_io_resource,
39 .mem_offset = -0x04000000,
40 .io_offset = 0,
41 };
42
43 static void __init emma2rh_pci_init(void)
44 {
45
46 emma2rh_out32(EMMA2RH_PCI_ARBIT_CTR, 0x70f);
47
48 emma2rh_out32(EMMA2RH_PCI_IWIN0_CTR, 0x80000a18);
49 emma2rh_out32(EMMA2RH_PCI_CONFIG_BASE + PCI_COMMAND,
50 PCI_STATUS_DEVSEL_MEDIUM | PCI_STATUS_CAP_LIST |
51 PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
52 emma2rh_out32(EMMA2RH_PCI_CONFIG_BASE + PCI_BASE_ADDRESS_0, 0x10000000);
53 emma2rh_out32(EMMA2RH_PCI_CONFIG_BASE + PCI_BASE_ADDRESS_1, 0x00000000);
54
55 emma2rh_out32(EMMA2RH_PCI_IWIN0_CTR, 0x12000000 | 0x218);
56 emma2rh_out32(EMMA2RH_PCI_IWIN1_CTR, 0x18000000 | 0x600);
57 emma2rh_out32(EMMA2RH_PCI_INIT_ESWP, 0x00000200);
58
59 emma2rh_out32(EMMA2RH_PCI_TWIN_CTR, 0x00009200);
60 emma2rh_out32(EMMA2RH_PCI_TWIN_BADR, 0x00000000);
61 emma2rh_out32(EMMA2RH_PCI_TWIN0_DADR, 0x00000000);
62 emma2rh_out32(EMMA2RH_PCI_TWIN1_DADR, 0x00000000);
63 }
64
65 static int __init emma2rh_pci_setup(void)
66 {
67 emma2rh_pci_init();
68 register_pci_controller(&emma2rh_pci_controller);
69 return 0;
70 }
71
72 arch_initcall(emma2rh_pci_setup);