root/arch/mips/pci/ops-emma2rh.c

DEFINITIONS

1. check_args
2. set_pci_configuration_address
3. pci_config_read
4. pci_config_write

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  *  Copyright (C) NEC Electronics Corporation 2004-2006
   4  *
   5  *  This file is based on the arch/mips/pci/ops-vr41xx.c
   6  *
   7  *      Copyright 2001 MontaVista Software Inc.
   8  */
   9 
  10 #include <linux/pci.h>
  11 #include <linux/kernel.h>
  12 #include <linux/types.h>
  13 
  14 #include <asm/addrspace.h>
  15 
  16 #include <asm/emma/emma2rh.h>
  17 
  18 #define RTABORT (0x1<<9)
  19 #define RMABORT (0x1<<10)
  20 #define EMMA2RH_PCI_SLOT_NUM 9  /* 0000:09.0 is final PCI device */
  21 
  22 /*
  23  * access config space
  24  */
  25 
  26 static int check_args(struct pci_bus *bus, u32 devfn, u32 * bus_num)
  27 {
  28         /* check if the bus is top-level */
  29         if (bus->parent != NULL)
  30                 *bus_num = bus->number;
  31         else
  32                 *bus_num = 0;
  33 
  34         if (*bus_num == 0) {
  35                 /* Type 0 */
  36                 if (PCI_SLOT(devfn) >= 10)
  37                         return PCIBIOS_DEVICE_NOT_FOUND;
  38         } else {
  39                 /* Type 1 */
  40                 if ((*bus_num >= 64) || (PCI_SLOT(devfn) >= 16))
  41                         return PCIBIOS_DEVICE_NOT_FOUND;
  42         }
  43         return 0;
  44 }
  45 
  46 static inline int set_pci_configuration_address(unsigned char bus_num,
  47                                                 unsigned int devfn, int where)
  48 {
  49         u32 config_win0;
  50 
  51         emma2rh_out32(EMMA2RH_PCI_INT, ~RMABORT);
  52         if (bus_num == 0)
  53                 /*
  54                  * Type 0 configuration
  55                  */
  56                 config_win0 = (1 << (22 + PCI_SLOT(devfn))) | (5 << 9);
  57         else
  58                 /*
  59                  * Type 1 configuration
  60                  */
  61                 config_win0 = (bus_num << 26) | (PCI_SLOT(devfn) << 22) |
  62                     (1 << 15) | (5 << 9);
  63 
  64         emma2rh_out32(EMMA2RH_PCI_IWIN0_CTR, config_win0);
  65 
  66         return 0;
  67 }
  68 
  69 static int pci_config_read(struct pci_bus *bus, unsigned int devfn, int where,
  70                            int size, uint32_t * val)
  71 {
  72         u32 bus_num;
  73         u32 base = KSEG1ADDR(EMMA2RH_PCI_CONFIG_BASE);
  74         u32 backup_win0;
  75         u32 data;
  76 
  77         *val = 0xffffffffU;
  78 
  79         if (check_args(bus, devfn, &bus_num) == PCIBIOS_DEVICE_NOT_FOUND)
  80                 return PCIBIOS_DEVICE_NOT_FOUND;
  81 
  82         backup_win0 = emma2rh_in32(EMMA2RH_PCI_IWIN0_CTR);
  83 
  84         if (set_pci_configuration_address(bus_num, devfn, where) < 0)
  85                 return PCIBIOS_DEVICE_NOT_FOUND;
  86 
  87         data =
  88             *(volatile u32 *)(base + (PCI_FUNC(devfn) << 8) +
  89                               (where & 0xfffffffc));
  90 
  91         switch (size) {
  92         case 1:
  93                 *val = (data >> ((where & 3) << 3)) & 0xffU;
  94                 break;
  95         case 2:
  96                 *val = (data >> ((where & 2) << 3)) & 0xffffU;
  97                 break;
  98         case 4:
  99                 *val = data;
 100                 break;
 101         default:
 102                 emma2rh_out32(EMMA2RH_PCI_IWIN0_CTR, backup_win0);
 103                 return PCIBIOS_FUNC_NOT_SUPPORTED;
 104         }
 105 
 106         emma2rh_out32(EMMA2RH_PCI_IWIN0_CTR, backup_win0);
 107 
 108         if (emma2rh_in32(EMMA2RH_PCI_INT) & RMABORT)
 109                 return PCIBIOS_DEVICE_NOT_FOUND;
 110 
 111         return PCIBIOS_SUCCESSFUL;
 112 }
 113 
 114 static int pci_config_write(struct pci_bus *bus, unsigned int devfn, int where,
 115                             int size, u32 val)
 116 {
 117         u32 bus_num;
 118         u32 base = KSEG1ADDR(EMMA2RH_PCI_CONFIG_BASE);
 119         u32 backup_win0;
 120         u32 data;
 121         int shift;
 122 
 123         if (check_args(bus, devfn, &bus_num) == PCIBIOS_DEVICE_NOT_FOUND)
 124                 return PCIBIOS_DEVICE_NOT_FOUND;
 125 
 126         backup_win0 = emma2rh_in32(EMMA2RH_PCI_IWIN0_CTR);
 127 
 128         if (set_pci_configuration_address(bus_num, devfn, where) < 0)
 129                 return PCIBIOS_DEVICE_NOT_FOUND;
 130 
 131         /* read modify write */
 132         data =
 133             *(volatile u32 *)(base + (PCI_FUNC(devfn) << 8) +
 134                               (where & 0xfffffffc));
 135 
 136         switch (size) {
 137         case 1:
 138                 shift = (where & 3) << 3;
 139                 data &= ~(0xffU << shift);
 140                 data |= ((val & 0xffU) << shift);
 141                 break;
 142         case 2:
 143                 shift = (where & 2) << 3;
 144                 data &= ~(0xffffU << shift);
 145                 data |= ((val & 0xffffU) << shift);
 146                 break;
 147         case 4:
 148                 data = val;
 149                 break;
 150         default:
 151                 emma2rh_out32(EMMA2RH_PCI_IWIN0_CTR, backup_win0);
 152                 return PCIBIOS_FUNC_NOT_SUPPORTED;
 153         }
 154         *(volatile u32 *)(base + (PCI_FUNC(devfn) << 8) +
 155                           (where & 0xfffffffc)) = data;
 156 
 157         emma2rh_out32(EMMA2RH_PCI_IWIN0_CTR, backup_win0);
 158         if (emma2rh_in32(EMMA2RH_PCI_INT) & RMABORT)
 159                 return PCIBIOS_DEVICE_NOT_FOUND;
 160 
 161         return PCIBIOS_SUCCESSFUL;
 162 }
 163 
 164 struct pci_ops emma2rh_pci_ops = {
 165         .read = pci_config_read,
 166         .write = pci_config_write,
 167 };