1 /* SPDX-License-Identifier: GPL-2.0 */
2 #include <asm/asm-offsets.h>
3 #include <asm/thread_info.h>
4
5 #define PAGE_SIZE _PAGE_SIZE
6
7 /*
8 * Put .bss..swapper_pg_dir as the first thing in .bss. This will
9 * ensure that it has .bss alignment (64K).
10 */
11 #define BSS_FIRST_SECTIONS *(.bss..swapper_pg_dir)
12
13 #include <asm-generic/vmlinux.lds.h>
14
15 #undef mips
16 #define mips mips
17 OUTPUT_ARCH(mips)
18 ENTRY(kernel_entry)
19 PHDRS {
20 text PT_LOAD FLAGS(7); /* RWX */
21 #ifndef CONFIG_CAVIUM_OCTEON_SOC
22 note PT_NOTE FLAGS(4); /* R__ */
23 #endif /* CAVIUM_OCTEON_SOC */
24 }
25
26 #ifdef CONFIG_32BIT
27 #ifdef CONFIG_CPU_LITTLE_ENDIAN
28 jiffies = jiffies_64;
29 #else
30 jiffies = jiffies_64 + 4;
31 #endif
32 #else
33 jiffies = jiffies_64;
34 #endif
35
36 SECTIONS
37 {
38 #ifdef CONFIG_BOOT_ELF64
39 /* Read-only sections, merged into text segment: */
40 /* . = 0xc000000000000000; */
41
42 /* This is the value for an Origin kernel, taken from an IRIX kernel. */
43 /* . = 0xc00000000001c000; */
44
45 /* Set the vaddr for the text segment to a value
46 * >= 0xa800 0000 0001 9000 if no symmon is going to configured
47 * >= 0xa800 0000 0030 0000 otherwise
48 */
49
50 /* . = 0xa800000000300000; */
51 . = 0xffffffff80300000;
52 #endif
53 . = VMLINUX_LOAD_ADDRESS;
54 /* read-only */
55 _text = .; /* Text and read-only data */
56 .text : {
57 TEXT_TEXT
58 SCHED_TEXT
59 CPUIDLE_TEXT
60 LOCK_TEXT
61 KPROBES_TEXT
62 IRQENTRY_TEXT
63 SOFTIRQENTRY_TEXT
64 *(.text.*)
65 *(.fixup)
66 *(.gnu.warning)
67 } :text = 0
68 _etext = .; /* End of text section */
69
70 EXCEPTION_TABLE(16)
71
72 /* Exception table for data bus errors */
73 __dbe_table : {
74 __start___dbe_table = .;
75 KEEP(*(__dbe_table))
76 __stop___dbe_table = .;
77 }
78
79 #ifdef CONFIG_CAVIUM_OCTEON_SOC
80 #define NOTES_HEADER
81 #else /* CONFIG_CAVIUM_OCTEON_SOC */
82 #define NOTES_HEADER :note
83 #endif /* CONFIG_CAVIUM_OCTEON_SOC */
84 NOTES :text NOTES_HEADER
85 .dummy : { *(.dummy) } :text
86
87 _sdata = .; /* Start of data section */
88 RODATA
89
90 /* writeable */
91 .data : { /* Data */
92 . = . + DATAOFFSET; /* for CONFIG_MAPPED_KERNEL */
93
94 INIT_TASK_DATA(THREAD_SIZE)
95 NOSAVE_DATA
96 CACHELINE_ALIGNED_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
97 READ_MOSTLY_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
98 DATA_DATA
99 CONSTRUCTORS
100 }
101 BUG_TABLE
102 _gp = . + 0x8000;
103 .lit8 : {
104 *(.lit8)
105 }
106 .lit4 : {
107 *(.lit4)
108 }
109 /* We want the small data sections together, so single-instruction offsets
110 can access them all, and initialized data all before uninitialized, so
111 we can shorten the on-disk segment size. */
112 .sdata : {
113 *(.sdata)
114 }
115 _edata = .; /* End of data section */
116
117 /* will be freed after init */
118 . = ALIGN(PAGE_SIZE); /* Init code and data */
119 __init_begin = .;
120 INIT_TEXT_SECTION(PAGE_SIZE)
121 INIT_DATA_SECTION(16)
122
123 . = ALIGN(4);
124 .mips.machines.init : AT(ADDR(.mips.machines.init) - LOAD_OFFSET) {
125 __mips_machines_start = .;
126 KEEP(*(.mips.machines.init))
127 __mips_machines_end = .;
128 }
129
130 /* .exit.text is discarded at runtime, not link time, to deal with
131 * references from .rodata
132 */
133 .exit.text : {
134 EXIT_TEXT
135 }
136 .exit.data : {
137 EXIT_DATA
138 }
139 #ifdef CONFIG_SMP
140 PERCPU_SECTION(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
141 #endif
142
143 #ifdef CONFIG_MIPS_ELF_APPENDED_DTB
144 .appended_dtb : AT(ADDR(.appended_dtb) - LOAD_OFFSET) {
145 *(.appended_dtb)
146 KEEP(*(.appended_dtb))
147 }
148 #endif
149
150 #ifdef CONFIG_RELOCATABLE
151 . = ALIGN(4);
152
153 .data.reloc : {
154 _relocation_start = .;
155 /*
156 * Space for relocation table
157 * This needs to be filled so that the
158 * relocs tool can overwrite the content.
159 * An invalid value is left at the start of the
160 * section to abort relocation if the table
161 * has not been filled in.
162 */
163 LONG(0xFFFFFFFF);
164 FILL(0);
165 . += CONFIG_RELOCATION_TABLE_SIZE - 4;
166 _relocation_end = .;
167 }
168 #endif
169
170 #ifdef CONFIG_MIPS_RAW_APPENDED_DTB
171 __appended_dtb = .;
172 /* leave space for appended DTB */
173 . += 0x100000;
174 #endif
175 /*
176 * Align to 64K in attempt to eliminate holes before the
177 * .bss..swapper_pg_dir section at the start of .bss. This
178 * also satisfies PAGE_SIZE alignment as the largest page size
179 * allowed is 64K.
180 */
181 . = ALIGN(0x10000);
182 __init_end = .;
183 /* freed after init ends here */
184
185 /*
186 * Force .bss to 64K alignment so that .bss..swapper_pg_dir
187 * gets that alignment. .sbss should be empty, so there will be
188 * no holes after __init_end. */
189 BSS_SECTION(0, 0x10000, 8)
190
191 _end = . ;
192
193 /* These mark the ABI of the kernel for debuggers. */
194 .mdebug.abi32 : {
195 KEEP(*(.mdebug.abi32))
196 }
197 .mdebug.abi64 : {
198 KEEP(*(.mdebug.abi64))
199 }
200
201 /* This is the MIPS specific mdebug section. */
202 .mdebug : {
203 *(.mdebug)
204 }
205
206 STABS_DEBUG
207 DWARF_DEBUG
208
209 /* These must appear regardless of . */
210 .gptab.sdata : {
211 *(.gptab.data)
212 *(.gptab.sdata)
213 }
214 .gptab.sbss : {
215 *(.gptab.bss)
216 *(.gptab.sbss)
217 }
218
219 /* Sections to be discarded */
220 DISCARDS
221 /DISCARD/ : {
222 /* ABI crap starts here */
223 *(.MIPS.abiflags)
224 *(.MIPS.options)
225 *(.options)
226 *(.pdr)
227 *(.reginfo)
228 *(.eh_frame)
229 }
230 }