root/arch/mips/alchemy/board-xxs1500.c

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DEFINITIONS

This source file includes following definitions.
  1. get_system_type
  2. prom_init
  3. prom_putchar
  4. xxs1500_reset
  5. xxs1500_power_off
  6. board_setup
  7. xxs1500_dev_init

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * BRIEF MODULE DESCRIPTION
   4  *      MyCable XXS1500 board support
   5  *
   6  * Copyright 2003, 2008 MontaVista Software Inc.
   7  * Author: MontaVista Software, Inc. <source@mvista.com>
   8  */
   9 
  10 #include <linux/kernel.h>
  11 #include <linux/init.h>
  12 #include <linux/interrupt.h>
  13 #include <linux/platform_device.h>
  14 #include <linux/gpio.h>
  15 #include <linux/delay.h>
  16 #include <linux/pm.h>
  17 #include <asm/bootinfo.h>
  18 #include <asm/reboot.h>
  19 #include <asm/setup.h>
  20 #include <asm/mach-au1x00/au1000.h>
  21 #include <prom.h>
  22 
  23 const char *get_system_type(void)
  24 {
  25         return "XXS1500";
  26 }
  27 
  28 void __init prom_init(void)
  29 {
  30         unsigned char *memsize_str;
  31         unsigned long memsize;
  32 
  33         prom_argc = fw_arg0;
  34         prom_argv = (char **)fw_arg1;
  35         prom_envp = (char **)fw_arg2;
  36 
  37         prom_init_cmdline();
  38 
  39         memsize_str = prom_getenv("memsize");
  40         if (!memsize_str || kstrtoul(memsize_str, 0, &memsize))
  41                 memsize = 0x04000000;
  42 
  43         add_memory_region(0, memsize, BOOT_MEM_RAM);
  44 }
  45 
  46 void prom_putchar(char c)
  47 {
  48         alchemy_uart_putchar(AU1000_UART0_PHYS_ADDR, c);
  49 }
  50 
  51 static void xxs1500_reset(char *c)
  52 {
  53         /* Jump to the reset vector */
  54         __asm__ __volatile__("jr\t%0" : : "r"(0xbfc00000));
  55 }
  56 
  57 static void xxs1500_power_off(void)
  58 {
  59         while (1)
  60                 asm volatile (
  61                 "       .set    mips32                                  \n"
  62                 "       wait                                            \n"
  63                 "       .set    mips0                                   \n");
  64 }
  65 
  66 void __init board_setup(void)
  67 {
  68         u32 pin_func;
  69 
  70         pm_power_off = xxs1500_power_off;
  71         _machine_halt = xxs1500_power_off;
  72         _machine_restart = xxs1500_reset;
  73 
  74         alchemy_gpio1_input_enable();
  75         alchemy_gpio2_enable();
  76 
  77         /* Set multiple use pins (UART3/GPIO) to UART (it's used as UART too) */
  78         pin_func  = alchemy_rdsys(AU1000_SYS_PINFUNC) & ~SYS_PF_UR3;
  79         pin_func |= SYS_PF_UR3;
  80         alchemy_wrsys(pin_func, AU1000_SYS_PINFUNC);
  81 
  82         /* Enable UART */
  83         alchemy_uart_enable(AU1000_UART3_PHYS_ADDR);
  84         /* Enable DTR (MCR bit 0) = USB power up */
  85         __raw_writel(1, (void __iomem *)KSEG1ADDR(AU1000_UART3_PHYS_ADDR + 0x18));
  86         wmb();
  87 }
  88 
  89 /******************************************************************************/
  90 
  91 static struct resource xxs1500_pcmcia_res[] = {
  92         {
  93                 .name   = "pcmcia-io",
  94                 .flags  = IORESOURCE_MEM,
  95                 .start  = AU1000_PCMCIA_IO_PHYS_ADDR,
  96                 .end    = AU1000_PCMCIA_IO_PHYS_ADDR + 0x000400000 - 1,
  97         },
  98         {
  99                 .name   = "pcmcia-attr",
 100                 .flags  = IORESOURCE_MEM,
 101                 .start  = AU1000_PCMCIA_ATTR_PHYS_ADDR,
 102                 .end    = AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1,
 103         },
 104         {
 105                 .name   = "pcmcia-mem",
 106                 .flags  = IORESOURCE_MEM,
 107                 .start  = AU1000_PCMCIA_MEM_PHYS_ADDR,
 108                 .end    = AU1000_PCMCIA_MEM_PHYS_ADDR + 0x000400000 - 1,
 109         },
 110 };
 111 
 112 static struct platform_device xxs1500_pcmcia_dev = {
 113         .name           = "xxs1500_pcmcia",
 114         .id             = -1,
 115         .num_resources  = ARRAY_SIZE(xxs1500_pcmcia_res),
 116         .resource       = xxs1500_pcmcia_res,
 117 };
 118 
 119 static struct platform_device *xxs1500_devs[] __initdata = {
 120         &xxs1500_pcmcia_dev,
 121 };
 122 
 123 static int __init xxs1500_dev_init(void)
 124 {
 125         irq_set_irq_type(AU1500_GPIO204_INT, IRQ_TYPE_LEVEL_HIGH);
 126         irq_set_irq_type(AU1500_GPIO201_INT, IRQ_TYPE_LEVEL_LOW);
 127         irq_set_irq_type(AU1500_GPIO202_INT, IRQ_TYPE_LEVEL_LOW);
 128         irq_set_irq_type(AU1500_GPIO203_INT, IRQ_TYPE_LEVEL_LOW);
 129         irq_set_irq_type(AU1500_GPIO205_INT, IRQ_TYPE_LEVEL_LOW);
 130         irq_set_irq_type(AU1500_GPIO207_INT, IRQ_TYPE_LEVEL_LOW);
 131 
 132         irq_set_irq_type(AU1500_GPIO0_INT, IRQ_TYPE_LEVEL_LOW);
 133         irq_set_irq_type(AU1500_GPIO1_INT, IRQ_TYPE_LEVEL_LOW);
 134         irq_set_irq_type(AU1500_GPIO2_INT, IRQ_TYPE_LEVEL_LOW);
 135         irq_set_irq_type(AU1500_GPIO3_INT, IRQ_TYPE_LEVEL_LOW);
 136         irq_set_irq_type(AU1500_GPIO4_INT, IRQ_TYPE_LEVEL_LOW); /* CF irq */
 137         irq_set_irq_type(AU1500_GPIO5_INT, IRQ_TYPE_LEVEL_LOW);
 138 
 139         return platform_add_devices(xxs1500_devs,
 140                                     ARRAY_SIZE(xxs1500_devs));
 141 }
 142 device_initcall(xxs1500_dev_init);

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