This source file includes following definitions.
- mmu_topup_memory_cache
- mmu_free_memory_cache
- mmu_memory_cache_alloc
- kvm_mmu_free_memory_caches
- kvm_pgd_init
- kvm_pgd_alloc
- kvm_mips_walk_pgd
- kvm_mips_pte_for_gpa
- kvm_mips_flush_gpa_pte
- kvm_mips_flush_gpa_pmd
- kvm_mips_flush_gpa_pud
- kvm_mips_flush_gpa_pgd
- kvm_mips_flush_gpa_pt
- BUILD_PTE_RANGE_OP
- kvm_arch_mmu_enable_log_dirty_pt_masked
- BUILD_PTE_RANGE_OP
- handle_hva_to_gpa
- kvm_unmap_hva_handler
- kvm_unmap_hva_range
- kvm_set_spte_handler
- kvm_set_spte_hva
- kvm_age_hva_handler
- kvm_test_age_hva_handler
- kvm_age_hva
- kvm_test_age_hva
- _kvm_mips_map_page_fast
- kvm_mips_map_page
- kvm_trap_emul_pte_for_gva
- kvm_trap_emul_invalidate_gva
- kvm_mips_flush_gva_pte
- kvm_mips_flush_gva_pmd
- kvm_mips_flush_gva_pud
- kvm_mips_flush_gva_pgd
- kvm_mips_flush_gva_pt
- kvm_mips_gpa_pte_to_gva_unmapped
- kvm_mips_gpa_pte_to_gva_mapped
- kvm_mips_handle_vz_root_tlb_fault
- kvm_mips_handle_kseg0_tlb_fault
- kvm_mips_handle_mapped_seg_tlb_fault
- kvm_mips_handle_commpage_tlb_fault
- kvm_mips_migrate_count
- kvm_arch_vcpu_load
- kvm_arch_vcpu_put
- kvm_trap_emul_gva_fault
- kvm_get_inst
1
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11
12 #include <linux/highmem.h>
13 #include <linux/kvm_host.h>
14 #include <linux/uaccess.h>
15 #include <asm/mmu_context.h>
16 #include <asm/pgalloc.h>
17
18
19
20
21
22 #if defined(__PAGETABLE_PMD_FOLDED)
23 #define KVM_MMU_CACHE_MIN_PAGES 1
24 #else
25 #define KVM_MMU_CACHE_MIN_PAGES 2
26 #endif
27
28 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
29 int min, int max)
30 {
31 void *page;
32
33 BUG_ON(max > KVM_NR_MEM_OBJS);
34 if (cache->nobjs >= min)
35 return 0;
36 while (cache->nobjs < max) {
37 page = (void *)__get_free_page(GFP_KERNEL);
38 if (!page)
39 return -ENOMEM;
40 cache->objects[cache->nobjs++] = page;
41 }
42 return 0;
43 }
44
45 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
46 {
47 while (mc->nobjs)
48 free_page((unsigned long)mc->objects[--mc->nobjs]);
49 }
50
51 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc)
52 {
53 void *p;
54
55 BUG_ON(!mc || !mc->nobjs);
56 p = mc->objects[--mc->nobjs];
57 return p;
58 }
59
60 void kvm_mmu_free_memory_caches(struct kvm_vcpu *vcpu)
61 {
62 mmu_free_memory_cache(&vcpu->arch.mmu_page_cache);
63 }
64
65
66
67
68
69
70
71
72
73
74
75 static void kvm_pgd_init(void *page)
76 {
77 unsigned long *p, *end;
78 unsigned long entry;
79
80 #ifdef __PAGETABLE_PMD_FOLDED
81 entry = (unsigned long)invalid_pte_table;
82 #else
83 entry = (unsigned long)invalid_pmd_table;
84 #endif
85
86 p = (unsigned long *)page;
87 end = p + PTRS_PER_PGD;
88
89 do {
90 p[0] = entry;
91 p[1] = entry;
92 p[2] = entry;
93 p[3] = entry;
94 p[4] = entry;
95 p += 8;
96 p[-3] = entry;
97 p[-2] = entry;
98 p[-1] = entry;
99 } while (p != end);
100 }
101
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107
108
109
110
111 pgd_t *kvm_pgd_alloc(void)
112 {
113 pgd_t *ret;
114
115 ret = (pgd_t *)__get_free_pages(GFP_KERNEL, PGD_ORDER);
116 if (ret)
117 kvm_pgd_init(ret);
118
119 return ret;
120 }
121
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133
134
135
136 static pte_t *kvm_mips_walk_pgd(pgd_t *pgd, struct kvm_mmu_memory_cache *cache,
137 unsigned long addr)
138 {
139 pud_t *pud;
140 pmd_t *pmd;
141
142 pgd += pgd_index(addr);
143 if (pgd_none(*pgd)) {
144
145 BUG();
146 return NULL;
147 }
148 pud = pud_offset(pgd, addr);
149 if (pud_none(*pud)) {
150 pmd_t *new_pmd;
151
152 if (!cache)
153 return NULL;
154 new_pmd = mmu_memory_cache_alloc(cache);
155 pmd_init((unsigned long)new_pmd,
156 (unsigned long)invalid_pte_table);
157 pud_populate(NULL, pud, new_pmd);
158 }
159 pmd = pmd_offset(pud, addr);
160 if (pmd_none(*pmd)) {
161 pte_t *new_pte;
162
163 if (!cache)
164 return NULL;
165 new_pte = mmu_memory_cache_alloc(cache);
166 clear_page(new_pte);
167 pmd_populate_kernel(NULL, pmd, new_pte);
168 }
169 return pte_offset(pmd, addr);
170 }
171
172
173 static pte_t *kvm_mips_pte_for_gpa(struct kvm *kvm,
174 struct kvm_mmu_memory_cache *cache,
175 unsigned long addr)
176 {
177 return kvm_mips_walk_pgd(kvm->arch.gpa_mm.pgd, cache, addr);
178 }
179
180
181
182
183
184
185 static bool kvm_mips_flush_gpa_pte(pte_t *pte, unsigned long start_gpa,
186 unsigned long end_gpa)
187 {
188 int i_min = __pte_offset(start_gpa);
189 int i_max = __pte_offset(end_gpa);
190 bool safe_to_remove = (i_min == 0 && i_max == PTRS_PER_PTE - 1);
191 int i;
192
193 for (i = i_min; i <= i_max; ++i) {
194 if (!pte_present(pte[i]))
195 continue;
196
197 set_pte(pte + i, __pte(0));
198 }
199 return safe_to_remove;
200 }
201
202 static bool kvm_mips_flush_gpa_pmd(pmd_t *pmd, unsigned long start_gpa,
203 unsigned long end_gpa)
204 {
205 pte_t *pte;
206 unsigned long end = ~0ul;
207 int i_min = __pmd_offset(start_gpa);
208 int i_max = __pmd_offset(end_gpa);
209 bool safe_to_remove = (i_min == 0 && i_max == PTRS_PER_PMD - 1);
210 int i;
211
212 for (i = i_min; i <= i_max; ++i, start_gpa = 0) {
213 if (!pmd_present(pmd[i]))
214 continue;
215
216 pte = pte_offset(pmd + i, 0);
217 if (i == i_max)
218 end = end_gpa;
219
220 if (kvm_mips_flush_gpa_pte(pte, start_gpa, end)) {
221 pmd_clear(pmd + i);
222 pte_free_kernel(NULL, pte);
223 } else {
224 safe_to_remove = false;
225 }
226 }
227 return safe_to_remove;
228 }
229
230 static bool kvm_mips_flush_gpa_pud(pud_t *pud, unsigned long start_gpa,
231 unsigned long end_gpa)
232 {
233 pmd_t *pmd;
234 unsigned long end = ~0ul;
235 int i_min = __pud_offset(start_gpa);
236 int i_max = __pud_offset(end_gpa);
237 bool safe_to_remove = (i_min == 0 && i_max == PTRS_PER_PUD - 1);
238 int i;
239
240 for (i = i_min; i <= i_max; ++i, start_gpa = 0) {
241 if (!pud_present(pud[i]))
242 continue;
243
244 pmd = pmd_offset(pud + i, 0);
245 if (i == i_max)
246 end = end_gpa;
247
248 if (kvm_mips_flush_gpa_pmd(pmd, start_gpa, end)) {
249 pud_clear(pud + i);
250 pmd_free(NULL, pmd);
251 } else {
252 safe_to_remove = false;
253 }
254 }
255 return safe_to_remove;
256 }
257
258 static bool kvm_mips_flush_gpa_pgd(pgd_t *pgd, unsigned long start_gpa,
259 unsigned long end_gpa)
260 {
261 pud_t *pud;
262 unsigned long end = ~0ul;
263 int i_min = pgd_index(start_gpa);
264 int i_max = pgd_index(end_gpa);
265 bool safe_to_remove = (i_min == 0 && i_max == PTRS_PER_PGD - 1);
266 int i;
267
268 for (i = i_min; i <= i_max; ++i, start_gpa = 0) {
269 if (!pgd_present(pgd[i]))
270 continue;
271
272 pud = pud_offset(pgd + i, 0);
273 if (i == i_max)
274 end = end_gpa;
275
276 if (kvm_mips_flush_gpa_pud(pud, start_gpa, end)) {
277 pgd_clear(pgd + i);
278 pud_free(NULL, pud);
279 } else {
280 safe_to_remove = false;
281 }
282 }
283 return safe_to_remove;
284 }
285
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298
299 bool kvm_mips_flush_gpa_pt(struct kvm *kvm, gfn_t start_gfn, gfn_t end_gfn)
300 {
301 return kvm_mips_flush_gpa_pgd(kvm->arch.gpa_mm.pgd,
302 start_gfn << PAGE_SHIFT,
303 end_gfn << PAGE_SHIFT);
304 }
305
306 #define BUILD_PTE_RANGE_OP(name, op) \
307 static int kvm_mips_##name##_pte(pte_t *pte, unsigned long start, \
308 unsigned long end) \
309 { \
310 int ret = 0; \
311 int i_min = __pte_offset(start); \
312 int i_max = __pte_offset(end); \
313 int i; \
314 pte_t old, new; \
315 \
316 for (i = i_min; i <= i_max; ++i) { \
317 if (!pte_present(pte[i])) \
318 continue; \
319 \
320 old = pte[i]; \
321 new = op(old); \
322 if (pte_val(new) == pte_val(old)) \
323 continue; \
324 set_pte(pte + i, new); \
325 ret = 1; \
326 } \
327 return ret; \
328 } \
329 \
330 \
331 static int kvm_mips_##name##_pmd(pmd_t *pmd, unsigned long start, \
332 unsigned long end) \
333 { \
334 int ret = 0; \
335 pte_t *pte; \
336 unsigned long cur_end = ~0ul; \
337 int i_min = __pmd_offset(start); \
338 int i_max = __pmd_offset(end); \
339 int i; \
340 \
341 for (i = i_min; i <= i_max; ++i, start = 0) { \
342 if (!pmd_present(pmd[i])) \
343 continue; \
344 \
345 pte = pte_offset(pmd + i, 0); \
346 if (i == i_max) \
347 cur_end = end; \
348 \
349 ret |= kvm_mips_##name##_pte(pte, start, cur_end); \
350 } \
351 return ret; \
352 } \
353 \
354 static int kvm_mips_##name##_pud(pud_t *pud, unsigned long start, \
355 unsigned long end) \
356 { \
357 int ret = 0; \
358 pmd_t *pmd; \
359 unsigned long cur_end = ~0ul; \
360 int i_min = __pud_offset(start); \
361 int i_max = __pud_offset(end); \
362 int i; \
363 \
364 for (i = i_min; i <= i_max; ++i, start = 0) { \
365 if (!pud_present(pud[i])) \
366 continue; \
367 \
368 pmd = pmd_offset(pud + i, 0); \
369 if (i == i_max) \
370 cur_end = end; \
371 \
372 ret |= kvm_mips_##name##_pmd(pmd, start, cur_end); \
373 } \
374 return ret; \
375 } \
376 \
377 static int kvm_mips_##name##_pgd(pgd_t *pgd, unsigned long start, \
378 unsigned long end) \
379 { \
380 int ret = 0; \
381 pud_t *pud; \
382 unsigned long cur_end = ~0ul; \
383 int i_min = pgd_index(start); \
384 int i_max = pgd_index(end); \
385 int i; \
386 \
387 for (i = i_min; i <= i_max; ++i, start = 0) { \
388 if (!pgd_present(pgd[i])) \
389 continue; \
390 \
391 pud = pud_offset(pgd + i, 0); \
392 if (i == i_max) \
393 cur_end = end; \
394 \
395 ret |= kvm_mips_##name##_pud(pud, start, cur_end); \
396 } \
397 return ret; \
398 }
399
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405
406 BUILD_PTE_RANGE_OP(mkclean, pte_mkclean)
407
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422
423 int kvm_mips_mkclean_gpa_pt(struct kvm *kvm, gfn_t start_gfn, gfn_t end_gfn)
424 {
425 return kvm_mips_mkclean_pgd(kvm->arch.gpa_mm.pgd,
426 start_gfn << PAGE_SHIFT,
427 end_gfn << PAGE_SHIFT);
428 }
429
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432
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434
435
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437
438
439
440
441 void kvm_arch_mmu_enable_log_dirty_pt_masked(struct kvm *kvm,
442 struct kvm_memory_slot *slot,
443 gfn_t gfn_offset, unsigned long mask)
444 {
445 gfn_t base_gfn = slot->base_gfn + gfn_offset;
446 gfn_t start = base_gfn + __ffs(mask);
447 gfn_t end = base_gfn + __fls(mask);
448
449 kvm_mips_mkclean_gpa_pt(kvm, start, end);
450 }
451
452
453
454
455
456
457
458 BUILD_PTE_RANGE_OP(mkold, pte_mkold)
459
460 static int kvm_mips_mkold_gpa_pt(struct kvm *kvm, gfn_t start_gfn,
461 gfn_t end_gfn)
462 {
463 return kvm_mips_mkold_pgd(kvm->arch.gpa_mm.pgd,
464 start_gfn << PAGE_SHIFT,
465 end_gfn << PAGE_SHIFT);
466 }
467
468 static int handle_hva_to_gpa(struct kvm *kvm,
469 unsigned long start,
470 unsigned long end,
471 int (*handler)(struct kvm *kvm, gfn_t gfn,
472 gpa_t gfn_end,
473 struct kvm_memory_slot *memslot,
474 void *data),
475 void *data)
476 {
477 struct kvm_memslots *slots;
478 struct kvm_memory_slot *memslot;
479 int ret = 0;
480
481 slots = kvm_memslots(kvm);
482
483
484 kvm_for_each_memslot(memslot, slots) {
485 unsigned long hva_start, hva_end;
486 gfn_t gfn, gfn_end;
487
488 hva_start = max(start, memslot->userspace_addr);
489 hva_end = min(end, memslot->userspace_addr +
490 (memslot->npages << PAGE_SHIFT));
491 if (hva_start >= hva_end)
492 continue;
493
494
495
496
497
498 gfn = hva_to_gfn_memslot(hva_start, memslot);
499 gfn_end = hva_to_gfn_memslot(hva_end + PAGE_SIZE - 1, memslot);
500
501 ret |= handler(kvm, gfn, gfn_end, memslot, data);
502 }
503
504 return ret;
505 }
506
507
508 static int kvm_unmap_hva_handler(struct kvm *kvm, gfn_t gfn, gfn_t gfn_end,
509 struct kvm_memory_slot *memslot, void *data)
510 {
511 kvm_mips_flush_gpa_pt(kvm, gfn, gfn_end);
512 return 1;
513 }
514
515 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end)
516 {
517 handle_hva_to_gpa(kvm, start, end, &kvm_unmap_hva_handler, NULL);
518
519 kvm_mips_callbacks->flush_shadow_all(kvm);
520 return 0;
521 }
522
523 static int kvm_set_spte_handler(struct kvm *kvm, gfn_t gfn, gfn_t gfn_end,
524 struct kvm_memory_slot *memslot, void *data)
525 {
526 gpa_t gpa = gfn << PAGE_SHIFT;
527 pte_t hva_pte = *(pte_t *)data;
528 pte_t *gpa_pte = kvm_mips_pte_for_gpa(kvm, NULL, gpa);
529 pte_t old_pte;
530
531 if (!gpa_pte)
532 return 0;
533
534
535 old_pte = *gpa_pte;
536 if (memslot->flags & KVM_MEM_LOG_DIRTY_PAGES && !pte_dirty(old_pte))
537 hva_pte = pte_mkclean(hva_pte);
538 else if (memslot->flags & KVM_MEM_READONLY)
539 hva_pte = pte_wrprotect(hva_pte);
540
541 set_pte(gpa_pte, hva_pte);
542
543
544 if (!pte_present(old_pte) || !pte_young(old_pte))
545 return 0;
546
547
548 return !pte_present(hva_pte) ||
549 !pte_young(hva_pte) ||
550 pte_pfn(old_pte) != pte_pfn(hva_pte) ||
551 (pte_dirty(old_pte) && !pte_dirty(hva_pte));
552 }
553
554 int kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
555 {
556 unsigned long end = hva + PAGE_SIZE;
557 int ret;
558
559 ret = handle_hva_to_gpa(kvm, hva, end, &kvm_set_spte_handler, &pte);
560 if (ret)
561 kvm_mips_callbacks->flush_shadow_all(kvm);
562 return 0;
563 }
564
565 static int kvm_age_hva_handler(struct kvm *kvm, gfn_t gfn, gfn_t gfn_end,
566 struct kvm_memory_slot *memslot, void *data)
567 {
568 return kvm_mips_mkold_gpa_pt(kvm, gfn, gfn_end);
569 }
570
571 static int kvm_test_age_hva_handler(struct kvm *kvm, gfn_t gfn, gfn_t gfn_end,
572 struct kvm_memory_slot *memslot, void *data)
573 {
574 gpa_t gpa = gfn << PAGE_SHIFT;
575 pte_t *gpa_pte = kvm_mips_pte_for_gpa(kvm, NULL, gpa);
576
577 if (!gpa_pte)
578 return 0;
579 return pte_young(*gpa_pte);
580 }
581
582 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end)
583 {
584 return handle_hva_to_gpa(kvm, start, end, kvm_age_hva_handler, NULL);
585 }
586
587 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva)
588 {
589 return handle_hva_to_gpa(kvm, hva, hva, kvm_test_age_hva_handler, NULL);
590 }
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593
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595
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597
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599
600
601
602
603
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605
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607
608
609
610 static int _kvm_mips_map_page_fast(struct kvm_vcpu *vcpu, unsigned long gpa,
611 bool write_fault,
612 pte_t *out_entry, pte_t *out_buddy)
613 {
614 struct kvm *kvm = vcpu->kvm;
615 gfn_t gfn = gpa >> PAGE_SHIFT;
616 pte_t *ptep;
617 kvm_pfn_t pfn = 0;
618 bool pfn_valid = false;
619 int ret = 0;
620
621 spin_lock(&kvm->mmu_lock);
622
623
624 ptep = kvm_mips_pte_for_gpa(kvm, NULL, gpa);
625 if (!ptep || !pte_present(*ptep)) {
626 ret = -EFAULT;
627 goto out;
628 }
629
630
631 if (!pte_young(*ptep)) {
632 set_pte(ptep, pte_mkyoung(*ptep));
633 pfn = pte_pfn(*ptep);
634 pfn_valid = true;
635
636 }
637 if (write_fault && !pte_dirty(*ptep)) {
638 if (!pte_write(*ptep)) {
639 ret = -EFAULT;
640 goto out;
641 }
642
643
644 set_pte(ptep, pte_mkdirty(*ptep));
645 pfn = pte_pfn(*ptep);
646 mark_page_dirty(kvm, gfn);
647 kvm_set_pfn_dirty(pfn);
648 }
649
650 if (out_entry)
651 *out_entry = *ptep;
652 if (out_buddy)
653 *out_buddy = *ptep_buddy(ptep);
654
655 out:
656 spin_unlock(&kvm->mmu_lock);
657 if (pfn_valid)
658 kvm_set_pfn_accessed(pfn);
659 return ret;
660 }
661
662
663
664
665
666
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668
669
670
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685
686 static int kvm_mips_map_page(struct kvm_vcpu *vcpu, unsigned long gpa,
687 bool write_fault,
688 pte_t *out_entry, pte_t *out_buddy)
689 {
690 struct kvm *kvm = vcpu->kvm;
691 struct kvm_mmu_memory_cache *memcache = &vcpu->arch.mmu_page_cache;
692 gfn_t gfn = gpa >> PAGE_SHIFT;
693 int srcu_idx, err;
694 kvm_pfn_t pfn;
695 pte_t *ptep, entry, old_pte;
696 bool writeable;
697 unsigned long prot_bits;
698 unsigned long mmu_seq;
699
700
701 srcu_idx = srcu_read_lock(&kvm->srcu);
702 err = _kvm_mips_map_page_fast(vcpu, gpa, write_fault, out_entry,
703 out_buddy);
704 if (!err)
705 goto out;
706
707
708 err = mmu_topup_memory_cache(memcache, KVM_MMU_CACHE_MIN_PAGES,
709 KVM_NR_MEM_OBJS);
710 if (err)
711 goto out;
712
713 retry:
714
715
716
717
718 mmu_seq = kvm->mmu_notifier_seq;
719
720
721
722
723
724
725
726
727
728
729
730 smp_rmb();
731
732
733 pfn = gfn_to_pfn_prot(kvm, gfn, write_fault, &writeable);
734 if (is_error_noslot_pfn(pfn)) {
735 err = -EFAULT;
736 goto out;
737 }
738
739 spin_lock(&kvm->mmu_lock);
740
741 if (mmu_notifier_retry(kvm, mmu_seq)) {
742
743
744
745
746
747 spin_unlock(&kvm->mmu_lock);
748 kvm_release_pfn_clean(pfn);
749 goto retry;
750 }
751
752
753 ptep = kvm_mips_pte_for_gpa(kvm, memcache, gpa);
754
755
756 prot_bits = _PAGE_PRESENT | __READABLE | _page_cachable_default;
757 if (writeable) {
758 prot_bits |= _PAGE_WRITE;
759 if (write_fault) {
760 prot_bits |= __WRITEABLE;
761 mark_page_dirty(kvm, gfn);
762 kvm_set_pfn_dirty(pfn);
763 }
764 }
765 entry = pfn_pte(pfn, __pgprot(prot_bits));
766
767
768 old_pte = *ptep;
769 set_pte(ptep, entry);
770
771 err = 0;
772 if (out_entry)
773 *out_entry = *ptep;
774 if (out_buddy)
775 *out_buddy = *ptep_buddy(ptep);
776
777 spin_unlock(&kvm->mmu_lock);
778 kvm_release_pfn_clean(pfn);
779 kvm_set_pfn_accessed(pfn);
780 out:
781 srcu_read_unlock(&kvm->srcu, srcu_idx);
782 return err;
783 }
784
785 static pte_t *kvm_trap_emul_pte_for_gva(struct kvm_vcpu *vcpu,
786 unsigned long addr)
787 {
788 struct kvm_mmu_memory_cache *memcache = &vcpu->arch.mmu_page_cache;
789 pgd_t *pgdp;
790 int ret;
791
792
793 ret = mmu_topup_memory_cache(memcache, KVM_MMU_CACHE_MIN_PAGES,
794 KVM_NR_MEM_OBJS);
795 if (ret)
796 return NULL;
797
798 if (KVM_GUEST_KERNEL_MODE(vcpu))
799 pgdp = vcpu->arch.guest_kernel_mm.pgd;
800 else
801 pgdp = vcpu->arch.guest_user_mm.pgd;
802
803 return kvm_mips_walk_pgd(pgdp, memcache, addr);
804 }
805
806 void kvm_trap_emul_invalidate_gva(struct kvm_vcpu *vcpu, unsigned long addr,
807 bool user)
808 {
809 pgd_t *pgdp;
810 pte_t *ptep;
811
812 addr &= PAGE_MASK << 1;
813
814 pgdp = vcpu->arch.guest_kernel_mm.pgd;
815 ptep = kvm_mips_walk_pgd(pgdp, NULL, addr);
816 if (ptep) {
817 ptep[0] = pfn_pte(0, __pgprot(0));
818 ptep[1] = pfn_pte(0, __pgprot(0));
819 }
820
821 if (user) {
822 pgdp = vcpu->arch.guest_user_mm.pgd;
823 ptep = kvm_mips_walk_pgd(pgdp, NULL, addr);
824 if (ptep) {
825 ptep[0] = pfn_pte(0, __pgprot(0));
826 ptep[1] = pfn_pte(0, __pgprot(0));
827 }
828 }
829 }
830
831
832
833
834
835
836 static bool kvm_mips_flush_gva_pte(pte_t *pte, unsigned long start_gva,
837 unsigned long end_gva)
838 {
839 int i_min = __pte_offset(start_gva);
840 int i_max = __pte_offset(end_gva);
841 bool safe_to_remove = (i_min == 0 && i_max == PTRS_PER_PTE - 1);
842 int i;
843
844
845
846
847
848 if (safe_to_remove)
849 return true;
850
851 for (i = i_min; i <= i_max; ++i) {
852 if (!pte_present(pte[i]))
853 continue;
854
855 set_pte(pte + i, __pte(0));
856 }
857 return false;
858 }
859
860 static bool kvm_mips_flush_gva_pmd(pmd_t *pmd, unsigned long start_gva,
861 unsigned long end_gva)
862 {
863 pte_t *pte;
864 unsigned long end = ~0ul;
865 int i_min = __pmd_offset(start_gva);
866 int i_max = __pmd_offset(end_gva);
867 bool safe_to_remove = (i_min == 0 && i_max == PTRS_PER_PMD - 1);
868 int i;
869
870 for (i = i_min; i <= i_max; ++i, start_gva = 0) {
871 if (!pmd_present(pmd[i]))
872 continue;
873
874 pte = pte_offset(pmd + i, 0);
875 if (i == i_max)
876 end = end_gva;
877
878 if (kvm_mips_flush_gva_pte(pte, start_gva, end)) {
879 pmd_clear(pmd + i);
880 pte_free_kernel(NULL, pte);
881 } else {
882 safe_to_remove = false;
883 }
884 }
885 return safe_to_remove;
886 }
887
888 static bool kvm_mips_flush_gva_pud(pud_t *pud, unsigned long start_gva,
889 unsigned long end_gva)
890 {
891 pmd_t *pmd;
892 unsigned long end = ~0ul;
893 int i_min = __pud_offset(start_gva);
894 int i_max = __pud_offset(end_gva);
895 bool safe_to_remove = (i_min == 0 && i_max == PTRS_PER_PUD - 1);
896 int i;
897
898 for (i = i_min; i <= i_max; ++i, start_gva = 0) {
899 if (!pud_present(pud[i]))
900 continue;
901
902 pmd = pmd_offset(pud + i, 0);
903 if (i == i_max)
904 end = end_gva;
905
906 if (kvm_mips_flush_gva_pmd(pmd, start_gva, end)) {
907 pud_clear(pud + i);
908 pmd_free(NULL, pmd);
909 } else {
910 safe_to_remove = false;
911 }
912 }
913 return safe_to_remove;
914 }
915
916 static bool kvm_mips_flush_gva_pgd(pgd_t *pgd, unsigned long start_gva,
917 unsigned long end_gva)
918 {
919 pud_t *pud;
920 unsigned long end = ~0ul;
921 int i_min = pgd_index(start_gva);
922 int i_max = pgd_index(end_gva);
923 bool safe_to_remove = (i_min == 0 && i_max == PTRS_PER_PGD - 1);
924 int i;
925
926 for (i = i_min; i <= i_max; ++i, start_gva = 0) {
927 if (!pgd_present(pgd[i]))
928 continue;
929
930 pud = pud_offset(pgd + i, 0);
931 if (i == i_max)
932 end = end_gva;
933
934 if (kvm_mips_flush_gva_pud(pud, start_gva, end)) {
935 pgd_clear(pgd + i);
936 pud_free(NULL, pud);
937 } else {
938 safe_to_remove = false;
939 }
940 }
941 return safe_to_remove;
942 }
943
944 void kvm_mips_flush_gva_pt(pgd_t *pgd, enum kvm_mips_flush flags)
945 {
946 if (flags & KMF_GPA) {
947
948 if (flags & KMF_KERN)
949
950 kvm_mips_flush_gva_pgd(pgd, 0, 0x7fffffff);
951 else
952
953 kvm_mips_flush_gva_pgd(pgd, 0, 0x3fffffff);
954 } else {
955
956 kvm_mips_flush_gva_pgd(pgd, 0, 0x3fffffff);
957
958
959 if (flags & KMF_KERN)
960 kvm_mips_flush_gva_pgd(pgd, 0x60000000, 0x7fffffff);
961 }
962 }
963
964 static pte_t kvm_mips_gpa_pte_to_gva_unmapped(pte_t pte)
965 {
966
967
968
969
970
971 if (!pte_dirty(pte))
972 pte = pte_wrprotect(pte);
973
974 return pte;
975 }
976
977 static pte_t kvm_mips_gpa_pte_to_gva_mapped(pte_t pte, long entrylo)
978 {
979
980 if (!(entrylo & ENTRYLO_D))
981 pte = pte_mkclean(pte);
982
983 return kvm_mips_gpa_pte_to_gva_unmapped(pte);
984 }
985
986 #ifdef CONFIG_KVM_MIPS_VZ
987 int kvm_mips_handle_vz_root_tlb_fault(unsigned long badvaddr,
988 struct kvm_vcpu *vcpu,
989 bool write_fault)
990 {
991 int ret;
992
993 ret = kvm_mips_map_page(vcpu, badvaddr, write_fault, NULL, NULL);
994 if (ret)
995 return ret;
996
997
998 return kvm_vz_host_tlb_inv(vcpu, badvaddr);
999 }
1000 #endif
1001
1002
1003 int kvm_mips_handle_kseg0_tlb_fault(unsigned long badvaddr,
1004 struct kvm_vcpu *vcpu,
1005 bool write_fault)
1006 {
1007 unsigned long gpa;
1008 pte_t pte_gpa[2], *ptep_gva;
1009 int idx;
1010
1011 if (KVM_GUEST_KSEGX(badvaddr) != KVM_GUEST_KSEG0) {
1012 kvm_err("%s: Invalid BadVaddr: %#lx\n", __func__, badvaddr);
1013 kvm_mips_dump_host_tlbs();
1014 return -1;
1015 }
1016
1017
1018 gpa = KVM_GUEST_CPHYSADDR(badvaddr);
1019 idx = (badvaddr >> PAGE_SHIFT) & 1;
1020 if (kvm_mips_map_page(vcpu, gpa, write_fault, &pte_gpa[idx],
1021 &pte_gpa[!idx]) < 0)
1022 return -1;
1023
1024
1025 ptep_gva = kvm_trap_emul_pte_for_gva(vcpu, badvaddr & ~PAGE_SIZE);
1026 if (!ptep_gva) {
1027 kvm_err("No ptep for gva %lx\n", badvaddr);
1028 return -1;
1029 }
1030
1031
1032 ptep_gva[0] = kvm_mips_gpa_pte_to_gva_unmapped(pte_gpa[0]);
1033 ptep_gva[1] = kvm_mips_gpa_pte_to_gva_unmapped(pte_gpa[1]);
1034
1035
1036 kvm_mips_host_tlb_inv(vcpu, badvaddr, false, true);
1037 return 0;
1038 }
1039
1040 int kvm_mips_handle_mapped_seg_tlb_fault(struct kvm_vcpu *vcpu,
1041 struct kvm_mips_tlb *tlb,
1042 unsigned long gva,
1043 bool write_fault)
1044 {
1045 struct kvm *kvm = vcpu->kvm;
1046 long tlb_lo[2];
1047 pte_t pte_gpa[2], *ptep_buddy, *ptep_gva;
1048 unsigned int idx = TLB_LO_IDX(*tlb, gva);
1049 bool kernel = KVM_GUEST_KERNEL_MODE(vcpu);
1050
1051 tlb_lo[0] = tlb->tlb_lo[0];
1052 tlb_lo[1] = tlb->tlb_lo[1];
1053
1054
1055
1056
1057
1058 if (!((gva ^ KVM_GUEST_COMMPAGE_ADDR) & VPN2_MASK & (PAGE_MASK << 1)))
1059 tlb_lo[TLB_LO_IDX(*tlb, KVM_GUEST_COMMPAGE_ADDR)] = 0;
1060
1061
1062 if (kvm_mips_map_page(vcpu, mips3_tlbpfn_to_paddr(tlb_lo[idx]),
1063 write_fault, &pte_gpa[idx], NULL) < 0)
1064 return -1;
1065
1066
1067 pte_gpa[!idx] = pfn_pte(0, __pgprot(0));
1068 if (tlb_lo[!idx] & ENTRYLO_V) {
1069 spin_lock(&kvm->mmu_lock);
1070 ptep_buddy = kvm_mips_pte_for_gpa(kvm, NULL,
1071 mips3_tlbpfn_to_paddr(tlb_lo[!idx]));
1072 if (ptep_buddy)
1073 pte_gpa[!idx] = *ptep_buddy;
1074 spin_unlock(&kvm->mmu_lock);
1075 }
1076
1077
1078 ptep_gva = kvm_trap_emul_pte_for_gva(vcpu, gva & ~PAGE_SIZE);
1079 if (!ptep_gva) {
1080 kvm_err("No ptep for gva %lx\n", gva);
1081 return -1;
1082 }
1083
1084
1085 ptep_gva[0] = kvm_mips_gpa_pte_to_gva_mapped(pte_gpa[0], tlb_lo[0]);
1086 ptep_gva[1] = kvm_mips_gpa_pte_to_gva_mapped(pte_gpa[1], tlb_lo[1]);
1087
1088
1089 kvm_mips_host_tlb_inv(vcpu, gva, !kernel, kernel);
1090
1091 kvm_debug("@ %#lx tlb_lo0: 0x%08lx tlb_lo1: 0x%08lx\n", vcpu->arch.pc,
1092 tlb->tlb_lo[0], tlb->tlb_lo[1]);
1093
1094 return 0;
1095 }
1096
1097 int kvm_mips_handle_commpage_tlb_fault(unsigned long badvaddr,
1098 struct kvm_vcpu *vcpu)
1099 {
1100 kvm_pfn_t pfn;
1101 pte_t *ptep;
1102
1103 ptep = kvm_trap_emul_pte_for_gva(vcpu, badvaddr);
1104 if (!ptep) {
1105 kvm_err("No ptep for commpage %lx\n", badvaddr);
1106 return -1;
1107 }
1108
1109 pfn = PFN_DOWN(virt_to_phys(vcpu->arch.kseg0_commpage));
1110
1111 *ptep = pte_mkyoung(pte_mkdirty(pfn_pte(pfn, PAGE_SHARED)));
1112
1113
1114 kvm_mips_host_tlb_inv(vcpu, badvaddr, false, true);
1115 return 0;
1116 }
1117
1118
1119
1120
1121
1122
1123
1124
1125
1126
1127
1128
1129 static void kvm_mips_migrate_count(struct kvm_vcpu *vcpu)
1130 {
1131 if (hrtimer_cancel(&vcpu->arch.comparecount_timer))
1132 hrtimer_restart(&vcpu->arch.comparecount_timer);
1133 }
1134
1135
1136 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1137 {
1138 unsigned long flags;
1139
1140 kvm_debug("%s: vcpu %p, cpu: %d\n", __func__, vcpu, cpu);
1141
1142 local_irq_save(flags);
1143
1144 vcpu->cpu = cpu;
1145 if (vcpu->arch.last_sched_cpu != cpu) {
1146 kvm_debug("[%d->%d]KVM VCPU[%d] switch\n",
1147 vcpu->arch.last_sched_cpu, cpu, vcpu->vcpu_id);
1148
1149
1150
1151
1152
1153 kvm_mips_migrate_count(vcpu);
1154 }
1155
1156
1157 kvm_mips_callbacks->vcpu_load(vcpu, cpu);
1158
1159 local_irq_restore(flags);
1160 }
1161
1162
1163 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1164 {
1165 unsigned long flags;
1166 int cpu;
1167
1168 local_irq_save(flags);
1169
1170 cpu = smp_processor_id();
1171 vcpu->arch.last_sched_cpu = cpu;
1172 vcpu->cpu = -1;
1173
1174
1175 kvm_mips_callbacks->vcpu_put(vcpu, cpu);
1176
1177 local_irq_restore(flags);
1178 }
1179
1180
1181
1182
1183
1184
1185
1186
1187
1188
1189
1190
1191
1192
1193
1194
1195
1196 enum kvm_mips_fault_result kvm_trap_emul_gva_fault(struct kvm_vcpu *vcpu,
1197 unsigned long gva,
1198 bool write)
1199 {
1200 struct mips_coproc *cop0 = vcpu->arch.cop0;
1201 struct kvm_mips_tlb *tlb;
1202 int index;
1203
1204 if (KVM_GUEST_KSEGX(gva) == KVM_GUEST_KSEG0) {
1205 if (kvm_mips_handle_kseg0_tlb_fault(gva, vcpu, write) < 0)
1206 return KVM_MIPS_GPA;
1207 } else if ((KVM_GUEST_KSEGX(gva) < KVM_GUEST_KSEG0) ||
1208 KVM_GUEST_KSEGX(gva) == KVM_GUEST_KSEG23) {
1209
1210 index = kvm_mips_guest_tlb_lookup(vcpu, (gva & VPN2_MASK) |
1211 (kvm_read_c0_guest_entryhi(cop0) & KVM_ENTRYHI_ASID));
1212 if (index < 0)
1213 return KVM_MIPS_TLB;
1214 tlb = &vcpu->arch.guest_tlb[index];
1215
1216
1217 if (!TLB_IS_VALID(*tlb, gva))
1218 return KVM_MIPS_TLBINV;
1219 if (write && !TLB_IS_DIRTY(*tlb, gva))
1220 return KVM_MIPS_TLBMOD;
1221
1222 if (kvm_mips_handle_mapped_seg_tlb_fault(vcpu, tlb, gva, write))
1223 return KVM_MIPS_GPA;
1224 } else {
1225 return KVM_MIPS_GVA;
1226 }
1227
1228 return KVM_MIPS_MAPPED;
1229 }
1230
1231 int kvm_get_inst(u32 *opc, struct kvm_vcpu *vcpu, u32 *out)
1232 {
1233 int err;
1234
1235 if (WARN(IS_ENABLED(CONFIG_KVM_MIPS_VZ),
1236 "Expect BadInstr/BadInstrP registers to be used with VZ\n"))
1237 return -EINVAL;
1238
1239 retry:
1240 kvm_trap_emul_gva_lockless_begin(vcpu);
1241 err = get_user(*out, opc);
1242 kvm_trap_emul_gva_lockless_end(vcpu);
1243
1244 if (unlikely(err)) {
1245
1246
1247
1248
1249 err = kvm_trap_emul_gva_fault(vcpu, (unsigned long)opc,
1250 false);
1251 if (unlikely(err)) {
1252 kvm_err("%s: illegal address: %p\n",
1253 __func__, opc);
1254 return -EFAULT;
1255 }
1256
1257
1258 goto retry;
1259 }
1260 return 0;
1261 }