1
2
3
4
5
6 #ifndef DT_RESET_OXSEMI_OX820_H
7 #define DT_RESET_OXSEMI_OX820_H
8
9 #define RESET_SCU 0
10 #define RESET_LEON 1
11 #define RESET_ARM0 2
12 #define RESET_ARM1 3
13 #define RESET_USBHS 4
14 #define RESET_USBPHYA 5
15 #define RESET_MAC 6
16 #define RESET_PCIEA 7
17 #define RESET_SGDMA 8
18 #define RESET_CIPHER 9
19 #define RESET_DDR 10
20 #define RESET_SATA 11
21 #define RESET_SATA_LINK 12
22 #define RESET_SATA_PHY 13
23 #define RESET_PCIEPHY 14
24 #define RESET_NAND 15
25 #define RESET_GPIO 16
26 #define RESET_UART1 17
27 #define RESET_UART2 18
28 #define RESET_MISC 19
29 #define RESET_I2S 20
30 #define RESET_SD 21
31 #define RESET_MAC_2 22
32 #define RESET_PCIEB 23
33 #define RESET_VIDEO 24
34 #define RESET_DDR_PHY 25
35 #define RESET_USBPHYB 26
36 #define RESET_USBDEV 27
37
38 #define RESET_ARMDBG 29
39 #define RESET_PLLA 30
40 #define RESET_PLLB 31
41
42 #endif