root/scripts/dtc/include-prefixes/dt-bindings/clock/axg-audio-clkc.h

INCLUDED FROM

   1 /* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
   2 /*
   3  * Copyright (c) 2018 Baylibre SAS.
   4  * Author: Jerome Brunet <jbrunet@baylibre.com>
   5  */
   6 
   7 #ifndef __AXG_AUDIO_CLKC_BINDINGS_H
   8 #define __AXG_AUDIO_CLKC_BINDINGS_H
   9 
  10 #define AUD_CLKID_DDR_ARB               29
  11 #define AUD_CLKID_PDM                   30
  12 #define AUD_CLKID_TDMIN_A               31
  13 #define AUD_CLKID_TDMIN_B               32
  14 #define AUD_CLKID_TDMIN_C               33
  15 #define AUD_CLKID_TDMIN_LB              34
  16 #define AUD_CLKID_TDMOUT_A              35
  17 #define AUD_CLKID_TDMOUT_B              36
  18 #define AUD_CLKID_TDMOUT_C              37
  19 #define AUD_CLKID_FRDDR_A               38
  20 #define AUD_CLKID_FRDDR_B               39
  21 #define AUD_CLKID_FRDDR_C               40
  22 #define AUD_CLKID_TODDR_A               41
  23 #define AUD_CLKID_TODDR_B               42
  24 #define AUD_CLKID_TODDR_C               43
  25 #define AUD_CLKID_LOOPBACK              44
  26 #define AUD_CLKID_SPDIFIN               45
  27 #define AUD_CLKID_SPDIFOUT              46
  28 #define AUD_CLKID_RESAMPLE              47
  29 #define AUD_CLKID_POWER_DETECT          48
  30 #define AUD_CLKID_MST_A_MCLK            49
  31 #define AUD_CLKID_MST_B_MCLK            50
  32 #define AUD_CLKID_MST_C_MCLK            51
  33 #define AUD_CLKID_MST_D_MCLK            52
  34 #define AUD_CLKID_MST_E_MCLK            53
  35 #define AUD_CLKID_MST_F_MCLK            54
  36 #define AUD_CLKID_SPDIFOUT_CLK          55
  37 #define AUD_CLKID_SPDIFIN_CLK           56
  38 #define AUD_CLKID_PDM_DCLK              57
  39 #define AUD_CLKID_PDM_SYSCLK            58
  40 #define AUD_CLKID_MST_A_SCLK            79
  41 #define AUD_CLKID_MST_B_SCLK            80
  42 #define AUD_CLKID_MST_C_SCLK            81
  43 #define AUD_CLKID_MST_D_SCLK            82
  44 #define AUD_CLKID_MST_E_SCLK            83
  45 #define AUD_CLKID_MST_F_SCLK            84
  46 #define AUD_CLKID_MST_A_LRCLK           86
  47 #define AUD_CLKID_MST_B_LRCLK           87
  48 #define AUD_CLKID_MST_C_LRCLK           88
  49 #define AUD_CLKID_MST_D_LRCLK           89
  50 #define AUD_CLKID_MST_E_LRCLK           90
  51 #define AUD_CLKID_MST_F_LRCLK           91
  52 #define AUD_CLKID_TDMIN_A_SCLK_SEL      116
  53 #define AUD_CLKID_TDMIN_B_SCLK_SEL      117
  54 #define AUD_CLKID_TDMIN_C_SCLK_SEL      118
  55 #define AUD_CLKID_TDMIN_LB_SCLK_SEL     119
  56 #define AUD_CLKID_TDMOUT_A_SCLK_SEL     120
  57 #define AUD_CLKID_TDMOUT_B_SCLK_SEL     121
  58 #define AUD_CLKID_TDMOUT_C_SCLK_SEL     122
  59 #define AUD_CLKID_TDMIN_A_SCLK          123
  60 #define AUD_CLKID_TDMIN_B_SCLK          124
  61 #define AUD_CLKID_TDMIN_C_SCLK          125
  62 #define AUD_CLKID_TDMIN_LB_SCLK         126
  63 #define AUD_CLKID_TDMOUT_A_SCLK         127
  64 #define AUD_CLKID_TDMOUT_B_SCLK         128
  65 #define AUD_CLKID_TDMOUT_C_SCLK         129
  66 #define AUD_CLKID_TDMIN_A_LRCLK         130
  67 #define AUD_CLKID_TDMIN_B_LRCLK         131
  68 #define AUD_CLKID_TDMIN_C_LRCLK         132
  69 #define AUD_CLKID_TDMIN_LB_LRCLK        133
  70 #define AUD_CLKID_TDMOUT_A_LRCLK        134
  71 #define AUD_CLKID_TDMOUT_B_LRCLK        135
  72 #define AUD_CLKID_TDMOUT_C_LRCLK        136
  73 #define AUD_CLKID_SPDIFOUT_B            151
  74 #define AUD_CLKID_SPDIFOUT_B_CLK        152
  75 #define AUD_CLKID_TDM_MCLK_PAD0         155
  76 #define AUD_CLKID_TDM_MCLK_PAD1         156
  77 #define AUD_CLKID_TDM_LRCLK_PAD0        157
  78 #define AUD_CLKID_TDM_LRCLK_PAD1        158
  79 #define AUD_CLKID_TDM_LRCLK_PAD2        159
  80 #define AUD_CLKID_TDM_SCLK_PAD0         160
  81 #define AUD_CLKID_TDM_SCLK_PAD1         161
  82 #define AUD_CLKID_TDM_SCLK_PAD2         162
  83 
  84 #endif /* __AXG_AUDIO_CLKC_BINDINGS_H */