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5 #ifndef __DT_BINDINGS_CLOCK_R8A77995_CPG_MSSR_H__
6 #define __DT_BINDINGS_CLOCK_R8A77995_CPG_MSSR_H__
7
8 #include <dt-bindings/clock/renesas-cpg-mssr.h>
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10
11 #define R8A77995_CLK_Z2 0
12 #define R8A77995_CLK_ZG 1
13 #define R8A77995_CLK_ZTR 2
14 #define R8A77995_CLK_ZT 3
15 #define R8A77995_CLK_ZX 4
16 #define R8A77995_CLK_S0D1 5
17 #define R8A77995_CLK_S1D1 6
18 #define R8A77995_CLK_S1D2 7
19 #define R8A77995_CLK_S1D4 8
20 #define R8A77995_CLK_S2D1 9
21 #define R8A77995_CLK_S2D2 10
22 #define R8A77995_CLK_S2D4 11
23 #define R8A77995_CLK_S3D1 12
24 #define R8A77995_CLK_S3D2 13
25 #define R8A77995_CLK_S3D4 14
26 #define R8A77995_CLK_S1D4C 15
27 #define R8A77995_CLK_S3D1C 16
28 #define R8A77995_CLK_S3D2C 17
29 #define R8A77995_CLK_S3D4C 18
30 #define R8A77995_CLK_LB 19
31 #define R8A77995_CLK_CL 20
32 #define R8A77995_CLK_ZB3 21
33 #define R8A77995_CLK_ZB3D2 22
34 #define R8A77995_CLK_CR 23
35 #define R8A77995_CLK_CRD2 24
36 #define R8A77995_CLK_SD0H 25
37 #define R8A77995_CLK_SD0 26
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40 #define R8A77995_CLK_RPC 29
41 #define R8A77995_CLK_RPCD2 30
42 #define R8A77995_CLK_ZA2 31
43 #define R8A77995_CLK_ZA8 32
44 #define R8A77995_CLK_Z2D 33
45 #define R8A77995_CLK_CANFD 34
46 #define R8A77995_CLK_MSO 35
47 #define R8A77995_CLK_R 36
48 #define R8A77995_CLK_OSC 37
49 #define R8A77995_CLK_LV0 38
50 #define R8A77995_CLK_LV1 39
51 #define R8A77995_CLK_CP 40
52 #define R8A77995_CLK_CPEX 41
53
54 #endif