root/arch/sparc/lib/VISsave.S

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /*
   3  * VISsave.S: Code for saving FPU register state for
   4  *            VIS routines. One should not call this directly,
   5  *            but use macros provided in <asm/visasm.h>.
   6  *
   7  * Copyright (C) 1998 Jakub Jelinek (jj@ultra.linux.cz)
   8  */
   9 
  10 #include <linux/linkage.h>
  11 
  12 #include <asm/asi.h>
  13 #include <asm/page.h>
  14 #include <asm/ptrace.h>
  15 #include <asm/visasm.h>
  16 #include <asm/thread_info.h>
  17 #include <asm/export.h>
  18 
  19         /* On entry: %o5=current FPRS value, %g7 is callers address */
  20         /* May clobber %o5, %g1, %g2, %g3, %g7, %icc, %xcc */
  21 
  22         /* Nothing special need be done here to handle pre-emption, this
  23          * FPU save/restore mechanism is already preemption safe.
  24          */
  25         .text
  26         .align          32
  27 ENTRY(VISenter)
  28         ldub            [%g6 + TI_FPDEPTH], %g1
  29         brnz,a,pn       %g1, 1f
  30          cmp            %g1, 1
  31         stb             %g0, [%g6 + TI_FPSAVED]
  32         stx             %fsr, [%g6 + TI_XFSR]
  33 9:      jmpl            %g7 + %g0, %g0
  34          nop
  35 1:      bne,pn          %icc, 2f
  36 
  37          srl            %g1, 1, %g1
  38 vis1:   ldub            [%g6 + TI_FPSAVED], %g3
  39         stx             %fsr, [%g6 + TI_XFSR]
  40         or              %g3, %o5, %g3
  41         stb             %g3, [%g6 + TI_FPSAVED]
  42         rd              %gsr, %g3
  43         clr             %g1
  44         ba,pt           %xcc, 3f
  45 
  46          stx            %g3, [%g6 + TI_GSR]
  47 2:      add             %g6, %g1, %g3
  48         mov             FPRS_DU | FPRS_DL | FPRS_FEF, %o5
  49         sll             %g1, 3, %g1
  50         stb             %o5, [%g3 + TI_FPSAVED]
  51         rd              %gsr, %g2
  52         add             %g6, %g1, %g3
  53         stx             %g2, [%g3 + TI_GSR]
  54 
  55         add             %g6, %g1, %g2
  56         stx             %fsr, [%g2 + TI_XFSR]
  57         sll             %g1, 5, %g1
  58 3:      andcc           %o5, FPRS_DL|FPRS_DU, %g0
  59         be,pn           %icc, 9b
  60          add            %g6, TI_FPREGS, %g2
  61         andcc           %o5, FPRS_DL, %g0
  62 
  63         be,pn           %icc, 4f
  64          add            %g6, TI_FPREGS+0x40, %g3
  65         membar          #Sync
  66         stda            %f0, [%g2 + %g1] ASI_BLK_P
  67         stda            %f16, [%g3 + %g1] ASI_BLK_P
  68         membar          #Sync
  69         andcc           %o5, FPRS_DU, %g0
  70         be,pn           %icc, 5f
  71 4:       add            %g1, 128, %g1
  72         membar          #Sync
  73         stda            %f32, [%g2 + %g1] ASI_BLK_P
  74 
  75         stda            %f48, [%g3 + %g1] ASI_BLK_P
  76 5:      membar          #Sync
  77         ba,pt           %xcc, 80f
  78          nop
  79 
  80         .align          32
  81 80:     jmpl            %g7 + %g0, %g0
  82          nop
  83 ENDPROC(VISenter)
  84 EXPORT_SYMBOL(VISenter)