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5 #ifndef __DT_BINDINGS_POWER_R8A774A1_SYSC_H__
6 #define __DT_BINDINGS_POWER_R8A774A1_SYSC_H__
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14 #define R8A774A1_PD_CA57_CPU0 0
15 #define R8A774A1_PD_CA57_CPU1 1
16 #define R8A774A1_PD_CA53_CPU0 5
17 #define R8A774A1_PD_CA53_CPU1 6
18 #define R8A774A1_PD_CA53_CPU2 7
19 #define R8A774A1_PD_CA53_CPU3 8
20 #define R8A774A1_PD_CA57_SCU 12
21 #define R8A774A1_PD_A3VC 14
22 #define R8A774A1_PD_3DG_A 17
23 #define R8A774A1_PD_3DG_B 18
24 #define R8A774A1_PD_CA53_SCU 21
25 #define R8A774A1_PD_A2VC0 25
26 #define R8A774A1_PD_A2VC1 26
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29 #define R8A774A1_PD_ALWAYS_ON 32
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31 #endif