root/arch/m68k/include/asm/bvme6000hw.h

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INCLUDED FROM


   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 #ifndef _M68K_BVME6000HW_H_
   3 #define _M68K_BVME6000HW_H_
   4 
   5 #include <asm/irq.h>
   6 
   7 /*
   8  * PIT structure
   9  */
  10 
  11 #define BVME_PIT_BASE   0xffa00000
  12 
  13 typedef struct {
  14         unsigned char
  15         pad_a[3], pgcr,
  16         pad_b[3], psrr,
  17         pad_c[3], paddr,
  18         pad_d[3], pbddr,
  19         pad_e[3], pcddr,
  20         pad_f[3], pivr,
  21         pad_g[3], pacr,
  22         pad_h[3], pbcr,
  23         pad_i[3], padr,
  24         pad_j[3], pbdr,
  25         pad_k[3], paar,
  26         pad_l[3], pbar,
  27         pad_m[3], pcdr,
  28         pad_n[3], psr,
  29         pad_o[3], res1,
  30         pad_p[3], res2,
  31         pad_q[3], tcr,
  32         pad_r[3], tivr,
  33         pad_s[3], res3,
  34         pad_t[3], cprh,
  35         pad_u[3], cprm,
  36         pad_v[3], cprl,
  37         pad_w[3], res4,
  38         pad_x[3], crh,
  39         pad_y[3], crm,
  40         pad_z[3], crl,
  41         pad_A[3], tsr,
  42         pad_B[3], res5;
  43 } PitRegs_t, *PitRegsPtr;
  44 
  45 #define bvmepit   ((*(volatile PitRegsPtr)(BVME_PIT_BASE)))
  46 
  47 #define BVME_RTC_BASE   0xff900000
  48 
  49 typedef struct {
  50         unsigned char
  51         pad_a[3], msr,
  52         pad_b[3], t0cr_rtmr,
  53         pad_c[3], t1cr_omr,
  54         pad_d[3], pfr_icr0,
  55         pad_e[3], irr_icr1,
  56         pad_f[3], bcd_tenms,
  57         pad_g[3], bcd_sec,
  58         pad_h[3], bcd_min,
  59         pad_i[3], bcd_hr,
  60         pad_j[3], bcd_dom,
  61         pad_k[3], bcd_mth,
  62         pad_l[3], bcd_year,
  63         pad_m[3], bcd_ujcc,
  64         pad_n[3], bcd_hjcc,
  65         pad_o[3], bcd_dow,
  66         pad_p[3], t0lsb,
  67         pad_q[3], t0msb,
  68         pad_r[3], t1lsb,
  69         pad_s[3], t1msb,
  70         pad_t[3], cmp_sec,
  71         pad_u[3], cmp_min,
  72         pad_v[3], cmp_hr,
  73         pad_w[3], cmp_dom,
  74         pad_x[3], cmp_mth,
  75         pad_y[3], cmp_dow,
  76         pad_z[3], sav_sec,
  77         pad_A[3], sav_min,
  78         pad_B[3], sav_hr,
  79         pad_C[3], sav_dom,
  80         pad_D[3], sav_mth,
  81         pad_E[3], ram,
  82         pad_F[3], test;
  83 } RtcRegs_t, *RtcPtr_t;
  84 
  85 
  86 #define BVME_I596_BASE  0xff100000
  87 
  88 #define BVME_ETHIRQ_REG 0xff20000b
  89 
  90 #define BVME_LOCAL_IRQ_STAT  0xff20000f
  91 
  92 #define BVME_ETHERR          0x02
  93 #define BVME_ABORT_STATUS    0x08
  94 
  95 #define BVME_NCR53C710_BASE     0xff000000
  96 
  97 #define BVME_SCC_A_ADDR 0xffb0000b
  98 #define BVME_SCC_B_ADDR 0xffb00003
  99 #define BVME_SCC_RTxC   7372800
 100 
 101 #define BVME_CONFIG_REG 0xff500003
 102 
 103 #define config_reg_ptr  (volatile unsigned char *)BVME_CONFIG_REG
 104 
 105 #define BVME_CONFIG_SW1 0x08
 106 #define BVME_CONFIG_SW2 0x04
 107 #define BVME_CONFIG_SW3 0x02
 108 #define BVME_CONFIG_SW4 0x01
 109 
 110 
 111 #define BVME_IRQ_TYPE_PRIO      0
 112 
 113 #define BVME_IRQ_PRN            (IRQ_USER+20)
 114 #define BVME_IRQ_TIMER          (IRQ_USER+25)
 115 #define BVME_IRQ_I596           IRQ_AUTO_2
 116 #define BVME_IRQ_SCSI           IRQ_AUTO_3
 117 #define BVME_IRQ_RTC            IRQ_AUTO_6
 118 #define BVME_IRQ_ABORT          IRQ_AUTO_7
 119 
 120 /* SCC interrupts */
 121 #define BVME_IRQ_SCC_BASE               IRQ_USER
 122 #define BVME_IRQ_SCCB_TX                IRQ_USER
 123 #define BVME_IRQ_SCCB_STAT              (IRQ_USER+2)
 124 #define BVME_IRQ_SCCB_RX                (IRQ_USER+4)
 125 #define BVME_IRQ_SCCB_SPCOND            (IRQ_USER+6)
 126 #define BVME_IRQ_SCCA_TX                (IRQ_USER+8)
 127 #define BVME_IRQ_SCCA_STAT              (IRQ_USER+10)
 128 #define BVME_IRQ_SCCA_RX                (IRQ_USER+12)
 129 #define BVME_IRQ_SCCA_SPCOND            (IRQ_USER+14)
 130 
 131 /* Address control registers */
 132 
 133 #define BVME_ACR_A32VBA         0xff400003
 134 #define BVME_ACR_A32MSK         0xff410003
 135 #define BVME_ACR_A24VBA         0xff420003
 136 #define BVME_ACR_A24MSK         0xff430003
 137 #define BVME_ACR_A16VBA         0xff440003
 138 #define BVME_ACR_A32LBA         0xff450003
 139 #define BVME_ACR_A24LBA         0xff460003
 140 #define BVME_ACR_ADDRCTL        0xff470003
 141 
 142 #define bvme_acr_a32vba         *(volatile unsigned char *)BVME_ACR_A32VBA
 143 #define bvme_acr_a32msk         *(volatile unsigned char *)BVME_ACR_A32MSK
 144 #define bvme_acr_a24vba         *(volatile unsigned char *)BVME_ACR_A24VBA
 145 #define bvme_acr_a24msk         *(volatile unsigned char *)BVME_ACR_A24MSK
 146 #define bvme_acr_a16vba         *(volatile unsigned char *)BVME_ACR_A16VBA
 147 #define bvme_acr_a32lba         *(volatile unsigned char *)BVME_ACR_A32LBA
 148 #define bvme_acr_a24lba         *(volatile unsigned char *)BVME_ACR_A24LBA
 149 #define bvme_acr_addrctl        *(volatile unsigned char *)BVME_ACR_ADDRCTL
 150 
 151 #endif

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