This source file includes following definitions.
- enable_dma
- disable_dma
- clear_dma_ff
- set_dma_mode
- set_dma_addr
- set_dma_device_addr
- set_dma_count
- get_dma_residue
- enable_dma
- disable_dma
- clear_dma_ff
- set_dma_mode
- set_dma_addr
- set_dma_device_addr
- set_dma_count
- get_dma_residue
1
2 #ifndef _M68K_DMA_H
3 #define _M68K_DMA_H 1
4
5 #ifdef CONFIG_COLDFIRE
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29 #include <asm/coldfire.h>
30 #include <asm/mcfsim.h>
31 #include <asm/mcfdma.h>
32
33
34
35
36 #if defined(CONFIG_M5249) || defined(CONFIG_M5307) || defined(CONFIG_M5407) || \
37 defined(CONFIG_M523x) || defined(CONFIG_M527x) || \
38 defined(CONFIG_M528x) || defined(CONFIG_M525x)
39
40 #define MAX_M68K_DMA_CHANNELS 4
41 #elif defined(CONFIG_M5272)
42 #define MAX_M68K_DMA_CHANNELS 1
43 #elif defined(CONFIG_M53xx)
44 #define MAX_M68K_DMA_CHANNELS 0
45 #else
46 #define MAX_M68K_DMA_CHANNELS 2
47 #endif
48
49 extern unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS];
50 extern unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS];
51
52 #if !defined(CONFIG_M5272)
53 #define DMA_MODE_WRITE_BIT 0x01
54 #define DMA_MODE_WORD_BIT 0x02
55 #define DMA_MODE_LONG_BIT 0x04
56 #define DMA_MODE_SINGLE_BIT 0x08
57
58
59 #define DMA_MODE_READ 0
60
61 #define DMA_MODE_WRITE 1
62
63 #define DMA_MODE_READ_WORD 2
64
65 #define DMA_MODE_WRITE_WORD 3
66
67 #define DMA_MODE_READ_LONG 4
68
69 #define DMA_MODE_WRITE_LONG 5
70
71 #define DMA_MODE_READ_SINGLE 8
72
73 #define DMA_MODE_WRITE_SINGLE 9
74
75 #define DMA_MODE_READ_WORD_SINGLE 10
76
77 #define DMA_MODE_WRITE_WORD_SINGLE 11
78
79 #define DMA_MODE_READ_LONG_SINGLE 12
80
81 #define DMA_MODE_WRITE_LONG_SINGLE 13
82
83 #else
84
85
86 #define DMA_MODE_SRC_SA_BIT 0x01
87
88 #define DMA_MODE_SSIZE_MASK 0x06
89
90 #define DMA_MODE_SSIZE_OFF 0x01
91
92 #define DMA_MODE_DES_SA_BIT 0x10
93
94 #define DMA_MODE_DSIZE_MASK 0x60
95
96 #define DMA_MODE_DSIZE_OFF 0x05
97
98 #define DMA_MODE_SIZE_LONG 0x00
99 #define DMA_MODE_SIZE_BYTE 0x01
100 #define DMA_MODE_SIZE_WORD 0x02
101 #define DMA_MODE_SIZE_LINE 0x03
102
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108
109
110 #define DMA_MODE_READ ((DMA_MODE_SIZE_BYTE << DMA_MODE_DSIZE_OFF) | (DMA_MODE_SIZE_BYTE << DMA_MODE_SSIZE_OFF) | DMA_SRC_SA_BIT)
111
112 #define DMA_MODE_WRITE ((DMA_MODE_SIZE_BYTE << DMA_MODE_DSIZE_OFF) | (DMA_MODE_SIZE_BYTE << DMA_MODE_SSIZE_OFF) | DMA_DES_SA_BIT)
113
114 #define DMA_MODE_READ_WORD ((DMA_MODE_SIZE_WORD << DMA_MODE_DSIZE_OFF) | (DMA_MODE_SIZE_WORD << DMA_MODE_SSIZE_OFF) | DMA_SRC_SA_BIT)
115
116 #define DMA_MODE_WRITE_WORD ((DMA_MODE_SIZE_WORD << DMA_MODE_DSIZE_OFF) | (DMA_MODE_SIZE_WORD << DMA_MODE_SSIZE_OFF) | DMA_DES_SA_BIT)
117
118 #define DMA_MODE_READ_LONG ((DMA_MODE_SIZE_LONG << DMA_MODE_DSIZE_OFF) | (DMA_MODE_SIZE_LONG << DMA_MODE_SSIZE_OFF) | DMA_SRC_SA_BIT)
119
120 #define DMA_MODE_WRITE_LONG ((DMA_MODE_SIZE_LONG << DMA_MODE_DSIZE_OFF) | (DMA_MODE_SIZE_LONG << DMA_MODE_SSIZE_OFF) | DMA_DES_SA_BIT)
121
122 #endif
123
124 #if !defined(CONFIG_M5272)
125
126 static __inline__ void enable_dma(unsigned int dmanr)
127 {
128 volatile unsigned short *dmawp;
129
130 #ifdef DMA_DEBUG
131 printk("enable_dma(dmanr=%d)\n", dmanr);
132 #endif
133
134 dmawp = (unsigned short *) dma_base_addr[dmanr];
135 dmawp[MCFDMA_DCR] |= MCFDMA_DCR_EEXT;
136 }
137
138 static __inline__ void disable_dma(unsigned int dmanr)
139 {
140 volatile unsigned short *dmawp;
141 volatile unsigned char *dmapb;
142
143 #ifdef DMA_DEBUG
144 printk("disable_dma(dmanr=%d)\n", dmanr);
145 #endif
146
147 dmawp = (unsigned short *) dma_base_addr[dmanr];
148 dmapb = (unsigned char *) dma_base_addr[dmanr];
149
150
151 dmawp[MCFDMA_DCR] &= ~MCFDMA_DCR_EEXT;
152 dmapb[MCFDMA_DSR] = MCFDMA_DSR_DONE;
153 }
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164
165 static __inline__ void clear_dma_ff(unsigned int dmanr)
166 {
167 }
168
169
170 static __inline__ void set_dma_mode(unsigned int dmanr, char mode)
171 {
172
173 volatile unsigned char *dmabp;
174 volatile unsigned short *dmawp;
175
176 #ifdef DMA_DEBUG
177 printk("set_dma_mode(dmanr=%d,mode=%d)\n", dmanr, mode);
178 #endif
179
180 dmabp = (unsigned char *) dma_base_addr[dmanr];
181 dmawp = (unsigned short *) dma_base_addr[dmanr];
182
183
184 dmabp[MCFDMA_DSR] = MCFDMA_DSR_DONE;
185
186
187 dmawp[MCFDMA_DCR] =
188 MCFDMA_DCR_INT |
189 MCFDMA_DCR_CS |
190 MCFDMA_DCR_AA |
191
192 ((mode & DMA_MODE_SINGLE_BIT) ? MCFDMA_DCR_SAA : 0) |
193
194 ((mode & DMA_MODE_WRITE_BIT) ? MCFDMA_DCR_S_RW : 0) |
195
196 ((mode & DMA_MODE_WRITE_BIT) ? MCFDMA_DCR_SINC : MCFDMA_DCR_DINC) |
197
198 ((mode & DMA_MODE_WORD_BIT) ? MCFDMA_DCR_SSIZE_WORD :
199 ((mode & DMA_MODE_LONG_BIT) ? MCFDMA_DCR_SSIZE_LONG :
200 MCFDMA_DCR_SSIZE_BYTE)) |
201 ((mode & DMA_MODE_WORD_BIT) ? MCFDMA_DCR_DSIZE_WORD :
202 ((mode & DMA_MODE_LONG_BIT) ? MCFDMA_DCR_DSIZE_LONG :
203 MCFDMA_DCR_DSIZE_BYTE));
204
205 #ifdef DEBUG_DMA
206 printk("%s(%d): dmanr=%d DSR[%x]=%x DCR[%x]=%x\n", __FILE__, __LINE__,
207 dmanr, (int) &dmabp[MCFDMA_DSR], dmabp[MCFDMA_DSR],
208 (int) &dmawp[MCFDMA_DCR], dmawp[MCFDMA_DCR]);
209 #endif
210 }
211
212
213 static __inline__ void set_dma_addr(unsigned int dmanr, unsigned int a)
214 {
215 volatile unsigned short *dmawp;
216 volatile unsigned int *dmalp;
217
218 #ifdef DMA_DEBUG
219 printk("set_dma_addr(dmanr=%d,a=%x)\n", dmanr, a);
220 #endif
221
222 dmawp = (unsigned short *) dma_base_addr[dmanr];
223 dmalp = (unsigned int *) dma_base_addr[dmanr];
224
225
226 if (dmawp[MCFDMA_DCR] & MCFDMA_DCR_SINC) {
227
228 dmalp[MCFDMA_SAR] = a;
229
230 dmalp[MCFDMA_DAR] = dma_device_address[dmanr];
231 } else {
232
233 dmalp[MCFDMA_DAR] = a;
234
235 dmalp[MCFDMA_SAR] = dma_device_address[dmanr];
236 }
237
238 #ifdef DEBUG_DMA
239 printk("%s(%d): dmanr=%d DCR[%x]=%x SAR[%x]=%08x DAR[%x]=%08x\n",
240 __FILE__, __LINE__, dmanr, (int) &dmawp[MCFDMA_DCR], dmawp[MCFDMA_DCR],
241 (int) &dmalp[MCFDMA_SAR], dmalp[MCFDMA_SAR],
242 (int) &dmalp[MCFDMA_DAR], dmalp[MCFDMA_DAR]);
243 #endif
244 }
245
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248
249
250 static __inline__ void set_dma_device_addr(unsigned int dmanr, unsigned int a)
251 {
252 #ifdef DMA_DEBUG
253 printk("set_dma_device_addr(dmanr=%d,a=%x)\n", dmanr, a);
254 #endif
255
256 dma_device_address[dmanr] = a;
257 }
258
259
260
261
262 static __inline__ void set_dma_count(unsigned int dmanr, unsigned int count)
263 {
264 volatile unsigned short *dmawp;
265
266 #ifdef DMA_DEBUG
267 printk("set_dma_count(dmanr=%d,count=%d)\n", dmanr, count);
268 #endif
269
270 dmawp = (unsigned short *) dma_base_addr[dmanr];
271 dmawp[MCFDMA_BCR] = (unsigned short)count;
272 }
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279
280 static __inline__ int get_dma_residue(unsigned int dmanr)
281 {
282 volatile unsigned short *dmawp;
283 unsigned short count;
284
285 #ifdef DMA_DEBUG
286 printk("get_dma_residue(dmanr=%d)\n", dmanr);
287 #endif
288
289 dmawp = (unsigned short *) dma_base_addr[dmanr];
290 count = dmawp[MCFDMA_BCR];
291 return((int) count);
292 }
293 #else
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319 static __inline__ void enable_dma(unsigned int dmanr)
320 {
321 volatile unsigned int *dmalp;
322
323 #ifdef DMA_DEBUG
324 printk("enable_dma(dmanr=%d)\n", dmanr);
325 #endif
326
327 dmalp = (unsigned int *) dma_base_addr[dmanr];
328 dmalp[MCFDMA_DMR] |= MCFDMA_DMR_EN;
329 }
330
331 static __inline__ void disable_dma(unsigned int dmanr)
332 {
333 volatile unsigned int *dmalp;
334
335 #ifdef DMA_DEBUG
336 printk("disable_dma(dmanr=%d)\n", dmanr);
337 #endif
338
339 dmalp = (unsigned int *) dma_base_addr[dmanr];
340
341
342 dmalp[MCFDMA_DMR] &= ~MCFDMA_DMR_EN;
343 dmalp[MCFDMA_DMR] |= MCFDMA_DMR_RESET;
344 }
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355
356 static __inline__ void clear_dma_ff(unsigned int dmanr)
357 {
358 }
359
360
361 static __inline__ void set_dma_mode(unsigned int dmanr, char mode)
362 {
363
364 volatile unsigned int *dmalp;
365 volatile unsigned short *dmawp;
366
367 #ifdef DMA_DEBUG
368 printk("set_dma_mode(dmanr=%d,mode=%d)\n", dmanr, mode);
369 #endif
370 dmalp = (unsigned int *) dma_base_addr[dmanr];
371 dmawp = (unsigned short *) dma_base_addr[dmanr];
372
373
374 dmalp[MCFDMA_DMR] |= MCFDMA_DMR_RESET;
375
376
377 dmalp[MCFDMA_DMR] =
378 MCFDMA_DMR_RQM_DUAL |
379 MCFDMA_DMR_DSTT_SD |
380 MCFDMA_DMR_SRCT_SD |
381
382 ((mode & DMA_MODE_SRC_SA_BIT) ? MCFDMA_DMR_SRCM_SA : MCFDMA_DMR_SRCM_IA) |
383
384 ((mode & DMA_MODE_DES_SA_BIT) ? MCFDMA_DMR_DSTM_SA : MCFDMA_DMR_DSTM_IA) |
385
386 (((mode & DMA_MODE_SSIZE_MASK) >> DMA_MODE_SSIZE_OFF) << MCFDMA_DMR_DSTS_OFF) |
387 (((mode & DMA_MODE_SSIZE_MASK) >> DMA_MODE_SSIZE_OFF) << MCFDMA_DMR_SRCS_OFF);
388
389 dmawp[MCFDMA_DIR] |= MCFDMA_DIR_ASCEN;
390
391 #ifdef DEBUG_DMA
392 printk("%s(%d): dmanr=%d DMR[%x]=%x DIR[%x]=%x\n", __FILE__, __LINE__,
393 dmanr, (int) &dmalp[MCFDMA_DMR], dmalp[MCFDMA_DMR],
394 (int) &dmawp[MCFDMA_DIR], dmawp[MCFDMA_DIR]);
395 #endif
396 }
397
398
399 static __inline__ void set_dma_addr(unsigned int dmanr, unsigned int a)
400 {
401 volatile unsigned int *dmalp;
402
403 #ifdef DMA_DEBUG
404 printk("set_dma_addr(dmanr=%d,a=%x)\n", dmanr, a);
405 #endif
406
407 dmalp = (unsigned int *) dma_base_addr[dmanr];
408
409
410 if (dmalp[MCFDMA_DMR] & MCFDMA_DMR_SRCM) {
411
412 dmalp[MCFDMA_DSAR] = a;
413
414 dmalp[MCFDMA_DDAR] = dma_device_address[dmanr];
415 } else {
416
417 dmalp[MCFDMA_DDAR] = a;
418
419 dmalp[MCFDMA_DSAR] = dma_device_address[dmanr];
420 }
421
422 #ifdef DEBUG_DMA
423 printk("%s(%d): dmanr=%d DMR[%x]=%x SAR[%x]=%08x DAR[%x]=%08x\n",
424 __FILE__, __LINE__, dmanr, (int) &dmalp[MCFDMA_DMR], dmalp[MCFDMA_DMR],
425 (int) &dmalp[MCFDMA_DSAR], dmalp[MCFDMA_DSAR],
426 (int) &dmalp[MCFDMA_DDAR], dmalp[MCFDMA_DDAR]);
427 #endif
428 }
429
430
431
432
433
434 static __inline__ void set_dma_device_addr(unsigned int dmanr, unsigned int a)
435 {
436 #ifdef DMA_DEBUG
437 printk("set_dma_device_addr(dmanr=%d,a=%x)\n", dmanr, a);
438 #endif
439
440 dma_device_address[dmanr] = a;
441 }
442
443
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447
448 static __inline__ void set_dma_count(unsigned int dmanr, unsigned int count)
449 {
450 volatile unsigned int *dmalp;
451
452 #ifdef DMA_DEBUG
453 printk("set_dma_count(dmanr=%d,count=%d)\n", dmanr, count);
454 #endif
455
456 dmalp = (unsigned int *) dma_base_addr[dmanr];
457 dmalp[MCFDMA_DBCR] = count;
458 }
459
460
461
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463
464
465
466 static __inline__ int get_dma_residue(unsigned int dmanr)
467 {
468 volatile unsigned int *dmalp;
469 unsigned int count;
470
471 #ifdef DMA_DEBUG
472 printk("get_dma_residue(dmanr=%d)\n", dmanr);
473 #endif
474
475 dmalp = (unsigned int *) dma_base_addr[dmanr];
476 count = dmalp[MCFDMA_DBCR];
477 return(count);
478 }
479
480 #endif
481 #endif
482
483
484
485 #define MAX_DMA_ADDRESS PAGE_OFFSET
486
487 #define MAX_DMA_CHANNELS 8
488
489 extern int request_dma(unsigned int dmanr, const char * device_id);
490 extern void free_dma(unsigned int dmanr);
491
492 #ifdef CONFIG_PCI
493 extern int isa_dma_bridge_buggy;
494 #else
495 #define isa_dma_bridge_buggy (0)
496 #endif
497
498 #endif