This source file includes following definitions.
- mvme16x_parse_bootinfo
- mvme16x_reset
- mvme16x_get_model
- mvme16x_get_hardware_list
- mvme16x_init_IRQ
- mvme16x_cons_write
- config_mvme16x
- mvme16x_abort_int
- mvme16x_timer_int
- mvme16x_sched_init
- mvme16x_read_clk
- bcd2int
- mvme16x_hwclk
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17 #include <linux/types.h>
18 #include <linux/kernel.h>
19 #include <linux/mm.h>
20 #include <linux/seq_file.h>
21 #include <linux/tty.h>
22 #include <linux/clocksource.h>
23 #include <linux/console.h>
24 #include <linux/linkage.h>
25 #include <linux/init.h>
26 #include <linux/major.h>
27 #include <linux/genhd.h>
28 #include <linux/rtc.h>
29 #include <linux/interrupt.h>
30 #include <linux/module.h>
31
32 #include <asm/bootinfo.h>
33 #include <asm/bootinfo-vme.h>
34 #include <asm/byteorder.h>
35 #include <asm/pgtable.h>
36 #include <asm/setup.h>
37 #include <asm/irq.h>
38 #include <asm/traps.h>
39 #include <asm/machdep.h>
40 #include <asm/mvme16xhw.h>
41
42 extern t_bdid mvme_bdid;
43
44 static MK48T08ptr_t volatile rtc = (MK48T08ptr_t)MVME_RTC_BASE;
45
46 static void mvme16x_get_model(char *model);
47 extern void mvme16x_sched_init(irq_handler_t handler);
48 extern int mvme16x_hwclk (int, struct rtc_time *);
49 extern void mvme16x_reset (void);
50
51 int bcd2int (unsigned char b);
52
53
54 unsigned short mvme16x_config;
55 EXPORT_SYMBOL(mvme16x_config);
56
57
58 int __init mvme16x_parse_bootinfo(const struct bi_record *bi)
59 {
60 uint16_t tag = be16_to_cpu(bi->tag);
61 if (tag == BI_VME_TYPE || tag == BI_VME_BRDINFO)
62 return 0;
63 else
64 return 1;
65 }
66
67 void mvme16x_reset(void)
68 {
69 pr_info("\r\n\nCalled mvme16x_reset\r\n"
70 "\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r");
71
72
73 *(volatile char *)0xfff40107 = 0x80;
74 }
75
76 static void mvme16x_get_model(char *model)
77 {
78 p_bdid p = &mvme_bdid;
79 char suf[4];
80
81 suf[1] = p->brdsuffix[0];
82 suf[2] = p->brdsuffix[1];
83 suf[3] = '\0';
84 suf[0] = suf[1] ? '-' : '\0';
85
86 sprintf(model, "Motorola MVME%x%s", be16_to_cpu(p->brdno), suf);
87 }
88
89
90 static void mvme16x_get_hardware_list(struct seq_file *m)
91 {
92 uint16_t brdno = be16_to_cpu(mvme_bdid.brdno);
93
94 if (brdno == 0x0162 || brdno == 0x0172)
95 {
96 unsigned char rev = *(unsigned char *)MVME162_VERSION_REG;
97
98 seq_printf (m, "VMEchip2 %spresent\n",
99 rev & MVME16x_CONFIG_NO_VMECHIP2 ? "NOT " : "");
100 seq_printf (m, "SCSI interface %spresent\n",
101 rev & MVME16x_CONFIG_NO_SCSICHIP ? "NOT " : "");
102 seq_printf (m, "Ethernet i/f %spresent\n",
103 rev & MVME16x_CONFIG_NO_ETHERNET ? "NOT " : "");
104 }
105 }
106
107
108
109
110
111
112
113 static void __init mvme16x_init_IRQ (void)
114 {
115 m68k_setup_user_interrupt(VEC_USER, 192);
116 }
117
118 #define PCC2CHIP (0xfff42000)
119 #define PCCSCCMICR (PCC2CHIP + 0x1d)
120 #define PCCSCCTICR (PCC2CHIP + 0x1e)
121 #define PCCSCCRICR (PCC2CHIP + 0x1f)
122 #define PCCTPIACKR (PCC2CHIP + 0x25)
123
124 #ifdef CONFIG_EARLY_PRINTK
125
126
127 #define CD2401_ADDR (0xfff45000)
128
129 #define CyGFRCR (0x81)
130 #define CyCCR (0x13)
131 #define CyCLR_CHAN (0x40)
132 #define CyINIT_CHAN (0x20)
133 #define CyCHIP_RESET (0x10)
134 #define CyENB_XMTR (0x08)
135 #define CyDIS_XMTR (0x04)
136 #define CyENB_RCVR (0x02)
137 #define CyDIS_RCVR (0x01)
138 #define CyCAR (0xee)
139 #define CyIER (0x11)
140 #define CyMdmCh (0x80)
141 #define CyRxExc (0x20)
142 #define CyRxData (0x08)
143 #define CyTxMpty (0x02)
144 #define CyTxRdy (0x01)
145 #define CyLICR (0x26)
146 #define CyRISR (0x89)
147 #define CyTIMEOUT (0x80)
148 #define CySPECHAR (0x70)
149 #define CyOVERRUN (0x08)
150 #define CyPARITY (0x04)
151 #define CyFRAME (0x02)
152 #define CyBREAK (0x01)
153 #define CyREOIR (0x84)
154 #define CyTEOIR (0x85)
155 #define CyMEOIR (0x86)
156 #define CyNOTRANS (0x08)
157 #define CyRFOC (0x30)
158 #define CyRDR (0xf8)
159 #define CyTDR (0xf8)
160 #define CyMISR (0x8b)
161 #define CyRISR (0x89)
162 #define CyTISR (0x8a)
163 #define CyMSVR1 (0xde)
164 #define CyMSVR2 (0xdf)
165 #define CyDSR (0x80)
166 #define CyDCD (0x40)
167 #define CyCTS (0x20)
168 #define CyDTR (0x02)
169 #define CyRTS (0x01)
170 #define CyRTPRL (0x25)
171 #define CyRTPRH (0x24)
172 #define CyCOR1 (0x10)
173 #define CyPARITY_NONE (0x00)
174 #define CyPARITY_E (0x40)
175 #define CyPARITY_O (0xC0)
176 #define Cy_5_BITS (0x04)
177 #define Cy_6_BITS (0x05)
178 #define Cy_7_BITS (0x06)
179 #define Cy_8_BITS (0x07)
180 #define CyCOR2 (0x17)
181 #define CyETC (0x20)
182 #define CyCtsAE (0x02)
183 #define CyCOR3 (0x16)
184 #define Cy_1_STOP (0x02)
185 #define Cy_2_STOP (0x04)
186 #define CyCOR4 (0x15)
187 #define CyREC_FIFO (0x0F)
188 #define CyCOR5 (0x14)
189 #define CyCOR6 (0x18)
190 #define CyCOR7 (0x07)
191 #define CyRBPR (0xcb)
192 #define CyRCOR (0xc8)
193 #define CyTBPR (0xc3)
194 #define CyTCOR (0xc0)
195 #define CySCHR1 (0x1f)
196 #define CySCHR2 (0x1e)
197 #define CyTPR (0xda)
198 #define CyPILR1 (0xe3)
199 #define CyPILR2 (0xe0)
200 #define CyPILR3 (0xe1)
201 #define CyCMR (0x1b)
202 #define CyASYNC (0x02)
203 #define CyLICR (0x26)
204 #define CyLIVR (0x09)
205 #define CySCRL (0x23)
206 #define CySCRH (0x22)
207 #define CyTFTC (0x80)
208
209 void mvme16x_cons_write(struct console *co, const char *str, unsigned count)
210 {
211 volatile unsigned char *base_addr = (u_char *)CD2401_ADDR;
212 volatile u_char sink;
213 u_char ier;
214 int port;
215 u_char do_lf = 0;
216 int i = 0;
217
218
219
220 port = 0;
221 base_addr[CyCAR] = (u_char)port;
222 while (base_addr[CyCCR])
223 ;
224 base_addr[CyCCR] = CyENB_XMTR;
225
226 ier = base_addr[CyIER];
227 base_addr[CyIER] = CyTxMpty;
228
229 while (1) {
230 if (in_8(PCCSCCTICR) & 0x20)
231 {
232
233 sink = in_8(PCCTPIACKR);
234 if ((base_addr[CyLICR] >> 2) == port) {
235 if (i == count) {
236
237 base_addr[CyTEOIR] = CyNOTRANS;
238 break;
239 }
240 if (do_lf) {
241 base_addr[CyTDR] = '\n';
242 str++;
243 i++;
244 do_lf = 0;
245 }
246 else if (*str == '\n') {
247 base_addr[CyTDR] = '\r';
248 do_lf = 1;
249 }
250 else {
251 base_addr[CyTDR] = *str++;
252 i++;
253 }
254 base_addr[CyTEOIR] = 0;
255 }
256 else
257 base_addr[CyTEOIR] = CyNOTRANS;
258 }
259 }
260
261 base_addr[CyIER] = ier;
262 }
263
264 #endif
265
266 void __init config_mvme16x(void)
267 {
268 p_bdid p = &mvme_bdid;
269 char id[40];
270 uint16_t brdno = be16_to_cpu(p->brdno);
271
272 mach_max_dma_address = 0xffffffff;
273 mach_sched_init = mvme16x_sched_init;
274 mach_init_IRQ = mvme16x_init_IRQ;
275 mach_hwclk = mvme16x_hwclk;
276 mach_reset = mvme16x_reset;
277 mach_get_model = mvme16x_get_model;
278 mach_get_hardware_list = mvme16x_get_hardware_list;
279
280
281
282 if (strncmp("BDID", p->bdid, 4))
283 {
284 pr_crit("Bug call .BRD_ID returned garbage - giving up\n");
285 while (1)
286 ;
287 }
288
289 if (vme_brdtype == 0)
290 vme_brdtype = brdno;
291
292 mvme16x_get_model(id);
293 pr_info("BRD_ID: %s BUG %x.%x %02x/%02x/%02x\n", id, p->rev >> 4,
294 p->rev & 0xf, p->yr, p->mth, p->day);
295 if (brdno == 0x0162 || brdno == 0x172)
296 {
297 unsigned char rev = *(unsigned char *)MVME162_VERSION_REG;
298
299 mvme16x_config = rev | MVME16x_CONFIG_GOT_SCCA;
300
301 pr_info("MVME%x Hardware status:\n", brdno);
302 pr_info(" CPU Type 68%s040\n",
303 rev & MVME16x_CONFIG_GOT_FPU ? "" : "LC");
304 pr_info(" CPU clock %dMHz\n",
305 rev & MVME16x_CONFIG_SPEED_32 ? 32 : 25);
306 pr_info(" VMEchip2 %spresent\n",
307 rev & MVME16x_CONFIG_NO_VMECHIP2 ? "NOT " : "");
308 pr_info(" SCSI interface %spresent\n",
309 rev & MVME16x_CONFIG_NO_SCSICHIP ? "NOT " : "");
310 pr_info(" Ethernet interface %spresent\n",
311 rev & MVME16x_CONFIG_NO_ETHERNET ? "NOT " : "");
312 }
313 else
314 {
315 mvme16x_config = MVME16x_CONFIG_GOT_LP | MVME16x_CONFIG_GOT_CD2401;
316 }
317 }
318
319 static irqreturn_t mvme16x_abort_int (int irq, void *dev_id)
320 {
321 unsigned long *new = (unsigned long *)vectors;
322 unsigned long *old = (unsigned long *)0xffe00000;
323 volatile unsigned char uc, *ucp;
324 uint16_t brdno = be16_to_cpu(mvme_bdid.brdno);
325
326 if (brdno == 0x0162 || brdno == 0x172)
327 {
328 ucp = (volatile unsigned char *)0xfff42043;
329 uc = *ucp | 8;
330 *ucp = uc;
331 }
332 else
333 {
334 *(volatile unsigned long *)0xfff40074 = 0x40000000;
335 }
336 *(new+4) = *(old+4);
337 *(new+9) = *(old+9);
338 *(new+47) = *(old+47);
339
340 if (brdno == 0x0162 || brdno == 0x172)
341 *(new+0x5e) = *(old+0x5e);
342 else
343 *(new+0x6e) = *(old+0x6e);
344 return IRQ_HANDLED;
345 }
346
347 static u64 mvme16x_read_clk(struct clocksource *cs);
348
349 static struct clocksource mvme16x_clk = {
350 .name = "pcc",
351 .rating = 250,
352 .read = mvme16x_read_clk,
353 .mask = CLOCKSOURCE_MASK(32),
354 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
355 };
356
357 static u32 clk_total;
358
359 #define PCC_TIMER_CLOCK_FREQ 1000000
360 #define PCC_TIMER_CYCLES (PCC_TIMER_CLOCK_FREQ / HZ)
361
362 #define PCCTCMP1 (PCC2CHIP + 0x04)
363 #define PCCTCNT1 (PCC2CHIP + 0x08)
364 #define PCCTOVR1 (PCC2CHIP + 0x17)
365 #define PCCTIC1 (PCC2CHIP + 0x1b)
366
367 #define PCCTOVR1_TIC_EN 0x01
368 #define PCCTOVR1_COC_EN 0x02
369 #define PCCTOVR1_OVR_CLR 0x04
370
371 #define PCCTIC1_INT_CLR 0x08
372 #define PCCTIC1_INT_EN 0x10
373
374 static irqreturn_t mvme16x_timer_int (int irq, void *dev_id)
375 {
376 irq_handler_t timer_routine = dev_id;
377 unsigned long flags;
378
379 local_irq_save(flags);
380 out_8(PCCTIC1, in_8(PCCTIC1) | PCCTIC1_INT_CLR);
381 out_8(PCCTOVR1, PCCTOVR1_OVR_CLR);
382 clk_total += PCC_TIMER_CYCLES;
383 timer_routine(0, NULL);
384 local_irq_restore(flags);
385
386 return IRQ_HANDLED;
387 }
388
389 void mvme16x_sched_init (irq_handler_t timer_routine)
390 {
391 uint16_t brdno = be16_to_cpu(mvme_bdid.brdno);
392 int irq;
393
394
395 out_be32(PCCTCNT1, 0);
396 out_be32(PCCTCMP1, PCC_TIMER_CYCLES);
397 out_8(PCCTOVR1, in_8(PCCTOVR1) | PCCTOVR1_TIC_EN | PCCTOVR1_COC_EN);
398 out_8(PCCTIC1, PCCTIC1_INT_EN | 6);
399 if (request_irq(MVME16x_IRQ_TIMER, mvme16x_timer_int, IRQF_TIMER, "timer",
400 timer_routine))
401 panic ("Couldn't register timer int");
402
403 clocksource_register_hz(&mvme16x_clk, PCC_TIMER_CLOCK_FREQ);
404
405 if (brdno == 0x0162 || brdno == 0x172)
406 irq = MVME162_IRQ_ABORT;
407 else
408 irq = MVME167_IRQ_ABORT;
409 if (request_irq(irq, mvme16x_abort_int, 0,
410 "abort", mvme16x_abort_int))
411 panic ("Couldn't register abort int");
412 }
413
414 static u64 mvme16x_read_clk(struct clocksource *cs)
415 {
416 unsigned long flags;
417 u8 overflow, tmp;
418 u32 ticks;
419
420 local_irq_save(flags);
421 tmp = in_8(PCCTOVR1) >> 4;
422 ticks = in_be32(PCCTCNT1);
423 overflow = in_8(PCCTOVR1) >> 4;
424 if (overflow != tmp)
425 ticks = in_be32(PCCTCNT1);
426 ticks += overflow * PCC_TIMER_CYCLES;
427 ticks += clk_total;
428 local_irq_restore(flags);
429
430 return ticks;
431 }
432
433 int bcd2int (unsigned char b)
434 {
435 return ((b>>4)*10 + (b&15));
436 }
437
438 int mvme16x_hwclk(int op, struct rtc_time *t)
439 {
440 #warning check me!
441 if (!op) {
442 rtc->ctrl = RTC_READ;
443 t->tm_year = bcd2int (rtc->bcd_year);
444 t->tm_mon = bcd2int(rtc->bcd_mth) - 1;
445 t->tm_mday = bcd2int (rtc->bcd_dom);
446 t->tm_hour = bcd2int (rtc->bcd_hr);
447 t->tm_min = bcd2int (rtc->bcd_min);
448 t->tm_sec = bcd2int (rtc->bcd_sec);
449 rtc->ctrl = 0;
450 if (t->tm_year < 70)
451 t->tm_year += 100;
452 }
453 return 0;
454 }