root/kernel/dma/mapping.c

DEFINITIONS

1. dmam_release
2. dmam_match
3. dmam_free_coherent
4. dmam_alloc_attrs
5. dma_common_get_sgtable
6. dma_get_sgtable_attrs
7. dma_pgprot
8. dma_common_mmap
9. dma_can_mmap
10. dma_mmap_attrs
11. dma_get_required_mask
12. dma_alloc_attrs
13. dma_free_attrs
14. dma_supported
15. dma_set_mask
16. dma_set_coherent_mask
17. dma_cache_sync
18. dma_max_mapping_size
19. dma_get_merge_boundary

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * arch-independent dma-mapping routines
   4  *
   5  * Copyright (c) 2006  SUSE Linux Products GmbH
   6  * Copyright (c) 2006  Tejun Heo <teheo@suse.de>
   7  */
   8 #include <linux/memblock.h> /* for max_pfn */
   9 #include <linux/acpi.h>
  10 #include <linux/dma-direct.h>
  11 #include <linux/dma-noncoherent.h>
  12 #include <linux/export.h>
  13 #include <linux/gfp.h>
  14 #include <linux/of_device.h>
  15 #include <linux/slab.h>
  16 #include <linux/vmalloc.h>
  17 
  18 /*
  19  * Managed DMA API
  20  */
  21 struct dma_devres {
  22         size_t          size;
  23         void            *vaddr;
  24         dma_addr_t      dma_handle;
  25         unsigned long   attrs;
  26 };
  27 
  28 static void dmam_release(struct device *dev, void *res)
  29 {
  30         struct dma_devres *this = res;
  31 
  32         dma_free_attrs(dev, this->size, this->vaddr, this->dma_handle,
  33                         this->attrs);
  34 }
  35 
  36 static int dmam_match(struct device *dev, void *res, void *match_data)
  37 {
  38         struct dma_devres *this = res, *match = match_data;
  39 
  40         if (this->vaddr == match->vaddr) {
  41                 WARN_ON(this->size != match->size ||
  42                         this->dma_handle != match->dma_handle);
  43                 return 1;
  44         }
  45         return 0;
  46 }
  47 
  48 /**
  49  * dmam_free_coherent - Managed dma_free_coherent()
  50  * @dev: Device to free coherent memory for
  51  * @size: Size of allocation
  52  * @vaddr: Virtual address of the memory to free
  53  * @dma_handle: DMA handle of the memory to free
  54  *
  55  * Managed dma_free_coherent().
  56  */
  57 void dmam_free_coherent(struct device *dev, size_t size, void *vaddr,
  58                         dma_addr_t dma_handle)
  59 {
  60         struct dma_devres match_data = { size, vaddr, dma_handle };
  61 
  62         dma_free_coherent(dev, size, vaddr, dma_handle);
  63         WARN_ON(devres_destroy(dev, dmam_release, dmam_match, &match_data));
  64 }
  65 EXPORT_SYMBOL(dmam_free_coherent);
  66 
  67 /**
  68  * dmam_alloc_attrs - Managed dma_alloc_attrs()
  69  * @dev: Device to allocate non_coherent memory for
  70  * @size: Size of allocation
  71  * @dma_handle: Out argument for allocated DMA handle
  72  * @gfp: Allocation flags
  73  * @attrs: Flags in the DMA_ATTR_* namespace.
  74  *
  75  * Managed dma_alloc_attrs().  Memory allocated using this function will be
  76  * automatically released on driver detach.
  77  *
  78  * RETURNS:
  79  * Pointer to allocated memory on success, NULL on failure.
  80  */
  81 void *dmam_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle,
  82                 gfp_t gfp, unsigned long attrs)
  83 {
  84         struct dma_devres *dr;
  85         void *vaddr;
  86 
  87         dr = devres_alloc(dmam_release, sizeof(*dr), gfp);
  88         if (!dr)
  89                 return NULL;
  90 
  91         vaddr = dma_alloc_attrs(dev, size, dma_handle, gfp, attrs);
  92         if (!vaddr) {
  93                 devres_free(dr);
  94                 return NULL;
  95         }
  96 
  97         dr->vaddr = vaddr;
  98         dr->dma_handle = *dma_handle;
  99         dr->size = size;
 100         dr->attrs = attrs;
 101 
 102         devres_add(dev, dr);
 103 
 104         return vaddr;
 105 }
 106 EXPORT_SYMBOL(dmam_alloc_attrs);
 107 
 108 /*
 109  * Create scatter-list for the already allocated DMA buffer.
 110  */
 111 int dma_common_get_sgtable(struct device *dev, struct sg_table *sgt,
 112                  void *cpu_addr, dma_addr_t dma_addr, size_t size,
 113                  unsigned long attrs)
 114 {
 115         struct page *page;
 116         int ret;
 117 
 118         if (!dev_is_dma_coherent(dev)) {
 119                 unsigned long pfn;
 120 
 121                 if (!IS_ENABLED(CONFIG_ARCH_HAS_DMA_COHERENT_TO_PFN))
 122                         return -ENXIO;
 123 
 124                 /* If the PFN is not valid, we do not have a struct page */
 125                 pfn = arch_dma_coherent_to_pfn(dev, cpu_addr, dma_addr);
 126                 if (!pfn_valid(pfn))
 127                         return -ENXIO;
 128                 page = pfn_to_page(pfn);
 129         } else {
 130                 page = virt_to_page(cpu_addr);
 131         }
 132 
 133         ret = sg_alloc_table(sgt, 1, GFP_KERNEL);
 134         if (!ret)
 135                 sg_set_page(sgt->sgl, page, PAGE_ALIGN(size), 0);
 136         return ret;
 137 }
 138 
 139 /*
 140  * The whole dma_get_sgtable() idea is fundamentally unsafe - it seems
 141  * that the intention is to allow exporting memory allocated via the
 142  * coherent DMA APIs through the dma_buf API, which only accepts a
 143  * scattertable.  This presents a couple of problems:
 144  * 1. Not all memory allocated via the coherent DMA APIs is backed by
 145  *    a struct page
 146  * 2. Passing coherent DMA memory into the streaming APIs is not allowed
 147  *    as we will try to flush the memory through a different alias to that
 148  *    actually being used (and the flushes are redundant.)
 149  */
 150 int dma_get_sgtable_attrs(struct device *dev, struct sg_table *sgt,
 151                 void *cpu_addr, dma_addr_t dma_addr, size_t size,
 152                 unsigned long attrs)
 153 {
 154         const struct dma_map_ops *ops = get_dma_ops(dev);
 155 
 156         if (dma_is_direct(ops))
 157                 return dma_common_get_sgtable(dev, sgt, cpu_addr, dma_addr,
 158                                 size, attrs);
 159         if (!ops->get_sgtable)
 160                 return -ENXIO;
 161         return ops->get_sgtable(dev, sgt, cpu_addr, dma_addr, size, attrs);
 162 }
 163 EXPORT_SYMBOL(dma_get_sgtable_attrs);
 164 
 165 #ifdef CONFIG_MMU
 166 /*
 167  * Return the page attributes used for mapping dma_alloc_* memory, either in
 168  * kernel space if remapping is needed, or to userspace through dma_mmap_*.
 169  */
 170 pgprot_t dma_pgprot(struct device *dev, pgprot_t prot, unsigned long attrs)
 171 {
 172         if (force_dma_unencrypted(dev))
 173                 prot = pgprot_decrypted(prot);
 174         if (dev_is_dma_coherent(dev) ||
 175             (IS_ENABLED(CONFIG_DMA_NONCOHERENT_CACHE_SYNC) &&
 176              (attrs & DMA_ATTR_NON_CONSISTENT)))
 177                 return prot;
 178 #ifdef CONFIG_ARCH_HAS_DMA_WRITE_COMBINE
 179         if (attrs & DMA_ATTR_WRITE_COMBINE)
 180                 return pgprot_writecombine(prot);
 181 #endif
 182         return pgprot_dmacoherent(prot);
 183 }
 184 #endif /* CONFIG_MMU */
 185 
 186 /*
 187  * Create userspace mapping for the DMA-coherent memory.
 188  */
 189 int dma_common_mmap(struct device *dev, struct vm_area_struct *vma,
 190                 void *cpu_addr, dma_addr_t dma_addr, size_t size,
 191                 unsigned long attrs)
 192 {
 193 #ifdef CONFIG_MMU
 194         unsigned long user_count = vma_pages(vma);
 195         unsigned long count = PAGE_ALIGN(size) >> PAGE_SHIFT;
 196         unsigned long off = vma->vm_pgoff;
 197         unsigned long pfn;
 198         int ret = -ENXIO;
 199 
 200         vma->vm_page_prot = dma_pgprot(dev, vma->vm_page_prot, attrs);
 201 
 202         if (dma_mmap_from_dev_coherent(dev, vma, cpu_addr, size, &ret))
 203                 return ret;
 204 
 205         if (off >= count || user_count > count - off)
 206                 return -ENXIO;
 207 
 208         if (!dev_is_dma_coherent(dev)) {
 209                 if (!IS_ENABLED(CONFIG_ARCH_HAS_DMA_COHERENT_TO_PFN))
 210                         return -ENXIO;
 211 
 212                 /* If the PFN is not valid, we do not have a struct page */
 213                 pfn = arch_dma_coherent_to_pfn(dev, cpu_addr, dma_addr);
 214                 if (!pfn_valid(pfn))
 215                         return -ENXIO;
 216         } else {
 217                 pfn = page_to_pfn(virt_to_page(cpu_addr));
 218         }
 219 
 220         return remap_pfn_range(vma, vma->vm_start, pfn + vma->vm_pgoff,
 221                         user_count << PAGE_SHIFT, vma->vm_page_prot);
 222 #else
 223         return -ENXIO;
 224 #endif /* CONFIG_MMU */
 225 }
 226 
 227 /**
 228  * dma_can_mmap - check if a given device supports dma_mmap_*
 229  * @dev: device to check
 230  *
 231  * Returns %true if @dev supports dma_mmap_coherent() and dma_mmap_attrs() to
 232  * map DMA allocations to userspace.
 233  */
 234 bool dma_can_mmap(struct device *dev)
 235 {
 236         const struct dma_map_ops *ops = get_dma_ops(dev);
 237 
 238         if (dma_is_direct(ops)) {
 239                 return IS_ENABLED(CONFIG_MMU) &&
 240                        (dev_is_dma_coherent(dev) ||
 241                         IS_ENABLED(CONFIG_ARCH_HAS_DMA_COHERENT_TO_PFN));
 242         }
 243 
 244         return ops->mmap != NULL;
 245 }
 246 EXPORT_SYMBOL_GPL(dma_can_mmap);
 247 
 248 /**
 249  * dma_mmap_attrs - map a coherent DMA allocation into user space
 250  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
 251  * @vma: vm_area_struct describing requested user mapping
 252  * @cpu_addr: kernel CPU-view address returned from dma_alloc_attrs
 253  * @dma_addr: device-view address returned from dma_alloc_attrs
 254  * @size: size of memory originally requested in dma_alloc_attrs
 255  * @attrs: attributes of mapping properties requested in dma_alloc_attrs
 256  *
 257  * Map a coherent DMA buffer previously allocated by dma_alloc_attrs into user
 258  * space.  The coherent DMA buffer must not be freed by the driver until the
 259  * user space mapping has been released.
 260  */
 261 int dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma,
 262                 void *cpu_addr, dma_addr_t dma_addr, size_t size,
 263                 unsigned long attrs)
 264 {
 265         const struct dma_map_ops *ops = get_dma_ops(dev);
 266 
 267         if (dma_is_direct(ops))
 268                 return dma_common_mmap(dev, vma, cpu_addr, dma_addr, size,
 269                                 attrs);
 270         if (!ops->mmap)
 271                 return -ENXIO;
 272         return ops->mmap(dev, vma, cpu_addr, dma_addr, size, attrs);
 273 }
 274 EXPORT_SYMBOL(dma_mmap_attrs);
 275 
 276 u64 dma_get_required_mask(struct device *dev)
 277 {
 278         const struct dma_map_ops *ops = get_dma_ops(dev);
 279 
 280         if (dma_is_direct(ops))
 281                 return dma_direct_get_required_mask(dev);
 282         if (ops->get_required_mask)
 283                 return ops->get_required_mask(dev);
 284 
 285         /*
 286          * We require every DMA ops implementation to at least support a 32-bit
 287          * DMA mask (and use bounce buffering if that isn't supported in
 288          * hardware).  As the direct mapping code has its own routine to
 289          * actually report an optimal mask we default to 32-bit here as that
 290          * is the right thing for most IOMMUs, and at least not actively
 291          * harmful in general.
 292          */
 293         return DMA_BIT_MASK(32);
 294 }
 295 EXPORT_SYMBOL_GPL(dma_get_required_mask);
 296 
 297 void *dma_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle,
 298                 gfp_t flag, unsigned long attrs)
 299 {
 300         const struct dma_map_ops *ops = get_dma_ops(dev);
 301         void *cpu_addr;
 302 
 303         WARN_ON_ONCE(!dev->coherent_dma_mask);
 304 
 305         if (dma_alloc_from_dev_coherent(dev, size, dma_handle, &cpu_addr))
 306                 return cpu_addr;
 307 
 308         /* let the implementation decide on the zone to allocate from: */
 309         flag &= ~(__GFP_DMA | __GFP_DMA32 | __GFP_HIGHMEM);
 310 
 311         if (dma_is_direct(ops))
 312                 cpu_addr = dma_direct_alloc(dev, size, dma_handle, flag, attrs);
 313         else if (ops->alloc)
 314                 cpu_addr = ops->alloc(dev, size, dma_handle, flag, attrs);
 315         else
 316                 return NULL;
 317 
 318         debug_dma_alloc_coherent(dev, size, *dma_handle, cpu_addr);
 319         return cpu_addr;
 320 }
 321 EXPORT_SYMBOL(dma_alloc_attrs);
 322 
 323 void dma_free_attrs(struct device *dev, size_t size, void *cpu_addr,
 324                 dma_addr_t dma_handle, unsigned long attrs)
 325 {
 326         const struct dma_map_ops *ops = get_dma_ops(dev);
 327 
 328         if (dma_release_from_dev_coherent(dev, get_order(size), cpu_addr))
 329                 return;
 330         /*
 331          * On non-coherent platforms which implement DMA-coherent buffers via
 332          * non-cacheable remaps, ops->free() may call vunmap(). Thus getting
 333          * this far in IRQ context is a) at risk of a BUG_ON() or trying to
 334          * sleep on some machines, and b) an indication that the driver is
 335          * probably misusing the coherent API anyway.
 336          */
 337         WARN_ON(irqs_disabled());
 338 
 339         if (!cpu_addr)
 340                 return;
 341 
 342         debug_dma_free_coherent(dev, size, cpu_addr, dma_handle);
 343         if (dma_is_direct(ops))
 344                 dma_direct_free(dev, size, cpu_addr, dma_handle, attrs);
 345         else if (ops->free)
 346                 ops->free(dev, size, cpu_addr, dma_handle, attrs);
 347 }
 348 EXPORT_SYMBOL(dma_free_attrs);
 349 
 350 int dma_supported(struct device *dev, u64 mask)
 351 {
 352         const struct dma_map_ops *ops = get_dma_ops(dev);
 353 
 354         if (dma_is_direct(ops))
 355                 return dma_direct_supported(dev, mask);
 356         if (!ops->dma_supported)
 357                 return 1;
 358         return ops->dma_supported(dev, mask);
 359 }
 360 EXPORT_SYMBOL(dma_supported);
 361 
 362 #ifdef CONFIG_ARCH_HAS_DMA_SET_MASK
 363 void arch_dma_set_mask(struct device *dev, u64 mask);
 364 #else
 365 #define arch_dma_set_mask(dev, mask)    do { } while (0)
 366 #endif
 367 
 368 int dma_set_mask(struct device *dev, u64 mask)
 369 {
 370         /*
 371          * Truncate the mask to the actually supported dma_addr_t width to
 372          * avoid generating unsupportable addresses.
 373          */
 374         mask = (dma_addr_t)mask;
 375 
 376         if (!dev->dma_mask || !dma_supported(dev, mask))
 377                 return -EIO;
 378 
 379         arch_dma_set_mask(dev, mask);
 380         *dev->dma_mask = mask;
 381         return 0;
 382 }
 383 EXPORT_SYMBOL(dma_set_mask);
 384 
 385 #ifndef CONFIG_ARCH_HAS_DMA_SET_COHERENT_MASK
 386 int dma_set_coherent_mask(struct device *dev, u64 mask)
 387 {
 388         /*
 389          * Truncate the mask to the actually supported dma_addr_t width to
 390          * avoid generating unsupportable addresses.
 391          */
 392         mask = (dma_addr_t)mask;
 393 
 394         if (!dma_supported(dev, mask))
 395                 return -EIO;
 396 
 397         dev->coherent_dma_mask = mask;
 398         return 0;
 399 }
 400 EXPORT_SYMBOL(dma_set_coherent_mask);
 401 #endif
 402 
 403 void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
 404                 enum dma_data_direction dir)
 405 {
 406         const struct dma_map_ops *ops = get_dma_ops(dev);
 407 
 408         BUG_ON(!valid_dma_direction(dir));
 409 
 410         if (dma_is_direct(ops))
 411                 arch_dma_cache_sync(dev, vaddr, size, dir);
 412         else if (ops->cache_sync)
 413                 ops->cache_sync(dev, vaddr, size, dir);
 414 }
 415 EXPORT_SYMBOL(dma_cache_sync);
 416 
 417 size_t dma_max_mapping_size(struct device *dev)
 418 {
 419         const struct dma_map_ops *ops = get_dma_ops(dev);
 420         size_t size = SIZE_MAX;
 421 
 422         if (dma_is_direct(ops))
 423                 size = dma_direct_max_mapping_size(dev);
 424         else if (ops && ops->max_mapping_size)
 425                 size = ops->max_mapping_size(dev);
 426 
 427         return size;
 428 }
 429 EXPORT_SYMBOL_GPL(dma_max_mapping_size);
 430 
 431 unsigned long dma_get_merge_boundary(struct device *dev)
 432 {
 433         const struct dma_map_ops *ops = get_dma_ops(dev);
 434 
 435         if (!ops || !ops->get_merge_boundary)
 436                 return 0;       /* can't merge */
 437 
 438         return ops->get_merge_boundary(dev);
 439 }
 440 EXPORT_SYMBOL_GPL(dma_get_merge_boundary);