root/sound/soc/rockchip/rockchip_pdm.h

INCLUDED FROM

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /*
   3  * Rockchip PDM ALSA SoC Digital Audio Interface(DAI)  driver
   4  *
   5  * Copyright (C) 2017 Fuzhou Rockchip Electronics Co., Ltd
   6  */
   7 
   8 #ifndef _ROCKCHIP_PDM_H
   9 #define _ROCKCHIP_PDM_H
  10 
  11 /* PDM REGS */
  12 #define PDM_SYSCONFIG   (0x0000)
  13 #define PDM_CTRL0       (0x0004)
  14 #define PDM_CTRL1       (0x0008)
  15 #define PDM_CLK_CTRL    (0x000c)
  16 #define PDM_HPF_CTRL    (0x0010)
  17 #define PDM_FIFO_CTRL   (0x0014)
  18 #define PDM_DMA_CTRL    (0x0018)
  19 #define PDM_INT_EN      (0x001c)
  20 #define PDM_INT_CLR     (0x0020)
  21 #define PDM_INT_ST      (0x0024)
  22 #define PDM_RXFIFO_DATA (0x0030)
  23 #define PDM_DATA_VALID  (0x0054)
  24 #define PDM_VERSION     (0x0058)
  25 
  26 /* PDM_SYSCONFIG */
  27 #define PDM_RX_MASK             (0x1 << 2)
  28 #define PDM_RX_START            (0x1 << 2)
  29 #define PDM_RX_STOP             (0x0 << 2)
  30 #define PDM_RX_CLR_MASK         (0x1 << 0)
  31 #define PDM_RX_CLR_WR           (0x1 << 0)
  32 #define PDM_RX_CLR_DONE         (0x0 << 0)
  33 
  34 /* PDM CTRL0 */
  35 #define PDM_PATH_MSK            (0xf << 27)
  36 #define PDM_MODE_MSK            BIT(31)
  37 #define PDM_MODE_RJ             0
  38 #define PDM_MODE_LJ             BIT(31)
  39 #define PDM_PATH3_EN            BIT(30)
  40 #define PDM_PATH2_EN            BIT(29)
  41 #define PDM_PATH1_EN            BIT(28)
  42 #define PDM_PATH0_EN            BIT(27)
  43 #define PDM_HWT_EN              BIT(26)
  44 #define PDM_VDW_MSK             (0x1f << 0)
  45 #define PDM_VDW(X)              ((X - 1) << 0)
  46 
  47 /* PDM CTRL1 */
  48 #define PDM_FD_NUMERATOR_SFT    16
  49 #define PDM_FD_NUMERATOR_MSK    GENMASK(31, 16)
  50 #define PDM_FD_DENOMINATOR_SFT  0
  51 #define PDM_FD_DENOMINATOR_MSK  GENMASK(15, 0)
  52 
  53 /* PDM CLK CTRL */
  54 #define PDM_CLK_FD_RATIO_MSK    BIT(6)
  55 #define PDM_CLK_FD_RATIO_40     (0X0 << 6)
  56 #define PDM_CLK_FD_RATIO_35     BIT(6)
  57 #define PDM_CLK_MSK             BIT(5)
  58 #define PDM_CLK_EN              BIT(5)
  59 #define PDM_CLK_DIS             (0x0 << 5)
  60 #define PDM_CKP_MSK             BIT(3)
  61 #define PDM_CKP_NORMAL          (0x0 << 3)
  62 #define PDM_CKP_INVERTED        BIT(3)
  63 #define PDM_DS_RATIO_MSK        (0x7 << 0)
  64 #define PDM_CLK_320FS           (0x0 << 0)
  65 #define PDM_CLK_640FS           (0x1 << 0)
  66 #define PDM_CLK_1280FS          (0x2 << 0)
  67 #define PDM_CLK_2560FS          (0x3 << 0)
  68 #define PDM_CLK_5120FS          (0x4 << 0)
  69 
  70 /* PDM HPF CTRL */
  71 #define PDM_HPF_LE              BIT(3)
  72 #define PDM_HPF_RE              BIT(2)
  73 #define PDM_HPF_CF_MSK          (0x3 << 0)
  74 #define PDM_HPF_3P79HZ          (0x0 << 0)
  75 #define PDM_HPF_60HZ            (0x1 << 0)
  76 #define PDM_HPF_243HZ           (0x2 << 0)
  77 #define PDM_HPF_493HZ           (0x3 << 0)
  78 
  79 /* PDM DMA CTRL */
  80 #define PDM_DMA_RD_MSK          BIT(8)
  81 #define PDM_DMA_RD_EN           BIT(8)
  82 #define PDM_DMA_RD_DIS          (0x0 << 8)
  83 #define PDM_DMA_RDL_MSK         (0x7f << 0)
  84 #define PDM_DMA_RDL(X)          ((X - 1) << 0)
  85 
  86 #endif /* _ROCKCHIP_PDM_H */