This source file includes following definitions.
- q6slim_hw_params
- q6hdmi_hw_params
- q6i2s_hw_params
- q6i2s_set_fmt
- q6tdm_set_tdm_slot
- q6tdm_set_channel_map
- q6tdm_hw_params
- q6afe_dai_shutdown
- q6afe_dai_prepare
- q6slim_set_channel_map
- q6afe_mi2s_set_sysclk
- msm_dai_q6_dai_probe
- msm_dai_q6_dai_remove
- q6afe_of_xlate_dai_name
- of_q6afe_parse_dai_data
- q6afe_dai_dev_probe
1
2
3
4
5 #include <linux/err.h>
6 #include <linux/init.h>
7 #include <linux/module.h>
8 #include <linux/device.h>
9 #include <linux/platform_device.h>
10 #include <linux/slab.h>
11 #include <sound/pcm.h>
12 #include <sound/soc.h>
13 #include <sound/pcm_params.h>
14 #include "q6afe.h"
15
16 #define Q6AFE_TDM_PB_DAI(pre, num, did) { \
17 .playback = { \
18 .stream_name = pre" TDM"#num" Playback", \
19 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\
20 SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000 |\
21 SNDRV_PCM_RATE_176400, \
22 .formats = SNDRV_PCM_FMTBIT_S16_LE | \
23 SNDRV_PCM_FMTBIT_S24_LE | \
24 SNDRV_PCM_FMTBIT_S32_LE, \
25 .channels_min = 1, \
26 .channels_max = 8, \
27 .rate_min = 8000, \
28 .rate_max = 176400, \
29 }, \
30 .name = #did, \
31 .ops = &q6tdm_ops, \
32 .id = did, \
33 .probe = msm_dai_q6_dai_probe, \
34 .remove = msm_dai_q6_dai_remove, \
35 }
36
37 #define Q6AFE_TDM_CAP_DAI(pre, num, did) { \
38 .capture = { \
39 .stream_name = pre" TDM"#num" Capture", \
40 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\
41 SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000 |\
42 SNDRV_PCM_RATE_176400, \
43 .formats = SNDRV_PCM_FMTBIT_S16_LE | \
44 SNDRV_PCM_FMTBIT_S24_LE | \
45 SNDRV_PCM_FMTBIT_S32_LE, \
46 .channels_min = 1, \
47 .channels_max = 8, \
48 .rate_min = 8000, \
49 .rate_max = 176400, \
50 }, \
51 .name = #did, \
52 .ops = &q6tdm_ops, \
53 .id = did, \
54 .probe = msm_dai_q6_dai_probe, \
55 .remove = msm_dai_q6_dai_remove, \
56 }
57
58 struct q6afe_dai_priv_data {
59 uint32_t sd_line_mask;
60 uint32_t sync_mode;
61 uint32_t sync_src;
62 uint32_t data_out_enable;
63 uint32_t invert_sync;
64 uint32_t data_delay;
65 uint32_t data_align;
66 };
67
68 struct q6afe_dai_data {
69 struct q6afe_port *port[AFE_PORT_MAX];
70 struct q6afe_port_config port_config[AFE_PORT_MAX];
71 bool is_port_started[AFE_PORT_MAX];
72 struct q6afe_dai_priv_data priv[AFE_PORT_MAX];
73 };
74
75 static int q6slim_hw_params(struct snd_pcm_substream *substream,
76 struct snd_pcm_hw_params *params,
77 struct snd_soc_dai *dai)
78 {
79
80 struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
81 struct q6afe_slim_cfg *slim = &dai_data->port_config[dai->id].slim;
82
83 slim->sample_rate = params_rate(params);
84
85 switch (params_format(params)) {
86 case SNDRV_PCM_FORMAT_S16_LE:
87 case SNDRV_PCM_FORMAT_SPECIAL:
88 slim->bit_width = 16;
89 break;
90 case SNDRV_PCM_FORMAT_S24_LE:
91 slim->bit_width = 24;
92 break;
93 case SNDRV_PCM_FORMAT_S32_LE:
94 slim->bit_width = 32;
95 break;
96 default:
97 pr_err("%s: format %d\n",
98 __func__, params_format(params));
99 return -EINVAL;
100 }
101
102 return 0;
103 }
104
105 static int q6hdmi_hw_params(struct snd_pcm_substream *substream,
106 struct snd_pcm_hw_params *params,
107 struct snd_soc_dai *dai)
108 {
109 struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
110 int channels = params_channels(params);
111 struct q6afe_hdmi_cfg *hdmi = &dai_data->port_config[dai->id].hdmi;
112
113 hdmi->sample_rate = params_rate(params);
114 switch (params_format(params)) {
115 case SNDRV_PCM_FORMAT_S16_LE:
116 hdmi->bit_width = 16;
117 break;
118 case SNDRV_PCM_FORMAT_S24_LE:
119 hdmi->bit_width = 24;
120 break;
121 }
122
123
124 switch (channels) {
125 case 2:
126 hdmi->channel_allocation = 0;
127 break;
128 case 3:
129 hdmi->channel_allocation = 0x02;
130 break;
131 case 4:
132 hdmi->channel_allocation = 0x06;
133 break;
134 case 5:
135 hdmi->channel_allocation = 0x0A;
136 break;
137 case 6:
138 hdmi->channel_allocation = 0x0B;
139 break;
140 case 7:
141 hdmi->channel_allocation = 0x12;
142 break;
143 case 8:
144 hdmi->channel_allocation = 0x13;
145 break;
146 default:
147 dev_err(dai->dev, "invalid Channels = %u\n", channels);
148 return -EINVAL;
149 }
150
151 return 0;
152 }
153
154 static int q6i2s_hw_params(struct snd_pcm_substream *substream,
155 struct snd_pcm_hw_params *params,
156 struct snd_soc_dai *dai)
157 {
158 struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
159 struct q6afe_i2s_cfg *i2s = &dai_data->port_config[dai->id].i2s_cfg;
160
161 i2s->sample_rate = params_rate(params);
162 i2s->bit_width = params_width(params);
163 i2s->num_channels = params_channels(params);
164 i2s->sd_line_mask = dai_data->priv[dai->id].sd_line_mask;
165
166 return 0;
167 }
168
169 static int q6i2s_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
170 {
171 struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
172 struct q6afe_i2s_cfg *i2s = &dai_data->port_config[dai->id].i2s_cfg;
173
174 i2s->fmt = fmt;
175
176 return 0;
177 }
178
179 static int q6tdm_set_tdm_slot(struct snd_soc_dai *dai,
180 unsigned int tx_mask,
181 unsigned int rx_mask,
182 int slots, int slot_width)
183 {
184
185 struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
186 struct q6afe_tdm_cfg *tdm = &dai_data->port_config[dai->id].tdm;
187 unsigned int cap_mask;
188 int rc = 0;
189
190
191 if ((slot_width != 16) && (slot_width != 32)) {
192 dev_err(dai->dev, "%s: invalid slot_width %d\n",
193 __func__, slot_width);
194 return -EINVAL;
195 }
196
197
198 switch (slots) {
199 case 2:
200 cap_mask = 0x03;
201 break;
202 case 4:
203 cap_mask = 0x0F;
204 break;
205 case 8:
206 cap_mask = 0xFF;
207 break;
208 case 16:
209 cap_mask = 0xFFFF;
210 break;
211 default:
212 dev_err(dai->dev, "%s: invalid slots %d\n",
213 __func__, slots);
214 return -EINVAL;
215 }
216
217 switch (dai->id) {
218 case PRIMARY_TDM_RX_0 ... QUINARY_TDM_TX_7:
219 tdm->nslots_per_frame = slots;
220 tdm->slot_width = slot_width;
221
222 tdm->slot_mask = (dai->id & 0x1 ? tx_mask : rx_mask) & cap_mask;
223 break;
224 default:
225 dev_err(dai->dev, "%s: invalid dai id 0x%x\n",
226 __func__, dai->id);
227 return -EINVAL;
228 }
229
230 return rc;
231 }
232
233 static int q6tdm_set_channel_map(struct snd_soc_dai *dai,
234 unsigned int tx_num, unsigned int *tx_slot,
235 unsigned int rx_num, unsigned int *rx_slot)
236 {
237
238 struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
239 struct q6afe_tdm_cfg *tdm = &dai_data->port_config[dai->id].tdm;
240 int rc = 0;
241 int i = 0;
242
243 switch (dai->id) {
244 case PRIMARY_TDM_RX_0 ... QUINARY_TDM_TX_7:
245 if (dai->id & 0x1) {
246 if (!tx_slot) {
247 dev_err(dai->dev, "tx slot not found\n");
248 return -EINVAL;
249 }
250 if (tx_num > AFE_PORT_MAX_AUDIO_CHAN_CNT) {
251 dev_err(dai->dev, "invalid tx num %d\n",
252 tx_num);
253 return -EINVAL;
254 }
255
256 for (i = 0; i < tx_num; i++)
257 tdm->ch_mapping[i] = tx_slot[i];
258
259 for (i = tx_num; i < AFE_PORT_MAX_AUDIO_CHAN_CNT; i++)
260 tdm->ch_mapping[i] = Q6AFE_CMAP_INVALID;
261
262 tdm->num_channels = tx_num;
263 } else {
264
265 if (!rx_slot) {
266 dev_err(dai->dev, "rx slot not found\n");
267 return -EINVAL;
268 }
269 if (rx_num > AFE_PORT_MAX_AUDIO_CHAN_CNT) {
270 dev_err(dai->dev, "invalid rx num %d\n",
271 rx_num);
272 return -EINVAL;
273 }
274
275 for (i = 0; i < rx_num; i++)
276 tdm->ch_mapping[i] = rx_slot[i];
277
278 for (i = rx_num; i < AFE_PORT_MAX_AUDIO_CHAN_CNT; i++)
279 tdm->ch_mapping[i] = Q6AFE_CMAP_INVALID;
280
281 tdm->num_channels = rx_num;
282 }
283
284 break;
285 default:
286 dev_err(dai->dev, "%s: invalid dai id 0x%x\n",
287 __func__, dai->id);
288 return -EINVAL;
289 }
290
291 return rc;
292 }
293
294 static int q6tdm_hw_params(struct snd_pcm_substream *substream,
295 struct snd_pcm_hw_params *params,
296 struct snd_soc_dai *dai)
297 {
298 struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
299 struct q6afe_tdm_cfg *tdm = &dai_data->port_config[dai->id].tdm;
300
301 tdm->bit_width = params_width(params);
302 tdm->sample_rate = params_rate(params);
303 tdm->num_channels = params_channels(params);
304 tdm->data_align_type = dai_data->priv[dai->id].data_align;
305 tdm->sync_src = dai_data->priv[dai->id].sync_src;
306 tdm->sync_mode = dai_data->priv[dai->id].sync_mode;
307
308 return 0;
309 }
310 static void q6afe_dai_shutdown(struct snd_pcm_substream *substream,
311 struct snd_soc_dai *dai)
312 {
313 struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
314 int rc;
315
316 if (!dai_data->is_port_started[dai->id])
317 return;
318
319 rc = q6afe_port_stop(dai_data->port[dai->id]);
320 if (rc < 0)
321 dev_err(dai->dev, "fail to close AFE port (%d)\n", rc);
322
323 dai_data->is_port_started[dai->id] = false;
324
325 }
326
327 static int q6afe_dai_prepare(struct snd_pcm_substream *substream,
328 struct snd_soc_dai *dai)
329 {
330 struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
331 int rc;
332
333 if (dai_data->is_port_started[dai->id]) {
334
335 rc = q6afe_port_stop(dai_data->port[dai->id]);
336 if (rc < 0) {
337 dev_err(dai->dev, "fail to close AFE port (%d)\n", rc);
338 return rc;
339 }
340 }
341
342 switch (dai->id) {
343 case HDMI_RX:
344 case DISPLAY_PORT_RX:
345 q6afe_hdmi_port_prepare(dai_data->port[dai->id],
346 &dai_data->port_config[dai->id].hdmi);
347 break;
348 case SLIMBUS_0_RX ... SLIMBUS_6_TX:
349 q6afe_slim_port_prepare(dai_data->port[dai->id],
350 &dai_data->port_config[dai->id].slim);
351 break;
352 case PRIMARY_MI2S_RX ... QUATERNARY_MI2S_TX:
353 rc = q6afe_i2s_port_prepare(dai_data->port[dai->id],
354 &dai_data->port_config[dai->id].i2s_cfg);
355 if (rc < 0) {
356 dev_err(dai->dev, "fail to prepare AFE port %x\n",
357 dai->id);
358 return rc;
359 }
360 break;
361 case PRIMARY_TDM_RX_0 ... QUINARY_TDM_TX_7:
362 q6afe_tdm_port_prepare(dai_data->port[dai->id],
363 &dai_data->port_config[dai->id].tdm);
364 break;
365 default:
366 return -EINVAL;
367 }
368
369 rc = q6afe_port_start(dai_data->port[dai->id]);
370 if (rc < 0) {
371 dev_err(dai->dev, "fail to start AFE port %x\n", dai->id);
372 return rc;
373 }
374 dai_data->is_port_started[dai->id] = true;
375
376 return 0;
377 }
378
379 static int q6slim_set_channel_map(struct snd_soc_dai *dai,
380 unsigned int tx_num, unsigned int *tx_slot,
381 unsigned int rx_num, unsigned int *rx_slot)
382 {
383 struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
384 struct q6afe_port_config *pcfg = &dai_data->port_config[dai->id];
385 int i;
386
387 if (dai->id & 0x1) {
388
389 if (!tx_slot) {
390 pr_err("%s: tx slot not found\n", __func__);
391 return -EINVAL;
392 }
393
394 for (i = 0; i < tx_num; i++)
395 pcfg->slim.ch_mapping[i] = tx_slot[i];
396
397 pcfg->slim.num_channels = tx_num;
398
399
400 } else {
401 if (!rx_slot) {
402 pr_err("%s: rx slot not found\n", __func__);
403 return -EINVAL;
404 }
405
406 for (i = 0; i < rx_num; i++)
407 pcfg->slim.ch_mapping[i] = rx_slot[i];
408
409 pcfg->slim.num_channels = rx_num;
410
411 }
412
413 return 0;
414 }
415
416 static int q6afe_mi2s_set_sysclk(struct snd_soc_dai *dai,
417 int clk_id, unsigned int freq, int dir)
418 {
419 struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
420 struct q6afe_port *port = dai_data->port[dai->id];
421
422 switch (clk_id) {
423 case LPAIF_DIG_CLK:
424 return q6afe_port_set_sysclk(port, clk_id, 0, 5, freq, dir);
425 case LPAIF_BIT_CLK:
426 case LPAIF_OSR_CLK:
427 return q6afe_port_set_sysclk(port, clk_id,
428 Q6AFE_LPASS_CLK_SRC_INTERNAL,
429 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
430 freq, dir);
431 case Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT ... Q6AFE_LPASS_CLK_ID_QUI_MI2S_OSR:
432 case Q6AFE_LPASS_CLK_ID_MCLK_1 ... Q6AFE_LPASS_CLK_ID_INT_MCLK_1:
433 return q6afe_port_set_sysclk(port, clk_id,
434 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
435 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
436 freq, dir);
437 case Q6AFE_LPASS_CLK_ID_PRI_TDM_IBIT ... Q6AFE_LPASS_CLK_ID_QUIN_TDM_EBIT:
438 return q6afe_port_set_sysclk(port, clk_id,
439 Q6AFE_LPASS_CLK_ATTRIBUTE_INVERT_COUPLE_NO,
440 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
441 freq, dir);
442 }
443
444 return 0;
445 }
446
447 static const struct snd_soc_dapm_route q6afe_dapm_routes[] = {
448 {"HDMI Playback", NULL, "HDMI_RX"},
449 {"Display Port Playback", NULL, "DISPLAY_PORT_RX"},
450 {"Slimbus Playback", NULL, "SLIMBUS_0_RX"},
451 {"Slimbus1 Playback", NULL, "SLIMBUS_1_RX"},
452 {"Slimbus2 Playback", NULL, "SLIMBUS_2_RX"},
453 {"Slimbus3 Playback", NULL, "SLIMBUS_3_RX"},
454 {"Slimbus4 Playback", NULL, "SLIMBUS_4_RX"},
455 {"Slimbus5 Playback", NULL, "SLIMBUS_5_RX"},
456 {"Slimbus6 Playback", NULL, "SLIMBUS_6_RX"},
457
458 {"SLIMBUS_0_TX", NULL, "Slimbus Capture"},
459 {"SLIMBUS_1_TX", NULL, "Slimbus1 Capture"},
460 {"SLIMBUS_2_TX", NULL, "Slimbus2 Capture"},
461 {"SLIMBUS_3_TX", NULL, "Slimbus3 Capture"},
462 {"SLIMBUS_4_TX", NULL, "Slimbus4 Capture"},
463 {"SLIMBUS_5_TX", NULL, "Slimbus5 Capture"},
464 {"SLIMBUS_6_TX", NULL, "Slimbus6 Capture"},
465
466 {"Primary MI2S Playback", NULL, "PRI_MI2S_RX"},
467 {"Secondary MI2S Playback", NULL, "SEC_MI2S_RX"},
468 {"Tertiary MI2S Playback", NULL, "TERT_MI2S_RX"},
469 {"Quaternary MI2S Playback", NULL, "QUAT_MI2S_RX"},
470
471 {"Primary TDM0 Playback", NULL, "PRIMARY_TDM_RX_0"},
472 {"Primary TDM1 Playback", NULL, "PRIMARY_TDM_RX_1"},
473 {"Primary TDM2 Playback", NULL, "PRIMARY_TDM_RX_2"},
474 {"Primary TDM3 Playback", NULL, "PRIMARY_TDM_RX_3"},
475 {"Primary TDM4 Playback", NULL, "PRIMARY_TDM_RX_4"},
476 {"Primary TDM5 Playback", NULL, "PRIMARY_TDM_RX_5"},
477 {"Primary TDM6 Playback", NULL, "PRIMARY_TDM_RX_6"},
478 {"Primary TDM7 Playback", NULL, "PRIMARY_TDM_RX_7"},
479
480 {"Secondary TDM0 Playback", NULL, "SEC_TDM_RX_0"},
481 {"Secondary TDM1 Playback", NULL, "SEC_TDM_RX_1"},
482 {"Secondary TDM2 Playback", NULL, "SEC_TDM_RX_2"},
483 {"Secondary TDM3 Playback", NULL, "SEC_TDM_RX_3"},
484 {"Secondary TDM4 Playback", NULL, "SEC_TDM_RX_4"},
485 {"Secondary TDM5 Playback", NULL, "SEC_TDM_RX_5"},
486 {"Secondary TDM6 Playback", NULL, "SEC_TDM_RX_6"},
487 {"Secondary TDM7 Playback", NULL, "SEC_TDM_RX_7"},
488
489 {"Tertiary TDM0 Playback", NULL, "TERT_TDM_RX_0"},
490 {"Tertiary TDM1 Playback", NULL, "TERT_TDM_RX_1"},
491 {"Tertiary TDM2 Playback", NULL, "TERT_TDM_RX_2"},
492 {"Tertiary TDM3 Playback", NULL, "TERT_TDM_RX_3"},
493 {"Tertiary TDM4 Playback", NULL, "TERT_TDM_RX_4"},
494 {"Tertiary TDM5 Playback", NULL, "TERT_TDM_RX_5"},
495 {"Tertiary TDM6 Playback", NULL, "TERT_TDM_RX_6"},
496 {"Tertiary TDM7 Playback", NULL, "TERT_TDM_RX_7"},
497
498 {"Quaternary TDM0 Playback", NULL, "QUAT_TDM_RX_0"},
499 {"Quaternary TDM1 Playback", NULL, "QUAT_TDM_RX_1"},
500 {"Quaternary TDM2 Playback", NULL, "QUAT_TDM_RX_2"},
501 {"Quaternary TDM3 Playback", NULL, "QUAT_TDM_RX_3"},
502 {"Quaternary TDM4 Playback", NULL, "QUAT_TDM_RX_4"},
503 {"Quaternary TDM5 Playback", NULL, "QUAT_TDM_RX_5"},
504 {"Quaternary TDM6 Playback", NULL, "QUAT_TDM_RX_6"},
505 {"Quaternary TDM7 Playback", NULL, "QUAT_TDM_RX_7"},
506
507 {"Quinary TDM0 Playback", NULL, "QUIN_TDM_RX_0"},
508 {"Quinary TDM1 Playback", NULL, "QUIN_TDM_RX_1"},
509 {"Quinary TDM2 Playback", NULL, "QUIN_TDM_RX_2"},
510 {"Quinary TDM3 Playback", NULL, "QUIN_TDM_RX_3"},
511 {"Quinary TDM4 Playback", NULL, "QUIN_TDM_RX_4"},
512 {"Quinary TDM5 Playback", NULL, "QUIN_TDM_RX_5"},
513 {"Quinary TDM6 Playback", NULL, "QUIN_TDM_RX_6"},
514 {"Quinary TDM7 Playback", NULL, "QUIN_TDM_RX_7"},
515
516 {"PRIMARY_TDM_TX_0", NULL, "Primary TDM0 Capture"},
517 {"PRIMARY_TDM_TX_1", NULL, "Primary TDM1 Capture"},
518 {"PRIMARY_TDM_TX_2", NULL, "Primary TDM2 Capture"},
519 {"PRIMARY_TDM_TX_3", NULL, "Primary TDM3 Capture"},
520 {"PRIMARY_TDM_TX_4", NULL, "Primary TDM4 Capture"},
521 {"PRIMARY_TDM_TX_5", NULL, "Primary TDM5 Capture"},
522 {"PRIMARY_TDM_TX_6", NULL, "Primary TDM6 Capture"},
523 {"PRIMARY_TDM_TX_7", NULL, "Primary TDM7 Capture"},
524
525 {"SEC_TDM_TX_0", NULL, "Secondary TDM0 Capture"},
526 {"SEC_TDM_TX_1", NULL, "Secondary TDM1 Capture"},
527 {"SEC_TDM_TX_2", NULL, "Secondary TDM2 Capture"},
528 {"SEC_TDM_TX_3", NULL, "Secondary TDM3 Capture"},
529 {"SEC_TDM_TX_4", NULL, "Secondary TDM4 Capture"},
530 {"SEC_TDM_TX_5", NULL, "Secondary TDM5 Capture"},
531 {"SEC_TDM_TX_6", NULL, "Secondary TDM6 Capture"},
532 {"SEC_TDM_TX_7", NULL, "Secondary TDM7 Capture"},
533
534 {"TERT_TDM_TX_0", NULL, "Tertiary TDM0 Capture"},
535 {"TERT_TDM_TX_1", NULL, "Tertiary TDM1 Capture"},
536 {"TERT_TDM_TX_2", NULL, "Tertiary TDM2 Capture"},
537 {"TERT_TDM_TX_3", NULL, "Tertiary TDM3 Capture"},
538 {"TERT_TDM_TX_4", NULL, "Tertiary TDM4 Capture"},
539 {"TERT_TDM_TX_5", NULL, "Tertiary TDM5 Capture"},
540 {"TERT_TDM_TX_6", NULL, "Tertiary TDM6 Capture"},
541 {"TERT_TDM_TX_7", NULL, "Tertiary TDM7 Capture"},
542
543 {"QUAT_TDM_TX_0", NULL, "Quaternary TDM0 Capture"},
544 {"QUAT_TDM_TX_1", NULL, "Quaternary TDM1 Capture"},
545 {"QUAT_TDM_TX_2", NULL, "Quaternary TDM2 Capture"},
546 {"QUAT_TDM_TX_3", NULL, "Quaternary TDM3 Capture"},
547 {"QUAT_TDM_TX_4", NULL, "Quaternary TDM4 Capture"},
548 {"QUAT_TDM_TX_5", NULL, "Quaternary TDM5 Capture"},
549 {"QUAT_TDM_TX_6", NULL, "Quaternary TDM6 Capture"},
550 {"QUAT_TDM_TX_7", NULL, "Quaternary TDM7 Capture"},
551
552 {"QUIN_TDM_TX_0", NULL, "Quinary TDM0 Capture"},
553 {"QUIN_TDM_TX_1", NULL, "Quinary TDM1 Capture"},
554 {"QUIN_TDM_TX_2", NULL, "Quinary TDM2 Capture"},
555 {"QUIN_TDM_TX_3", NULL, "Quinary TDM3 Capture"},
556 {"QUIN_TDM_TX_4", NULL, "Quinary TDM4 Capture"},
557 {"QUIN_TDM_TX_5", NULL, "Quinary TDM5 Capture"},
558 {"QUIN_TDM_TX_6", NULL, "Quinary TDM6 Capture"},
559 {"QUIN_TDM_TX_7", NULL, "Quinary TDM7 Capture"},
560
561 {"TERT_MI2S_TX", NULL, "Tertiary MI2S Capture"},
562 {"PRI_MI2S_TX", NULL, "Primary MI2S Capture"},
563 {"SEC_MI2S_TX", NULL, "Secondary MI2S Capture"},
564 {"QUAT_MI2S_TX", NULL, "Quaternary MI2S Capture"},
565 };
566
567 static const struct snd_soc_dai_ops q6hdmi_ops = {
568 .prepare = q6afe_dai_prepare,
569 .hw_params = q6hdmi_hw_params,
570 .shutdown = q6afe_dai_shutdown,
571 };
572
573 static const struct snd_soc_dai_ops q6i2s_ops = {
574 .prepare = q6afe_dai_prepare,
575 .hw_params = q6i2s_hw_params,
576 .set_fmt = q6i2s_set_fmt,
577 .shutdown = q6afe_dai_shutdown,
578 .set_sysclk = q6afe_mi2s_set_sysclk,
579 };
580
581 static const struct snd_soc_dai_ops q6slim_ops = {
582 .prepare = q6afe_dai_prepare,
583 .hw_params = q6slim_hw_params,
584 .shutdown = q6afe_dai_shutdown,
585 .set_channel_map = q6slim_set_channel_map,
586 };
587
588 static const struct snd_soc_dai_ops q6tdm_ops = {
589 .prepare = q6afe_dai_prepare,
590 .shutdown = q6afe_dai_shutdown,
591 .set_sysclk = q6afe_mi2s_set_sysclk,
592 .set_tdm_slot = q6tdm_set_tdm_slot,
593 .set_channel_map = q6tdm_set_channel_map,
594 .hw_params = q6tdm_hw_params,
595 };
596
597 static int msm_dai_q6_dai_probe(struct snd_soc_dai *dai)
598 {
599 struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
600 struct q6afe_port *port;
601
602 port = q6afe_port_get_from_id(dai->dev, dai->id);
603 if (IS_ERR(port)) {
604 dev_err(dai->dev, "Unable to get afe port\n");
605 return -EINVAL;
606 }
607 dai_data->port[dai->id] = port;
608
609 return 0;
610 }
611
612 static int msm_dai_q6_dai_remove(struct snd_soc_dai *dai)
613 {
614 struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
615
616 q6afe_port_put(dai_data->port[dai->id]);
617 dai_data->port[dai->id] = NULL;
618
619 return 0;
620 }
621
622 static struct snd_soc_dai_driver q6afe_dais[] = {
623 {
624 .playback = {
625 .stream_name = "HDMI Playback",
626 .rates = SNDRV_PCM_RATE_48000 |
627 SNDRV_PCM_RATE_96000 |
628 SNDRV_PCM_RATE_192000,
629 .formats = SNDRV_PCM_FMTBIT_S16_LE |
630 SNDRV_PCM_FMTBIT_S24_LE,
631 .channels_min = 2,
632 .channels_max = 8,
633 .rate_max = 192000,
634 .rate_min = 48000,
635 },
636 .ops = &q6hdmi_ops,
637 .id = HDMI_RX,
638 .name = "HDMI",
639 .probe = msm_dai_q6_dai_probe,
640 .remove = msm_dai_q6_dai_remove,
641 }, {
642 .name = "SLIMBUS_0_RX",
643 .ops = &q6slim_ops,
644 .id = SLIMBUS_0_RX,
645 .probe = msm_dai_q6_dai_probe,
646 .remove = msm_dai_q6_dai_remove,
647 .playback = {
648 .stream_name = "Slimbus Playback",
649 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
650 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_96000 |
651 SNDRV_PCM_RATE_192000,
652 .formats = SNDRV_PCM_FMTBIT_S16_LE |
653 SNDRV_PCM_FMTBIT_S24_LE,
654 .channels_min = 1,
655 .channels_max = 8,
656 .rate_min = 8000,
657 .rate_max = 192000,
658 },
659 }, {
660 .name = "SLIMBUS_0_TX",
661 .ops = &q6slim_ops,
662 .id = SLIMBUS_0_TX,
663 .probe = msm_dai_q6_dai_probe,
664 .remove = msm_dai_q6_dai_remove,
665 .capture = {
666 .stream_name = "Slimbus Capture",
667 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
668 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_96000 |
669 SNDRV_PCM_RATE_192000,
670 .formats = SNDRV_PCM_FMTBIT_S16_LE |
671 SNDRV_PCM_FMTBIT_S24_LE,
672 .channels_min = 1,
673 .channels_max = 8,
674 .rate_min = 8000,
675 .rate_max = 192000,
676 },
677 }, {
678 .playback = {
679 .stream_name = "Slimbus1 Playback",
680 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
681 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 |
682 SNDRV_PCM_RATE_192000,
683 .formats = SNDRV_PCM_FMTBIT_S16_LE |
684 SNDRV_PCM_FMTBIT_S24_LE,
685 .channels_min = 1,
686 .channels_max = 2,
687 .rate_min = 8000,
688 .rate_max = 192000,
689 },
690 .name = "SLIMBUS_1_RX",
691 .ops = &q6slim_ops,
692 .id = SLIMBUS_1_RX,
693 .probe = msm_dai_q6_dai_probe,
694 .remove = msm_dai_q6_dai_remove,
695 }, {
696 .name = "SLIMBUS_1_TX",
697 .ops = &q6slim_ops,
698 .id = SLIMBUS_1_TX,
699 .probe = msm_dai_q6_dai_probe,
700 .remove = msm_dai_q6_dai_remove,
701 .capture = {
702 .stream_name = "Slimbus1 Capture",
703 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
704 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_96000 |
705 SNDRV_PCM_RATE_192000,
706 .formats = SNDRV_PCM_FMTBIT_S16_LE |
707 SNDRV_PCM_FMTBIT_S24_LE,
708 .channels_min = 1,
709 .channels_max = 8,
710 .rate_min = 8000,
711 .rate_max = 192000,
712 },
713 }, {
714 .playback = {
715 .stream_name = "Slimbus2 Playback",
716 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
717 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_96000 |
718 SNDRV_PCM_RATE_192000,
719 .formats = SNDRV_PCM_FMTBIT_S16_LE |
720 SNDRV_PCM_FMTBIT_S24_LE,
721 .channels_min = 1,
722 .channels_max = 8,
723 .rate_min = 8000,
724 .rate_max = 192000,
725 },
726 .name = "SLIMBUS_2_RX",
727 .ops = &q6slim_ops,
728 .id = SLIMBUS_2_RX,
729 .probe = msm_dai_q6_dai_probe,
730 .remove = msm_dai_q6_dai_remove,
731
732 }, {
733 .name = "SLIMBUS_2_TX",
734 .ops = &q6slim_ops,
735 .id = SLIMBUS_2_TX,
736 .probe = msm_dai_q6_dai_probe,
737 .remove = msm_dai_q6_dai_remove,
738 .capture = {
739 .stream_name = "Slimbus2 Capture",
740 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
741 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_96000 |
742 SNDRV_PCM_RATE_192000,
743 .formats = SNDRV_PCM_FMTBIT_S16_LE |
744 SNDRV_PCM_FMTBIT_S24_LE,
745 .channels_min = 1,
746 .channels_max = 8,
747 .rate_min = 8000,
748 .rate_max = 192000,
749 },
750 }, {
751 .playback = {
752 .stream_name = "Slimbus3 Playback",
753 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
754 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 |
755 SNDRV_PCM_RATE_192000,
756 .formats = SNDRV_PCM_FMTBIT_S16_LE |
757 SNDRV_PCM_FMTBIT_S24_LE,
758 .channels_min = 1,
759 .channels_max = 2,
760 .rate_min = 8000,
761 .rate_max = 192000,
762 },
763 .name = "SLIMBUS_3_RX",
764 .ops = &q6slim_ops,
765 .id = SLIMBUS_3_RX,
766 .probe = msm_dai_q6_dai_probe,
767 .remove = msm_dai_q6_dai_remove,
768
769 }, {
770 .name = "SLIMBUS_3_TX",
771 .ops = &q6slim_ops,
772 .id = SLIMBUS_3_TX,
773 .probe = msm_dai_q6_dai_probe,
774 .remove = msm_dai_q6_dai_remove,
775 .capture = {
776 .stream_name = "Slimbus3 Capture",
777 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
778 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_96000 |
779 SNDRV_PCM_RATE_192000,
780 .formats = SNDRV_PCM_FMTBIT_S16_LE |
781 SNDRV_PCM_FMTBIT_S24_LE,
782 .channels_min = 1,
783 .channels_max = 8,
784 .rate_min = 8000,
785 .rate_max = 192000,
786 },
787 }, {
788 .playback = {
789 .stream_name = "Slimbus4 Playback",
790 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
791 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 |
792 SNDRV_PCM_RATE_192000,
793 .formats = SNDRV_PCM_FMTBIT_S16_LE |
794 SNDRV_PCM_FMTBIT_S24_LE,
795 .channels_min = 1,
796 .channels_max = 2,
797 .rate_min = 8000,
798 .rate_max = 192000,
799 },
800 .name = "SLIMBUS_4_RX",
801 .ops = &q6slim_ops,
802 .id = SLIMBUS_4_RX,
803 .probe = msm_dai_q6_dai_probe,
804 .remove = msm_dai_q6_dai_remove,
805
806 }, {
807 .name = "SLIMBUS_4_TX",
808 .ops = &q6slim_ops,
809 .id = SLIMBUS_4_TX,
810 .probe = msm_dai_q6_dai_probe,
811 .remove = msm_dai_q6_dai_remove,
812 .capture = {
813 .stream_name = "Slimbus4 Capture",
814 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
815 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_96000 |
816 SNDRV_PCM_RATE_192000,
817 .formats = SNDRV_PCM_FMTBIT_S16_LE |
818 SNDRV_PCM_FMTBIT_S24_LE,
819 .channels_min = 1,
820 .channels_max = 8,
821 .rate_min = 8000,
822 .rate_max = 192000,
823 },
824 }, {
825 .playback = {
826 .stream_name = "Slimbus5 Playback",
827 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
828 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 |
829 SNDRV_PCM_RATE_192000,
830 .formats = SNDRV_PCM_FMTBIT_S16_LE |
831 SNDRV_PCM_FMTBIT_S24_LE,
832 .channels_min = 1,
833 .channels_max = 2,
834 .rate_min = 8000,
835 .rate_max = 192000,
836 },
837 .name = "SLIMBUS_5_RX",
838 .ops = &q6slim_ops,
839 .id = SLIMBUS_5_RX,
840 .probe = msm_dai_q6_dai_probe,
841 .remove = msm_dai_q6_dai_remove,
842
843 }, {
844 .name = "SLIMBUS_5_TX",
845 .ops = &q6slim_ops,
846 .id = SLIMBUS_5_TX,
847 .probe = msm_dai_q6_dai_probe,
848 .remove = msm_dai_q6_dai_remove,
849 .capture = {
850 .stream_name = "Slimbus5 Capture",
851 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
852 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_96000 |
853 SNDRV_PCM_RATE_192000,
854 .formats = SNDRV_PCM_FMTBIT_S16_LE |
855 SNDRV_PCM_FMTBIT_S24_LE,
856 .channels_min = 1,
857 .channels_max = 8,
858 .rate_min = 8000,
859 .rate_max = 192000,
860 },
861 }, {
862 .playback = {
863 .stream_name = "Slimbus6 Playback",
864 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
865 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 |
866 SNDRV_PCM_RATE_192000,
867 .formats = SNDRV_PCM_FMTBIT_S16_LE |
868 SNDRV_PCM_FMTBIT_S24_LE,
869 .channels_min = 1,
870 .channels_max = 2,
871 .rate_min = 8000,
872 .rate_max = 192000,
873 },
874 .ops = &q6slim_ops,
875 .name = "SLIMBUS_6_RX",
876 .id = SLIMBUS_6_RX,
877 .probe = msm_dai_q6_dai_probe,
878 .remove = msm_dai_q6_dai_remove,
879
880 }, {
881 .name = "SLIMBUS_6_TX",
882 .ops = &q6slim_ops,
883 .id = SLIMBUS_6_TX,
884 .probe = msm_dai_q6_dai_probe,
885 .remove = msm_dai_q6_dai_remove,
886 .capture = {
887 .stream_name = "Slimbus6 Capture",
888 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
889 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_96000 |
890 SNDRV_PCM_RATE_192000,
891 .formats = SNDRV_PCM_FMTBIT_S16_LE |
892 SNDRV_PCM_FMTBIT_S24_LE,
893 .channels_min = 1,
894 .channels_max = 8,
895 .rate_min = 8000,
896 .rate_max = 192000,
897 },
898 }, {
899 .playback = {
900 .stream_name = "Primary MI2S Playback",
901 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
902 SNDRV_PCM_RATE_16000,
903 .formats = SNDRV_PCM_FMTBIT_S16_LE |
904 SNDRV_PCM_FMTBIT_S24_LE,
905 .channels_min = 1,
906 .channels_max = 8,
907 .rate_min = 8000,
908 .rate_max = 48000,
909 },
910 .id = PRIMARY_MI2S_RX,
911 .name = "PRI_MI2S_RX",
912 .ops = &q6i2s_ops,
913 .probe = msm_dai_q6_dai_probe,
914 .remove = msm_dai_q6_dai_remove,
915 }, {
916 .capture = {
917 .stream_name = "Primary MI2S Capture",
918 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
919 SNDRV_PCM_RATE_16000,
920 .formats = SNDRV_PCM_FMTBIT_S16_LE |
921 SNDRV_PCM_FMTBIT_S24_LE,
922 .channels_min = 1,
923 .channels_max = 8,
924 .rate_min = 8000,
925 .rate_max = 48000,
926 },
927 .id = PRIMARY_MI2S_TX,
928 .name = "PRI_MI2S_TX",
929 .ops = &q6i2s_ops,
930 .probe = msm_dai_q6_dai_probe,
931 .remove = msm_dai_q6_dai_remove,
932 }, {
933 .playback = {
934 .stream_name = "Secondary MI2S Playback",
935 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
936 SNDRV_PCM_RATE_16000,
937 .formats = SNDRV_PCM_FMTBIT_S16_LE,
938 .channels_min = 1,
939 .channels_max = 8,
940 .rate_min = 8000,
941 .rate_max = 48000,
942 },
943 .name = "SEC_MI2S_RX",
944 .id = SECONDARY_MI2S_RX,
945 .ops = &q6i2s_ops,
946 .probe = msm_dai_q6_dai_probe,
947 .remove = msm_dai_q6_dai_remove,
948 }, {
949 .capture = {
950 .stream_name = "Secondary MI2S Capture",
951 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
952 SNDRV_PCM_RATE_16000,
953 .formats = SNDRV_PCM_FMTBIT_S16_LE |
954 SNDRV_PCM_FMTBIT_S24_LE,
955 .channels_min = 1,
956 .channels_max = 8,
957 .rate_min = 8000,
958 .rate_max = 48000,
959 },
960 .id = SECONDARY_MI2S_TX,
961 .name = "SEC_MI2S_TX",
962 .ops = &q6i2s_ops,
963 .probe = msm_dai_q6_dai_probe,
964 .remove = msm_dai_q6_dai_remove,
965 }, {
966 .playback = {
967 .stream_name = "Tertiary MI2S Playback",
968 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
969 SNDRV_PCM_RATE_16000,
970 .formats = SNDRV_PCM_FMTBIT_S16_LE,
971 .channels_min = 1,
972 .channels_max = 8,
973 .rate_min = 8000,
974 .rate_max = 48000,
975 },
976 .name = "TERT_MI2S_RX",
977 .id = TERTIARY_MI2S_RX,
978 .ops = &q6i2s_ops,
979 .probe = msm_dai_q6_dai_probe,
980 .remove = msm_dai_q6_dai_remove,
981 }, {
982 .capture = {
983 .stream_name = "Tertiary MI2S Capture",
984 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
985 SNDRV_PCM_RATE_16000,
986 .formats = SNDRV_PCM_FMTBIT_S16_LE |
987 SNDRV_PCM_FMTBIT_S24_LE,
988 .channels_min = 1,
989 .channels_max = 8,
990 .rate_min = 8000,
991 .rate_max = 48000,
992 },
993 .id = TERTIARY_MI2S_TX,
994 .name = "TERT_MI2S_TX",
995 .ops = &q6i2s_ops,
996 .probe = msm_dai_q6_dai_probe,
997 .remove = msm_dai_q6_dai_remove,
998 }, {
999 .playback = {
1000 .stream_name = "Quaternary MI2S Playback",
1001 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
1002 SNDRV_PCM_RATE_16000,
1003 .formats = SNDRV_PCM_FMTBIT_S16_LE,
1004 .channels_min = 1,
1005 .channels_max = 8,
1006 .rate_min = 8000,
1007 .rate_max = 48000,
1008 },
1009 .name = "QUAT_MI2S_RX",
1010 .id = QUATERNARY_MI2S_RX,
1011 .ops = &q6i2s_ops,
1012 .probe = msm_dai_q6_dai_probe,
1013 .remove = msm_dai_q6_dai_remove,
1014 }, {
1015 .capture = {
1016 .stream_name = "Quaternary MI2S Capture",
1017 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
1018 SNDRV_PCM_RATE_16000,
1019 .formats = SNDRV_PCM_FMTBIT_S16_LE |
1020 SNDRV_PCM_FMTBIT_S24_LE,
1021 .channels_min = 1,
1022 .channels_max = 8,
1023 .rate_min = 8000,
1024 .rate_max = 48000,
1025 },
1026 .id = QUATERNARY_MI2S_TX,
1027 .name = "QUAT_MI2S_TX",
1028 .ops = &q6i2s_ops,
1029 .probe = msm_dai_q6_dai_probe,
1030 .remove = msm_dai_q6_dai_remove,
1031 },
1032 Q6AFE_TDM_PB_DAI("Primary", 0, PRIMARY_TDM_RX_0),
1033 Q6AFE_TDM_PB_DAI("Primary", 1, PRIMARY_TDM_RX_1),
1034 Q6AFE_TDM_PB_DAI("Primary", 2, PRIMARY_TDM_RX_2),
1035 Q6AFE_TDM_PB_DAI("Primary", 3, PRIMARY_TDM_RX_3),
1036 Q6AFE_TDM_PB_DAI("Primary", 4, PRIMARY_TDM_RX_4),
1037 Q6AFE_TDM_PB_DAI("Primary", 5, PRIMARY_TDM_RX_5),
1038 Q6AFE_TDM_PB_DAI("Primary", 6, PRIMARY_TDM_RX_6),
1039 Q6AFE_TDM_PB_DAI("Primary", 7, PRIMARY_TDM_RX_7),
1040 Q6AFE_TDM_CAP_DAI("Primary", 0, PRIMARY_TDM_TX_0),
1041 Q6AFE_TDM_CAP_DAI("Primary", 1, PRIMARY_TDM_TX_1),
1042 Q6AFE_TDM_CAP_DAI("Primary", 2, PRIMARY_TDM_TX_2),
1043 Q6AFE_TDM_CAP_DAI("Primary", 3, PRIMARY_TDM_TX_3),
1044 Q6AFE_TDM_CAP_DAI("Primary", 4, PRIMARY_TDM_TX_4),
1045 Q6AFE_TDM_CAP_DAI("Primary", 5, PRIMARY_TDM_TX_5),
1046 Q6AFE_TDM_CAP_DAI("Primary", 6, PRIMARY_TDM_TX_6),
1047 Q6AFE_TDM_CAP_DAI("Primary", 7, PRIMARY_TDM_TX_7),
1048 Q6AFE_TDM_PB_DAI("Secondary", 0, SECONDARY_TDM_RX_0),
1049 Q6AFE_TDM_PB_DAI("Secondary", 1, SECONDARY_TDM_RX_1),
1050 Q6AFE_TDM_PB_DAI("Secondary", 2, SECONDARY_TDM_RX_2),
1051 Q6AFE_TDM_PB_DAI("Secondary", 3, SECONDARY_TDM_RX_3),
1052 Q6AFE_TDM_PB_DAI("Secondary", 4, SECONDARY_TDM_RX_4),
1053 Q6AFE_TDM_PB_DAI("Secondary", 5, SECONDARY_TDM_RX_5),
1054 Q6AFE_TDM_PB_DAI("Secondary", 6, SECONDARY_TDM_RX_6),
1055 Q6AFE_TDM_PB_DAI("Secondary", 7, SECONDARY_TDM_RX_7),
1056 Q6AFE_TDM_CAP_DAI("Secondary", 0, SECONDARY_TDM_TX_0),
1057 Q6AFE_TDM_CAP_DAI("Secondary", 1, SECONDARY_TDM_TX_1),
1058 Q6AFE_TDM_CAP_DAI("Secondary", 2, SECONDARY_TDM_TX_2),
1059 Q6AFE_TDM_CAP_DAI("Secondary", 3, SECONDARY_TDM_TX_3),
1060 Q6AFE_TDM_CAP_DAI("Secondary", 4, SECONDARY_TDM_TX_4),
1061 Q6AFE_TDM_CAP_DAI("Secondary", 5, SECONDARY_TDM_TX_5),
1062 Q6AFE_TDM_CAP_DAI("Secondary", 6, SECONDARY_TDM_TX_6),
1063 Q6AFE_TDM_CAP_DAI("Secondary", 7, SECONDARY_TDM_TX_7),
1064 Q6AFE_TDM_PB_DAI("Tertiary", 0, TERTIARY_TDM_RX_0),
1065 Q6AFE_TDM_PB_DAI("Tertiary", 1, TERTIARY_TDM_RX_1),
1066 Q6AFE_TDM_PB_DAI("Tertiary", 2, TERTIARY_TDM_RX_2),
1067 Q6AFE_TDM_PB_DAI("Tertiary", 3, TERTIARY_TDM_RX_3),
1068 Q6AFE_TDM_PB_DAI("Tertiary", 4, TERTIARY_TDM_RX_4),
1069 Q6AFE_TDM_PB_DAI("Tertiary", 5, TERTIARY_TDM_RX_5),
1070 Q6AFE_TDM_PB_DAI("Tertiary", 6, TERTIARY_TDM_RX_6),
1071 Q6AFE_TDM_PB_DAI("Tertiary", 7, TERTIARY_TDM_RX_7),
1072 Q6AFE_TDM_CAP_DAI("Tertiary", 0, TERTIARY_TDM_TX_0),
1073 Q6AFE_TDM_CAP_DAI("Tertiary", 1, TERTIARY_TDM_TX_1),
1074 Q6AFE_TDM_CAP_DAI("Tertiary", 2, TERTIARY_TDM_TX_2),
1075 Q6AFE_TDM_CAP_DAI("Tertiary", 3, TERTIARY_TDM_TX_3),
1076 Q6AFE_TDM_CAP_DAI("Tertiary", 4, TERTIARY_TDM_TX_4),
1077 Q6AFE_TDM_CAP_DAI("Tertiary", 5, TERTIARY_TDM_TX_5),
1078 Q6AFE_TDM_CAP_DAI("Tertiary", 6, TERTIARY_TDM_TX_6),
1079 Q6AFE_TDM_CAP_DAI("Tertiary", 7, TERTIARY_TDM_TX_7),
1080 Q6AFE_TDM_PB_DAI("Quaternary", 0, QUATERNARY_TDM_RX_0),
1081 Q6AFE_TDM_PB_DAI("Quaternary", 1, QUATERNARY_TDM_RX_1),
1082 Q6AFE_TDM_PB_DAI("Quaternary", 2, QUATERNARY_TDM_RX_2),
1083 Q6AFE_TDM_PB_DAI("Quaternary", 3, QUATERNARY_TDM_RX_3),
1084 Q6AFE_TDM_PB_DAI("Quaternary", 4, QUATERNARY_TDM_RX_4),
1085 Q6AFE_TDM_PB_DAI("Quaternary", 5, QUATERNARY_TDM_RX_5),
1086 Q6AFE_TDM_PB_DAI("Quaternary", 6, QUATERNARY_TDM_RX_6),
1087 Q6AFE_TDM_PB_DAI("Quaternary", 7, QUATERNARY_TDM_RX_7),
1088 Q6AFE_TDM_CAP_DAI("Quaternary", 0, QUATERNARY_TDM_TX_0),
1089 Q6AFE_TDM_CAP_DAI("Quaternary", 1, QUATERNARY_TDM_TX_1),
1090 Q6AFE_TDM_CAP_DAI("Quaternary", 2, QUATERNARY_TDM_TX_2),
1091 Q6AFE_TDM_CAP_DAI("Quaternary", 3, QUATERNARY_TDM_TX_3),
1092 Q6AFE_TDM_CAP_DAI("Quaternary", 4, QUATERNARY_TDM_TX_4),
1093 Q6AFE_TDM_CAP_DAI("Quaternary", 5, QUATERNARY_TDM_TX_5),
1094 Q6AFE_TDM_CAP_DAI("Quaternary", 6, QUATERNARY_TDM_TX_6),
1095 Q6AFE_TDM_CAP_DAI("Quaternary", 7, QUATERNARY_TDM_TX_7),
1096 Q6AFE_TDM_PB_DAI("Quinary", 0, QUINARY_TDM_RX_0),
1097 Q6AFE_TDM_PB_DAI("Quinary", 1, QUINARY_TDM_RX_1),
1098 Q6AFE_TDM_PB_DAI("Quinary", 2, QUINARY_TDM_RX_2),
1099 Q6AFE_TDM_PB_DAI("Quinary", 3, QUINARY_TDM_RX_3),
1100 Q6AFE_TDM_PB_DAI("Quinary", 4, QUINARY_TDM_RX_4),
1101 Q6AFE_TDM_PB_DAI("Quinary", 5, QUINARY_TDM_RX_5),
1102 Q6AFE_TDM_PB_DAI("Quinary", 6, QUINARY_TDM_RX_6),
1103 Q6AFE_TDM_PB_DAI("Quinary", 7, QUINARY_TDM_RX_7),
1104 Q6AFE_TDM_CAP_DAI("Quinary", 0, QUINARY_TDM_TX_0),
1105 Q6AFE_TDM_CAP_DAI("Quinary", 1, QUINARY_TDM_TX_1),
1106 Q6AFE_TDM_CAP_DAI("Quinary", 2, QUINARY_TDM_TX_2),
1107 Q6AFE_TDM_CAP_DAI("Quinary", 3, QUINARY_TDM_TX_3),
1108 Q6AFE_TDM_CAP_DAI("Quinary", 4, QUINARY_TDM_TX_4),
1109 Q6AFE_TDM_CAP_DAI("Quinary", 5, QUINARY_TDM_TX_5),
1110 Q6AFE_TDM_CAP_DAI("Quinary", 6, QUINARY_TDM_TX_6),
1111 Q6AFE_TDM_CAP_DAI("Quinary", 7, QUINARY_TDM_TX_7),
1112 {
1113 .playback = {
1114 .stream_name = "Display Port Playback",
1115 .rates = SNDRV_PCM_RATE_48000 |
1116 SNDRV_PCM_RATE_96000 |
1117 SNDRV_PCM_RATE_192000,
1118 .formats = SNDRV_PCM_FMTBIT_S16_LE |
1119 SNDRV_PCM_FMTBIT_S24_LE,
1120 .channels_min = 2,
1121 .channels_max = 8,
1122 .rate_max = 192000,
1123 .rate_min = 48000,
1124 },
1125 .ops = &q6hdmi_ops,
1126 .id = DISPLAY_PORT_RX,
1127 .name = "DISPLAY_PORT",
1128 .probe = msm_dai_q6_dai_probe,
1129 .remove = msm_dai_q6_dai_remove,
1130 },
1131 };
1132
1133 static int q6afe_of_xlate_dai_name(struct snd_soc_component *component,
1134 struct of_phandle_args *args,
1135 const char **dai_name)
1136 {
1137 int id = args->args[0];
1138 int ret = -EINVAL;
1139 int i;
1140
1141 for (i = 0; i < ARRAY_SIZE(q6afe_dais); i++) {
1142 if (q6afe_dais[i].id == id) {
1143 *dai_name = q6afe_dais[i].name;
1144 ret = 0;
1145 break;
1146 }
1147 }
1148
1149 return ret;
1150 }
1151
1152 static const struct snd_soc_dapm_widget q6afe_dai_widgets[] = {
1153 SND_SOC_DAPM_AIF_IN("HDMI_RX", NULL, 0, 0, 0, 0),
1154 SND_SOC_DAPM_AIF_IN("SLIMBUS_0_RX", NULL, 0, 0, 0, 0),
1155 SND_SOC_DAPM_AIF_IN("SLIMBUS_1_RX", NULL, 0, 0, 0, 0),
1156 SND_SOC_DAPM_AIF_IN("SLIMBUS_2_RX", NULL, 0, 0, 0, 0),
1157 SND_SOC_DAPM_AIF_IN("SLIMBUS_3_RX", NULL, 0, 0, 0, 0),
1158 SND_SOC_DAPM_AIF_IN("SLIMBUS_4_RX", NULL, 0, 0, 0, 0),
1159 SND_SOC_DAPM_AIF_IN("SLIMBUS_5_RX", NULL, 0, 0, 0, 0),
1160 SND_SOC_DAPM_AIF_IN("SLIMBUS_6_RX", NULL, 0, 0, 0, 0),
1161 SND_SOC_DAPM_AIF_OUT("SLIMBUS_0_TX", NULL, 0, 0, 0, 0),
1162 SND_SOC_DAPM_AIF_OUT("SLIMBUS_1_TX", NULL, 0, 0, 0, 0),
1163 SND_SOC_DAPM_AIF_OUT("SLIMBUS_2_TX", NULL, 0, 0, 0, 0),
1164 SND_SOC_DAPM_AIF_OUT("SLIMBUS_3_TX", NULL, 0, 0, 0, 0),
1165 SND_SOC_DAPM_AIF_OUT("SLIMBUS_4_TX", NULL, 0, 0, 0, 0),
1166 SND_SOC_DAPM_AIF_OUT("SLIMBUS_5_TX", NULL, 0, 0, 0, 0),
1167 SND_SOC_DAPM_AIF_OUT("SLIMBUS_6_TX", NULL, 0, 0, 0, 0),
1168 SND_SOC_DAPM_AIF_IN("QUAT_MI2S_RX", NULL,
1169 0, 0, 0, 0),
1170 SND_SOC_DAPM_AIF_OUT("QUAT_MI2S_TX", NULL,
1171 0, 0, 0, 0),
1172 SND_SOC_DAPM_AIF_IN("TERT_MI2S_RX", NULL,
1173 0, 0, 0, 0),
1174 SND_SOC_DAPM_AIF_OUT("TERT_MI2S_TX", NULL,
1175 0, 0, 0, 0),
1176 SND_SOC_DAPM_AIF_IN("SEC_MI2S_RX", NULL,
1177 0, 0, 0, 0),
1178 SND_SOC_DAPM_AIF_OUT("SEC_MI2S_TX", NULL,
1179 0, 0, 0, 0),
1180 SND_SOC_DAPM_AIF_IN("SEC_MI2S_RX_SD1",
1181 "Secondary MI2S Playback SD1",
1182 0, 0, 0, 0),
1183 SND_SOC_DAPM_AIF_IN("PRI_MI2S_RX", NULL,
1184 0, 0, 0, 0),
1185 SND_SOC_DAPM_AIF_OUT("PRI_MI2S_TX", NULL,
1186 0, 0, 0, 0),
1187
1188 SND_SOC_DAPM_AIF_IN("PRIMARY_TDM_RX_0", NULL,
1189 0, 0, 0, 0),
1190 SND_SOC_DAPM_AIF_IN("PRIMARY_TDM_RX_1", NULL,
1191 0, 0, 0, 0),
1192 SND_SOC_DAPM_AIF_IN("PRIMARY_TDM_RX_2", NULL,
1193 0, 0, 0, 0),
1194 SND_SOC_DAPM_AIF_IN("PRIMARY_TDM_RX_3", NULL,
1195 0, 0, 0, 0),
1196 SND_SOC_DAPM_AIF_IN("PRIMARY_TDM_RX_4", NULL,
1197 0, 0, 0, 0),
1198 SND_SOC_DAPM_AIF_IN("PRIMARY_TDM_RX_5", NULL,
1199 0, 0, 0, 0),
1200 SND_SOC_DAPM_AIF_IN("PRIMARY_TDM_RX_6", NULL,
1201 0, 0, 0, 0),
1202 SND_SOC_DAPM_AIF_IN("PRIMARY_TDM_RX_7", NULL,
1203 0, 0, 0, 0),
1204 SND_SOC_DAPM_AIF_OUT("PRIMARY_TDM_TX_0", NULL,
1205 0, 0, 0, 0),
1206 SND_SOC_DAPM_AIF_OUT("PRIMARY_TDM_TX_1", NULL,
1207 0, 0, 0, 0),
1208 SND_SOC_DAPM_AIF_OUT("PRIMARY_TDM_TX_2", NULL,
1209 0, 0, 0, 0),
1210 SND_SOC_DAPM_AIF_OUT("PRIMARY_TDM_TX_3", NULL,
1211 0, 0, 0, 0),
1212 SND_SOC_DAPM_AIF_OUT("PRIMARY_TDM_TX_4", NULL,
1213 0, 0, 0, 0),
1214 SND_SOC_DAPM_AIF_OUT("PRIMARY_TDM_TX_5", NULL,
1215 0, 0, 0, 0),
1216 SND_SOC_DAPM_AIF_OUT("PRIMARY_TDM_TX_6", NULL,
1217 0, 0, 0, 0),
1218 SND_SOC_DAPM_AIF_OUT("PRIMARY_TDM_TX_7", NULL,
1219 0, 0, 0, 0),
1220
1221 SND_SOC_DAPM_AIF_IN("SEC_TDM_RX_0", NULL,
1222 0, 0, 0, 0),
1223 SND_SOC_DAPM_AIF_IN("SEC_TDM_RX_1", NULL,
1224 0, 0, 0, 0),
1225 SND_SOC_DAPM_AIF_IN("SEC_TDM_RX_2", NULL,
1226 0, 0, 0, 0),
1227 SND_SOC_DAPM_AIF_IN("SEC_TDM_RX_3", NULL,
1228 0, 0, 0, 0),
1229 SND_SOC_DAPM_AIF_IN("SEC_TDM_RX_4", NULL,
1230 0, 0, 0, 0),
1231 SND_SOC_DAPM_AIF_IN("SEC_TDM_RX_5", NULL,
1232 0, 0, 0, 0),
1233 SND_SOC_DAPM_AIF_IN("SEC_TDM_RX_6", NULL,
1234 0, 0, 0, 0),
1235 SND_SOC_DAPM_AIF_IN("SEC_TDM_RX_7", NULL,
1236 0, 0, 0, 0),
1237 SND_SOC_DAPM_AIF_OUT("SEC_TDM_TX_0", NULL,
1238 0, 0, 0, 0),
1239 SND_SOC_DAPM_AIF_OUT("SEC_TDM_TX_1", NULL,
1240 0, 0, 0, 0),
1241 SND_SOC_DAPM_AIF_OUT("SEC_TDM_TX_2", NULL,
1242 0, 0, 0, 0),
1243 SND_SOC_DAPM_AIF_OUT("SEC_TDM_TX_3", NULL,
1244 0, 0, 0, 0),
1245 SND_SOC_DAPM_AIF_OUT("SEC_TDM_TX_4", NULL,
1246 0, 0, 0, 0),
1247 SND_SOC_DAPM_AIF_OUT("SEC_TDM_TX_5", NULL,
1248 0, 0, 0, 0),
1249 SND_SOC_DAPM_AIF_OUT("SEC_TDM_TX_6", NULL,
1250 0, 0, 0, 0),
1251 SND_SOC_DAPM_AIF_OUT("SEC_TDM_TX_7", NULL,
1252 0, 0, 0, 0),
1253
1254 SND_SOC_DAPM_AIF_IN("TERT_TDM_RX_0", NULL,
1255 0, 0, 0, 0),
1256 SND_SOC_DAPM_AIF_IN("TERT_TDM_RX_1", NULL,
1257 0, 0, 0, 0),
1258 SND_SOC_DAPM_AIF_IN("TERT_TDM_RX_2", NULL,
1259 0, 0, 0, 0),
1260 SND_SOC_DAPM_AIF_IN("TERT_TDM_RX_3", NULL,
1261 0, 0, 0, 0),
1262 SND_SOC_DAPM_AIF_IN("TERT_TDM_RX_4", NULL,
1263 0, 0, 0, 0),
1264 SND_SOC_DAPM_AIF_IN("TERT_TDM_RX_5", NULL,
1265 0, 0, 0, 0),
1266 SND_SOC_DAPM_AIF_IN("TERT_TDM_RX_6", NULL,
1267 0, 0, 0, 0),
1268 SND_SOC_DAPM_AIF_IN("TERT_TDM_RX_7", NULL,
1269 0, 0, 0, 0),
1270 SND_SOC_DAPM_AIF_OUT("TERT_TDM_TX_0", NULL,
1271 0, 0, 0, 0),
1272 SND_SOC_DAPM_AIF_OUT("TERT_TDM_TX_1", NULL,
1273 0, 0, 0, 0),
1274 SND_SOC_DAPM_AIF_OUT("TERT_TDM_TX_2", NULL,
1275 0, 0, 0, 0),
1276 SND_SOC_DAPM_AIF_OUT("TERT_TDM_TX_3", NULL,
1277 0, 0, 0, 0),
1278 SND_SOC_DAPM_AIF_OUT("TERT_TDM_TX_4", NULL,
1279 0, 0, 0, 0),
1280 SND_SOC_DAPM_AIF_OUT("TERT_TDM_TX_5", NULL,
1281 0, 0, 0, 0),
1282 SND_SOC_DAPM_AIF_OUT("TERT_TDM_TX_6", NULL,
1283 0, 0, 0, 0),
1284 SND_SOC_DAPM_AIF_OUT("TERT_TDM_TX_7", NULL,
1285 0, 0, 0, 0),
1286
1287 SND_SOC_DAPM_AIF_IN("QUAT_TDM_RX_0", NULL,
1288 0, 0, 0, 0),
1289 SND_SOC_DAPM_AIF_IN("QUAT_TDM_RX_1", NULL,
1290 0, 0, 0, 0),
1291 SND_SOC_DAPM_AIF_IN("QUAT_TDM_RX_2", NULL,
1292 0, 0, 0, 0),
1293 SND_SOC_DAPM_AIF_IN("QUAT_TDM_RX_3", NULL,
1294 0, 0, 0, 0),
1295 SND_SOC_DAPM_AIF_IN("QUAT_TDM_RX_4", NULL,
1296 0, 0, 0, 0),
1297 SND_SOC_DAPM_AIF_IN("QUAT_TDM_RX_5", NULL,
1298 0, 0, 0, 0),
1299 SND_SOC_DAPM_AIF_IN("QUAT_TDM_RX_6", NULL,
1300 0, 0, 0, 0),
1301 SND_SOC_DAPM_AIF_IN("QUAT_TDM_RX_7", NULL,
1302 0, 0, 0, 0),
1303 SND_SOC_DAPM_AIF_OUT("QUAT_TDM_TX_0", NULL,
1304 0, 0, 0, 0),
1305 SND_SOC_DAPM_AIF_OUT("QUAT_TDM_TX_1", NULL,
1306 0, 0, 0, 0),
1307 SND_SOC_DAPM_AIF_OUT("QUAT_TDM_TX_2", NULL,
1308 0, 0, 0, 0),
1309 SND_SOC_DAPM_AIF_OUT("QUAT_TDM_TX_3", NULL,
1310 0, 0, 0, 0),
1311 SND_SOC_DAPM_AIF_OUT("QUAT_TDM_TX_4", NULL,
1312 0, 0, 0, 0),
1313 SND_SOC_DAPM_AIF_OUT("QUAT_TDM_TX_5", NULL,
1314 0, 0, 0, 0),
1315 SND_SOC_DAPM_AIF_OUT("QUAT_TDM_TX_6", NULL,
1316 0, 0, 0, 0),
1317 SND_SOC_DAPM_AIF_OUT("QUAT_TDM_TX_7", NULL,
1318 0, 0, 0, 0),
1319
1320 SND_SOC_DAPM_AIF_IN("QUIN_TDM_RX_0", NULL,
1321 0, 0, 0, 0),
1322 SND_SOC_DAPM_AIF_IN("QUIN_TDM_RX_1", NULL,
1323 0, 0, 0, 0),
1324 SND_SOC_DAPM_AIF_IN("QUIN_TDM_RX_2", NULL,
1325 0, 0, 0, 0),
1326 SND_SOC_DAPM_AIF_IN("QUIN_TDM_RX_3", NULL,
1327 0, 0, 0, 0),
1328 SND_SOC_DAPM_AIF_IN("QUIN_TDM_RX_4", NULL,
1329 0, 0, 0, 0),
1330 SND_SOC_DAPM_AIF_IN("QUIN_TDM_RX_5", NULL,
1331 0, 0, 0, 0),
1332 SND_SOC_DAPM_AIF_IN("QUIN_TDM_RX_6", NULL,
1333 0, 0, 0, 0),
1334 SND_SOC_DAPM_AIF_IN("QUIN_TDM_RX_7", NULL,
1335 0, 0, 0, 0),
1336 SND_SOC_DAPM_AIF_OUT("QUIN_TDM_TX_0", NULL,
1337 0, 0, 0, 0),
1338 SND_SOC_DAPM_AIF_OUT("QUIN_TDM_TX_1", NULL,
1339 0, 0, 0, 0),
1340 SND_SOC_DAPM_AIF_OUT("QUIN_TDM_TX_2", NULL,
1341 0, 0, 0, 0),
1342 SND_SOC_DAPM_AIF_OUT("QUIN_TDM_TX_3", NULL,
1343 0, 0, 0, 0),
1344 SND_SOC_DAPM_AIF_OUT("QUIN_TDM_TX_4", NULL,
1345 0, 0, 0, 0),
1346 SND_SOC_DAPM_AIF_OUT("QUIN_TDM_TX_5", NULL,
1347 0, 0, 0, 0),
1348 SND_SOC_DAPM_AIF_OUT("QUIN_TDM_TX_6", NULL,
1349 0, 0, 0, 0),
1350 SND_SOC_DAPM_AIF_OUT("QUIN_TDM_TX_7", NULL,
1351 0, 0, 0, 0),
1352 SND_SOC_DAPM_AIF_OUT("DISPLAY_PORT_RX", "NULL", 0, 0, 0, 0),
1353 };
1354
1355 static const struct snd_soc_component_driver q6afe_dai_component = {
1356 .name = "q6afe-dai-component",
1357 .dapm_widgets = q6afe_dai_widgets,
1358 .num_dapm_widgets = ARRAY_SIZE(q6afe_dai_widgets),
1359 .dapm_routes = q6afe_dapm_routes,
1360 .num_dapm_routes = ARRAY_SIZE(q6afe_dapm_routes),
1361 .of_xlate_dai_name = q6afe_of_xlate_dai_name,
1362
1363 };
1364
1365 static void of_q6afe_parse_dai_data(struct device *dev,
1366 struct q6afe_dai_data *data)
1367 {
1368 struct device_node *node;
1369 int ret;
1370
1371 for_each_child_of_node(dev->of_node, node) {
1372 unsigned int lines[Q6AFE_MAX_MI2S_LINES];
1373 struct q6afe_dai_priv_data *priv;
1374 int id, i, num_lines;
1375
1376 ret = of_property_read_u32(node, "reg", &id);
1377 if (ret || id < 0 || id >= AFE_PORT_MAX) {
1378 dev_err(dev, "valid dai id not found:%d\n", ret);
1379 continue;
1380 }
1381
1382 switch (id) {
1383
1384 case PRIMARY_MI2S_RX ... QUATERNARY_MI2S_TX:
1385 priv = &data->priv[id];
1386 ret = of_property_read_variable_u32_array(node,
1387 "qcom,sd-lines",
1388 lines, 0,
1389 Q6AFE_MAX_MI2S_LINES);
1390 if (ret < 0)
1391 num_lines = 0;
1392 else
1393 num_lines = ret;
1394
1395 priv->sd_line_mask = 0;
1396
1397 for (i = 0; i < num_lines; i++)
1398 priv->sd_line_mask |= BIT(lines[i]);
1399
1400 break;
1401 case PRIMARY_TDM_RX_0 ... QUINARY_TDM_TX_7:
1402 priv = &data->priv[id];
1403 ret = of_property_read_u32(node, "qcom,tdm-sync-mode",
1404 &priv->sync_mode);
1405 if (ret) {
1406 dev_err(dev, "No Sync mode from DT\n");
1407 break;
1408 }
1409 ret = of_property_read_u32(node, "qcom,tdm-sync-src",
1410 &priv->sync_src);
1411 if (ret) {
1412 dev_err(dev, "No Sync Src from DT\n");
1413 break;
1414 }
1415 ret = of_property_read_u32(node, "qcom,tdm-data-out",
1416 &priv->data_out_enable);
1417 if (ret) {
1418 dev_err(dev, "No Data out enable from DT\n");
1419 break;
1420 }
1421 ret = of_property_read_u32(node, "qcom,tdm-invert-sync",
1422 &priv->invert_sync);
1423 if (ret) {
1424 dev_err(dev, "No Invert sync from DT\n");
1425 break;
1426 }
1427 ret = of_property_read_u32(node, "qcom,tdm-data-delay",
1428 &priv->data_delay);
1429 if (ret) {
1430 dev_err(dev, "No Data Delay from DT\n");
1431 break;
1432 }
1433 ret = of_property_read_u32(node, "qcom,tdm-data-align",
1434 &priv->data_align);
1435 if (ret) {
1436 dev_err(dev, "No Data align from DT\n");
1437 break;
1438 }
1439 break;
1440 default:
1441 break;
1442 }
1443 }
1444 }
1445
1446 static int q6afe_dai_dev_probe(struct platform_device *pdev)
1447 {
1448 struct q6afe_dai_data *dai_data;
1449 struct device *dev = &pdev->dev;
1450
1451 dai_data = devm_kzalloc(dev, sizeof(*dai_data), GFP_KERNEL);
1452 if (!dai_data)
1453 return -ENOMEM;
1454
1455 dev_set_drvdata(dev, dai_data);
1456
1457 of_q6afe_parse_dai_data(dev, dai_data);
1458
1459 return devm_snd_soc_register_component(dev, &q6afe_dai_component,
1460 q6afe_dais, ARRAY_SIZE(q6afe_dais));
1461 }
1462
1463 static const struct of_device_id q6afe_dai_device_id[] = {
1464 { .compatible = "qcom,q6afe-dais" },
1465 {},
1466 };
1467 MODULE_DEVICE_TABLE(of, q6afe_dai_device_id);
1468
1469 static struct platform_driver q6afe_dai_platform_driver = {
1470 .driver = {
1471 .name = "q6afe-dai",
1472 .of_match_table = of_match_ptr(q6afe_dai_device_id),
1473 },
1474 .probe = q6afe_dai_dev_probe,
1475 };
1476 module_platform_driver(q6afe_dai_platform_driver);
1477
1478 MODULE_DESCRIPTION("Q6 Audio Fronend dai driver");
1479 MODULE_LICENSE("GPL v2");