1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3 * ALSA Soc Audio Layer - S3C_I2SV2 I2S driver
4 *
5 * Copyright (c) 2007 Simtec Electronics
6 * http://armlinux.simtec.co.uk/
7 * Ben Dooks <ben@simtec.co.uk>
8 */
9
10 /* This code is the core support for the I2S block found in a number of
11 * Samsung SoC devices which is unofficially named I2S-V2. Currently the
12 * S3C2412 and the S3C64XX series use this block to provide 1 or 2 I2S
13 * channels via configurable GPIO.
14 */
15
16 #ifndef __SND_SOC_S3C24XX_S3C_I2SV2_I2S_H
17 #define __SND_SOC_S3C24XX_S3C_I2SV2_I2S_H __FILE__
18
19 #define S3C_I2SV2_DIV_BCLK (1)
20 #define S3C_I2SV2_DIV_RCLK (2)
21 #define S3C_I2SV2_DIV_PRESCALER (3)
22
23 #define S3C_I2SV2_CLKSRC_PCLK 0
24 #define S3C_I2SV2_CLKSRC_AUDIOBUS 1
25 #define S3C_I2SV2_CLKSRC_CDCLK 2
26
27 /* Set this flag for I2S controllers that have the bit IISMOD[12]
28 * bridge/break RCLK signal and external Xi2sCDCLK pin.
29 */
30 #define S3C_FEATURE_CDCLKCON (1 << 0)
31
32 /**
33 * struct s3c_i2sv2_info - S3C I2S-V2 information
34 * @dev: The parent device passed to use from the probe.
35 * @regs: The pointer to the device registe block.
36 * @feature: Set of bit-flags indicating features of the controller.
37 * @master: True if the I2S core is the I2S bit clock master.
38 * @dma_playback: DMA information for playback channel.
39 * @dma_capture: DMA information for capture channel.
40 * @suspend_iismod: PM save for the IISMOD register.
41 * @suspend_iiscon: PM save for the IISCON register.
42 * @suspend_iispsr: PM save for the IISPSR register.
43 *
44 * This is the private codec state for the hardware associated with an
45 * I2S channel such as the register mappings and clock sources.
46 */
47 struct s3c_i2sv2_info {
48 struct device *dev;
49 void __iomem *regs;
50
51 u32 feature;
52
53 struct clk *iis_pclk;
54 struct clk *iis_cclk;
55
56 unsigned char master;
57
58 struct snd_dmaengine_dai_dma_data *dma_playback;
59 struct snd_dmaengine_dai_dma_data *dma_capture;
60
61 u32 suspend_iismod;
62 u32 suspend_iiscon;
63 u32 suspend_iispsr;
64
65 unsigned long base;
66 };
67
68 extern struct clk *s3c_i2sv2_get_clock(struct snd_soc_dai *cpu_dai);
69
70 struct s3c_i2sv2_rate_calc {
71 unsigned int clk_div; /* for prescaler */
72 unsigned int fs_div; /* for root frame clock */
73 };
74
75 extern int s3c_i2sv2_iis_calc_rate(struct s3c_i2sv2_rate_calc *info,
76 unsigned int *fstab,
77 unsigned int rate, struct clk *clk);
78
79 /**
80 * s3c_i2sv2_probe - probe for i2s device helper
81 * @dai: The ASoC DAI structure supplied to the original probe.
82 * @i2s: Our local i2s structure to fill in.
83 * @base: The base address for the registers.
84 */
85 extern int s3c_i2sv2_probe(struct snd_soc_dai *dai,
86 struct s3c_i2sv2_info *i2s,
87 unsigned long base);
88
89 /**
90 * s3c_i2sv2_cleanup - cleanup resources allocated in s3c_i2sv2_probe
91 * @dai: The ASoC DAI structure supplied to the original probe.
92 * @i2s: Our local i2s structure to fill in.
93 */
94 extern void s3c_i2sv2_cleanup(struct snd_soc_dai *dai,
95 struct s3c_i2sv2_info *i2s);
96 /**
97 * s3c_i2sv2_register_component - register component and dai with soc core
98 * @dev: DAI device
99 * @id: DAI ID
100 * @drv: The driver structure to register
101 *
102 * Fill in any missing fields and then register the given dai with the
103 * soc core.
104 */
105 extern int s3c_i2sv2_register_component(struct device *dev, int id,
106 const struct snd_soc_component_driver *cmp_drv,
107 struct snd_soc_dai_driver *dai_drv);
108
109 #endif /* __SND_SOC_S3C24XX_S3C_I2SV2_I2S_H */