This source file includes following definitions.
- get_hdac_ext_stream
- get_bus_ctx
- skl_substream_alloc_pages
- skl_substream_free_pages
- skl_set_pcm_constrains
- skl_get_host_stream_type
- skl_set_suspend_active
- skl_pcm_host_dma_prepare
- skl_pcm_link_dma_prepare
- skl_pcm_open
- skl_pcm_prepare
- skl_pcm_hw_params
- skl_pcm_close
- skl_pcm_hw_free
- skl_be_hw_params
- skl_decoupled_trigger
- skl_pcm_trigger
- skl_link_hw_params
- skl_link_pcm_prepare
- skl_link_pcm_trigger
- skl_link_hw_free
- skl_dai_load
- skl_platform_open
- skl_coupled_trigger
- skl_platform_pcm_trigger
- skl_adjust_codec_delay
- skl_get_time_info
- skl_pcm_free
- skl_pcm_new
- skl_get_module_info
- skl_populate_modules
- skl_platform_soc_probe
- skl_pcm_remove
- skl_platform_register
- skl_platform_unregister
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13 #include <linux/pci.h>
14 #include <linux/pm_runtime.h>
15 #include <linux/delay.h>
16 #include <sound/pcm_params.h>
17 #include <sound/soc.h>
18 #include "skl.h"
19 #include "skl-topology.h"
20 #include "skl-sst-dsp.h"
21 #include "skl-sst-ipc.h"
22
23 #define HDA_MONO 1
24 #define HDA_STEREO 2
25 #define HDA_QUAD 4
26 #define HDA_MAX 8
27
28 static const struct snd_pcm_hardware azx_pcm_hw = {
29 .info = (SNDRV_PCM_INFO_MMAP |
30 SNDRV_PCM_INFO_INTERLEAVED |
31 SNDRV_PCM_INFO_BLOCK_TRANSFER |
32 SNDRV_PCM_INFO_MMAP_VALID |
33 SNDRV_PCM_INFO_PAUSE |
34 SNDRV_PCM_INFO_RESUME |
35 SNDRV_PCM_INFO_SYNC_START |
36 SNDRV_PCM_INFO_HAS_WALL_CLOCK |
37 SNDRV_PCM_INFO_HAS_LINK_ATIME |
38 SNDRV_PCM_INFO_NO_PERIOD_WAKEUP),
39 .formats = SNDRV_PCM_FMTBIT_S16_LE |
40 SNDRV_PCM_FMTBIT_S32_LE |
41 SNDRV_PCM_FMTBIT_S24_LE,
42 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000 |
43 SNDRV_PCM_RATE_8000,
44 .rate_min = 8000,
45 .rate_max = 48000,
46 .channels_min = 1,
47 .channels_max = 8,
48 .buffer_bytes_max = AZX_MAX_BUF_SIZE,
49 .period_bytes_min = 128,
50 .period_bytes_max = AZX_MAX_BUF_SIZE / 2,
51 .periods_min = 2,
52 .periods_max = AZX_MAX_FRAG,
53 .fifo_size = 0,
54 };
55
56 static inline
57 struct hdac_ext_stream *get_hdac_ext_stream(struct snd_pcm_substream *substream)
58 {
59 return substream->runtime->private_data;
60 }
61
62 static struct hdac_bus *get_bus_ctx(struct snd_pcm_substream *substream)
63 {
64 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
65 struct hdac_stream *hstream = hdac_stream(stream);
66 struct hdac_bus *bus = hstream->bus;
67 return bus;
68 }
69
70 static int skl_substream_alloc_pages(struct hdac_bus *bus,
71 struct snd_pcm_substream *substream,
72 size_t size)
73 {
74 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
75
76 hdac_stream(stream)->bufsize = 0;
77 hdac_stream(stream)->period_bytes = 0;
78 hdac_stream(stream)->format_val = 0;
79
80 return snd_pcm_lib_malloc_pages(substream, size);
81 }
82
83 static int skl_substream_free_pages(struct hdac_bus *bus,
84 struct snd_pcm_substream *substream)
85 {
86 return snd_pcm_lib_free_pages(substream);
87 }
88
89 static void skl_set_pcm_constrains(struct hdac_bus *bus,
90 struct snd_pcm_runtime *runtime)
91 {
92 snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
93
94
95 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_TIME,
96 20, 178000000);
97 }
98
99 static enum hdac_ext_stream_type skl_get_host_stream_type(struct hdac_bus *bus)
100 {
101 if (bus->ppcap)
102 return HDAC_EXT_STREAM_TYPE_HOST;
103 else
104 return HDAC_EXT_STREAM_TYPE_COUPLED;
105 }
106
107
108
109
110
111
112
113
114 static void skl_set_suspend_active(struct snd_pcm_substream *substream,
115 struct snd_soc_dai *dai, bool enable)
116 {
117 struct hdac_bus *bus = dev_get_drvdata(dai->dev);
118 struct snd_soc_dapm_widget *w;
119 struct skl_dev *skl = bus_to_skl(bus);
120
121 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
122 w = dai->playback_widget;
123 else
124 w = dai->capture_widget;
125
126 if (w->ignore_suspend && enable)
127 skl->supend_active++;
128 else if (w->ignore_suspend && !enable)
129 skl->supend_active--;
130 }
131
132 int skl_pcm_host_dma_prepare(struct device *dev, struct skl_pipe_params *params)
133 {
134 struct hdac_bus *bus = dev_get_drvdata(dev);
135 struct skl_dev *skl = bus_to_skl(bus);
136 unsigned int format_val;
137 struct hdac_stream *hstream;
138 struct hdac_ext_stream *stream;
139 int err;
140
141 hstream = snd_hdac_get_stream(bus, params->stream,
142 params->host_dma_id + 1);
143 if (!hstream)
144 return -EINVAL;
145
146 stream = stream_to_hdac_ext_stream(hstream);
147 snd_hdac_ext_stream_decouple(bus, stream, true);
148
149 format_val = snd_hdac_calc_stream_format(params->s_freq,
150 params->ch, params->format, params->host_bps, 0);
151
152 dev_dbg(dev, "format_val=%d, rate=%d, ch=%d, format=%d\n",
153 format_val, params->s_freq, params->ch, params->format);
154
155 snd_hdac_stream_reset(hdac_stream(stream));
156 err = snd_hdac_stream_set_params(hdac_stream(stream), format_val);
157 if (err < 0)
158 return err;
159
160
161
162
163
164 if (IS_BXT(skl->pci)) {
165 snd_hdac_ext_stream_decouple(bus, stream, false);
166 err = snd_hdac_stream_setup(hdac_stream(stream));
167 snd_hdac_ext_stream_decouple(bus, stream, true);
168 } else {
169 err = snd_hdac_stream_setup(hdac_stream(stream));
170 }
171
172 if (err < 0)
173 return err;
174
175 hdac_stream(stream)->prepared = 1;
176
177 return 0;
178 }
179
180 int skl_pcm_link_dma_prepare(struct device *dev, struct skl_pipe_params *params)
181 {
182 struct hdac_bus *bus = dev_get_drvdata(dev);
183 unsigned int format_val;
184 struct hdac_stream *hstream;
185 struct hdac_ext_stream *stream;
186 struct hdac_ext_link *link;
187 unsigned char stream_tag;
188
189 hstream = snd_hdac_get_stream(bus, params->stream,
190 params->link_dma_id + 1);
191 if (!hstream)
192 return -EINVAL;
193
194 stream = stream_to_hdac_ext_stream(hstream);
195 snd_hdac_ext_stream_decouple(bus, stream, true);
196 format_val = snd_hdac_calc_stream_format(params->s_freq, params->ch,
197 params->format, params->link_bps, 0);
198
199 dev_dbg(dev, "format_val=%d, rate=%d, ch=%d, format=%d\n",
200 format_val, params->s_freq, params->ch, params->format);
201
202 snd_hdac_ext_link_stream_reset(stream);
203
204 snd_hdac_ext_link_stream_setup(stream, format_val);
205
206 stream_tag = hstream->stream_tag;
207 if (stream->hstream.direction == SNDRV_PCM_STREAM_PLAYBACK) {
208 list_for_each_entry(link, &bus->hlink_list, list) {
209 if (link->index == params->link_index)
210 snd_hdac_ext_link_set_stream_id(link,
211 stream_tag);
212 }
213 }
214
215 stream->link_prepared = 1;
216
217 return 0;
218 }
219
220 static int skl_pcm_open(struct snd_pcm_substream *substream,
221 struct snd_soc_dai *dai)
222 {
223 struct hdac_bus *bus = dev_get_drvdata(dai->dev);
224 struct hdac_ext_stream *stream;
225 struct snd_pcm_runtime *runtime = substream->runtime;
226 struct skl_dma_params *dma_params;
227 struct skl_dev *skl = get_skl_ctx(dai->dev);
228 struct skl_module_cfg *mconfig;
229
230 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
231
232 stream = snd_hdac_ext_stream_assign(bus, substream,
233 skl_get_host_stream_type(bus));
234 if (stream == NULL)
235 return -EBUSY;
236
237 skl_set_pcm_constrains(bus, runtime);
238
239
240
241
242
243 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
244 runtime->hw.info &= ~SNDRV_PCM_INFO_HAS_WALL_CLOCK;
245 runtime->hw.info &= ~SNDRV_PCM_INFO_HAS_LINK_ATIME;
246 }
247
248 runtime->private_data = stream;
249
250 dma_params = kzalloc(sizeof(*dma_params), GFP_KERNEL);
251 if (!dma_params)
252 return -ENOMEM;
253
254 dma_params->stream_tag = hdac_stream(stream)->stream_tag;
255 snd_soc_dai_set_dma_data(dai, substream, dma_params);
256
257 dev_dbg(dai->dev, "stream tag set in dma params=%d\n",
258 dma_params->stream_tag);
259 skl_set_suspend_active(substream, dai, true);
260 snd_pcm_set_sync(substream);
261
262 mconfig = skl_tplg_fe_get_cpr_module(dai, substream->stream);
263 if (!mconfig)
264 return -EINVAL;
265
266 skl_tplg_d0i3_get(skl, mconfig->d0i3_caps);
267
268 return 0;
269 }
270
271 static int skl_pcm_prepare(struct snd_pcm_substream *substream,
272 struct snd_soc_dai *dai)
273 {
274 struct skl_dev *skl = get_skl_ctx(dai->dev);
275 struct skl_module_cfg *mconfig;
276 int ret;
277
278 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
279
280 mconfig = skl_tplg_fe_get_cpr_module(dai, substream->stream);
281
282
283
284
285
286 if (mconfig &&
287 (substream->runtime->status->state == SNDRV_PCM_STATE_XRUN ||
288 mconfig->pipe->state == SKL_PIPE_CREATED ||
289 mconfig->pipe->state == SKL_PIPE_PAUSED)) {
290
291 ret = skl_reset_pipe(skl, mconfig->pipe);
292
293 if (ret < 0)
294 return ret;
295
296 ret = skl_pcm_host_dma_prepare(dai->dev,
297 mconfig->pipe->p_params);
298 if (ret < 0)
299 return ret;
300 }
301
302 return 0;
303 }
304
305 static int skl_pcm_hw_params(struct snd_pcm_substream *substream,
306 struct snd_pcm_hw_params *params,
307 struct snd_soc_dai *dai)
308 {
309 struct hdac_bus *bus = dev_get_drvdata(dai->dev);
310 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
311 struct snd_pcm_runtime *runtime = substream->runtime;
312 struct skl_pipe_params p_params = {0};
313 struct skl_module_cfg *m_cfg;
314 int ret, dma_id;
315
316 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
317 ret = skl_substream_alloc_pages(bus, substream,
318 params_buffer_bytes(params));
319 if (ret < 0)
320 return ret;
321
322 dev_dbg(dai->dev, "format_val, rate=%d, ch=%d, format=%d\n",
323 runtime->rate, runtime->channels, runtime->format);
324
325 dma_id = hdac_stream(stream)->stream_tag - 1;
326 dev_dbg(dai->dev, "dma_id=%d\n", dma_id);
327
328 p_params.s_fmt = snd_pcm_format_width(params_format(params));
329 p_params.ch = params_channels(params);
330 p_params.s_freq = params_rate(params);
331 p_params.host_dma_id = dma_id;
332 p_params.stream = substream->stream;
333 p_params.format = params_format(params);
334 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
335 p_params.host_bps = dai->driver->playback.sig_bits;
336 else
337 p_params.host_bps = dai->driver->capture.sig_bits;
338
339
340 m_cfg = skl_tplg_fe_get_cpr_module(dai, p_params.stream);
341 if (m_cfg)
342 skl_tplg_update_pipe_params(dai->dev, m_cfg, &p_params);
343
344 return 0;
345 }
346
347 static void skl_pcm_close(struct snd_pcm_substream *substream,
348 struct snd_soc_dai *dai)
349 {
350 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
351 struct hdac_bus *bus = dev_get_drvdata(dai->dev);
352 struct skl_dma_params *dma_params = NULL;
353 struct skl_dev *skl = bus_to_skl(bus);
354 struct skl_module_cfg *mconfig;
355
356 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
357
358 snd_hdac_ext_stream_release(stream, skl_get_host_stream_type(bus));
359
360 dma_params = snd_soc_dai_get_dma_data(dai, substream);
361
362
363
364
365 snd_soc_dai_set_dma_data(dai, substream, NULL);
366 skl_set_suspend_active(substream, dai, false);
367
368
369
370
371
372 if (!strncmp(dai->name, "Reference Pin", 13) &&
373 skl->miscbdcg_disabled) {
374 skl->enable_miscbdcge(dai->dev, true);
375 skl->miscbdcg_disabled = false;
376 }
377
378 mconfig = skl_tplg_fe_get_cpr_module(dai, substream->stream);
379 if (mconfig)
380 skl_tplg_d0i3_put(skl, mconfig->d0i3_caps);
381
382 kfree(dma_params);
383 }
384
385 static int skl_pcm_hw_free(struct snd_pcm_substream *substream,
386 struct snd_soc_dai *dai)
387 {
388 struct hdac_bus *bus = dev_get_drvdata(dai->dev);
389 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
390 struct skl_dev *skl = get_skl_ctx(dai->dev);
391 struct skl_module_cfg *mconfig;
392 int ret;
393
394 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
395
396 mconfig = skl_tplg_fe_get_cpr_module(dai, substream->stream);
397
398 if (mconfig) {
399 ret = skl_reset_pipe(skl, mconfig->pipe);
400 if (ret < 0)
401 dev_err(dai->dev, "%s:Reset failed ret =%d",
402 __func__, ret);
403 }
404
405 snd_hdac_stream_cleanup(hdac_stream(stream));
406 hdac_stream(stream)->prepared = 0;
407
408 return skl_substream_free_pages(bus, substream);
409 }
410
411 static int skl_be_hw_params(struct snd_pcm_substream *substream,
412 struct snd_pcm_hw_params *params,
413 struct snd_soc_dai *dai)
414 {
415 struct skl_pipe_params p_params = {0};
416
417 p_params.s_fmt = snd_pcm_format_width(params_format(params));
418 p_params.ch = params_channels(params);
419 p_params.s_freq = params_rate(params);
420 p_params.stream = substream->stream;
421
422 return skl_tplg_be_update_params(dai, &p_params);
423 }
424
425 static int skl_decoupled_trigger(struct snd_pcm_substream *substream,
426 int cmd)
427 {
428 struct hdac_bus *bus = get_bus_ctx(substream);
429 struct hdac_ext_stream *stream;
430 int start;
431 unsigned long cookie;
432 struct hdac_stream *hstr;
433
434 stream = get_hdac_ext_stream(substream);
435 hstr = hdac_stream(stream);
436
437 if (!hstr->prepared)
438 return -EPIPE;
439
440 switch (cmd) {
441 case SNDRV_PCM_TRIGGER_START:
442 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
443 case SNDRV_PCM_TRIGGER_RESUME:
444 start = 1;
445 break;
446
447 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
448 case SNDRV_PCM_TRIGGER_SUSPEND:
449 case SNDRV_PCM_TRIGGER_STOP:
450 start = 0;
451 break;
452
453 default:
454 return -EINVAL;
455 }
456
457 spin_lock_irqsave(&bus->reg_lock, cookie);
458
459 if (start) {
460 snd_hdac_stream_start(hdac_stream(stream), true);
461 snd_hdac_stream_timecounter_init(hstr, 0);
462 } else {
463 snd_hdac_stream_stop(hdac_stream(stream));
464 }
465
466 spin_unlock_irqrestore(&bus->reg_lock, cookie);
467
468 return 0;
469 }
470
471 static int skl_pcm_trigger(struct snd_pcm_substream *substream, int cmd,
472 struct snd_soc_dai *dai)
473 {
474 struct skl_dev *skl = get_skl_ctx(dai->dev);
475 struct skl_module_cfg *mconfig;
476 struct hdac_bus *bus = get_bus_ctx(substream);
477 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
478 struct snd_soc_dapm_widget *w;
479 int ret;
480
481 mconfig = skl_tplg_fe_get_cpr_module(dai, substream->stream);
482 if (!mconfig)
483 return -EIO;
484
485 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
486 w = dai->playback_widget;
487 else
488 w = dai->capture_widget;
489
490 switch (cmd) {
491 case SNDRV_PCM_TRIGGER_RESUME:
492 if (!w->ignore_suspend) {
493
494
495
496
497
498 snd_hdac_ext_stream_drsm_enable(bus, true,
499 hdac_stream(stream)->index);
500 snd_hdac_ext_stream_set_dpibr(bus, stream,
501 stream->lpib);
502 snd_hdac_ext_stream_set_lpib(stream, stream->lpib);
503 }
504
505
506 case SNDRV_PCM_TRIGGER_START:
507 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
508
509
510
511
512
513
514 ret = skl_decoupled_trigger(substream, cmd);
515 if (ret < 0)
516 return ret;
517 return skl_run_pipe(skl, mconfig->pipe);
518 break;
519
520 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
521 case SNDRV_PCM_TRIGGER_SUSPEND:
522 case SNDRV_PCM_TRIGGER_STOP:
523
524
525
526
527
528 ret = skl_stop_pipe(skl, mconfig->pipe);
529 if (ret < 0)
530 return ret;
531
532 ret = skl_decoupled_trigger(substream, cmd);
533 if ((cmd == SNDRV_PCM_TRIGGER_SUSPEND) && !w->ignore_suspend) {
534
535 stream->dpib = readl(bus->remap_addr +
536 AZX_REG_VS_SDXDPIB_XBASE +
537 (AZX_REG_VS_SDXDPIB_XINTERVAL *
538 hdac_stream(stream)->index));
539
540 stream->lpib = snd_hdac_stream_get_pos_lpib(
541 hdac_stream(stream));
542 snd_hdac_ext_stream_decouple(bus, stream, false);
543 }
544 break;
545
546 default:
547 return -EINVAL;
548 }
549
550 return 0;
551 }
552
553
554 static int skl_link_hw_params(struct snd_pcm_substream *substream,
555 struct snd_pcm_hw_params *params,
556 struct snd_soc_dai *dai)
557 {
558 struct hdac_bus *bus = dev_get_drvdata(dai->dev);
559 struct hdac_ext_stream *link_dev;
560 struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
561 struct snd_soc_dai *codec_dai = rtd->codec_dai;
562 struct skl_pipe_params p_params = {0};
563 struct hdac_ext_link *link;
564 int stream_tag;
565
566 link_dev = snd_hdac_ext_stream_assign(bus, substream,
567 HDAC_EXT_STREAM_TYPE_LINK);
568 if (!link_dev)
569 return -EBUSY;
570
571 snd_soc_dai_set_dma_data(dai, substream, (void *)link_dev);
572
573 link = snd_hdac_ext_bus_get_link(bus, codec_dai->component->name);
574 if (!link)
575 return -EINVAL;
576
577 stream_tag = hdac_stream(link_dev)->stream_tag;
578
579
580 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
581 snd_soc_dai_set_tdm_slot(codec_dai, stream_tag, 0, 0, 0);
582 else
583 snd_soc_dai_set_tdm_slot(codec_dai, 0, stream_tag, 0, 0);
584
585 p_params.s_fmt = snd_pcm_format_width(params_format(params));
586 p_params.ch = params_channels(params);
587 p_params.s_freq = params_rate(params);
588 p_params.stream = substream->stream;
589 p_params.link_dma_id = stream_tag - 1;
590 p_params.link_index = link->index;
591 p_params.format = params_format(params);
592
593 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
594 p_params.link_bps = codec_dai->driver->playback.sig_bits;
595 else
596 p_params.link_bps = codec_dai->driver->capture.sig_bits;
597
598 return skl_tplg_be_update_params(dai, &p_params);
599 }
600
601 static int skl_link_pcm_prepare(struct snd_pcm_substream *substream,
602 struct snd_soc_dai *dai)
603 {
604 struct skl_dev *skl = get_skl_ctx(dai->dev);
605 struct skl_module_cfg *mconfig = NULL;
606
607
608 mconfig = skl_tplg_be_get_cpr_module(dai, substream->stream);
609 if (mconfig && !mconfig->pipe->passthru &&
610 (substream->runtime->status->state == SNDRV_PCM_STATE_XRUN))
611 skl_reset_pipe(skl, mconfig->pipe);
612
613 return 0;
614 }
615
616 static int skl_link_pcm_trigger(struct snd_pcm_substream *substream,
617 int cmd, struct snd_soc_dai *dai)
618 {
619 struct hdac_ext_stream *link_dev =
620 snd_soc_dai_get_dma_data(dai, substream);
621 struct hdac_bus *bus = get_bus_ctx(substream);
622 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
623
624 dev_dbg(dai->dev, "In %s cmd=%d\n", __func__, cmd);
625 switch (cmd) {
626 case SNDRV_PCM_TRIGGER_RESUME:
627 case SNDRV_PCM_TRIGGER_START:
628 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
629 snd_hdac_ext_link_stream_start(link_dev);
630 break;
631
632 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
633 case SNDRV_PCM_TRIGGER_SUSPEND:
634 case SNDRV_PCM_TRIGGER_STOP:
635 snd_hdac_ext_link_stream_clear(link_dev);
636 if (cmd == SNDRV_PCM_TRIGGER_SUSPEND)
637 snd_hdac_ext_stream_decouple(bus, stream, false);
638 break;
639
640 default:
641 return -EINVAL;
642 }
643 return 0;
644 }
645
646 static int skl_link_hw_free(struct snd_pcm_substream *substream,
647 struct snd_soc_dai *dai)
648 {
649 struct hdac_bus *bus = dev_get_drvdata(dai->dev);
650 struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
651 struct hdac_ext_stream *link_dev =
652 snd_soc_dai_get_dma_data(dai, substream);
653 struct hdac_ext_link *link;
654 unsigned char stream_tag;
655
656 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
657
658 link_dev->link_prepared = 0;
659
660 link = snd_hdac_ext_bus_get_link(bus, rtd->codec_dai->component->name);
661 if (!link)
662 return -EINVAL;
663
664 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
665 stream_tag = hdac_stream(link_dev)->stream_tag;
666 snd_hdac_ext_link_clear_stream_id(link, stream_tag);
667 }
668
669 snd_hdac_ext_stream_release(link_dev, HDAC_EXT_STREAM_TYPE_LINK);
670 return 0;
671 }
672
673 static const struct snd_soc_dai_ops skl_pcm_dai_ops = {
674 .startup = skl_pcm_open,
675 .shutdown = skl_pcm_close,
676 .prepare = skl_pcm_prepare,
677 .hw_params = skl_pcm_hw_params,
678 .hw_free = skl_pcm_hw_free,
679 .trigger = skl_pcm_trigger,
680 };
681
682 static const struct snd_soc_dai_ops skl_dmic_dai_ops = {
683 .hw_params = skl_be_hw_params,
684 };
685
686 static const struct snd_soc_dai_ops skl_be_ssp_dai_ops = {
687 .hw_params = skl_be_hw_params,
688 };
689
690 static const struct snd_soc_dai_ops skl_link_dai_ops = {
691 .prepare = skl_link_pcm_prepare,
692 .hw_params = skl_link_hw_params,
693 .hw_free = skl_link_hw_free,
694 .trigger = skl_link_pcm_trigger,
695 };
696
697 static struct snd_soc_dai_driver skl_fe_dai[] = {
698 {
699 .name = "System Pin",
700 .ops = &skl_pcm_dai_ops,
701 .playback = {
702 .stream_name = "System Playback",
703 .channels_min = HDA_MONO,
704 .channels_max = HDA_STEREO,
705 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_8000,
706 .formats = SNDRV_PCM_FMTBIT_S16_LE |
707 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE,
708 .sig_bits = 32,
709 },
710 .capture = {
711 .stream_name = "System Capture",
712 .channels_min = HDA_MONO,
713 .channels_max = HDA_STEREO,
714 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000,
715 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
716 .sig_bits = 32,
717 },
718 },
719 {
720 .name = "System Pin2",
721 .ops = &skl_pcm_dai_ops,
722 .playback = {
723 .stream_name = "Headset Playback",
724 .channels_min = HDA_MONO,
725 .channels_max = HDA_STEREO,
726 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000 |
727 SNDRV_PCM_RATE_8000,
728 .formats = SNDRV_PCM_FMTBIT_S16_LE |
729 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE,
730 },
731 },
732 {
733 .name = "Echoref Pin",
734 .ops = &skl_pcm_dai_ops,
735 .capture = {
736 .stream_name = "Echoreference Capture",
737 .channels_min = HDA_STEREO,
738 .channels_max = HDA_STEREO,
739 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000 |
740 SNDRV_PCM_RATE_8000,
741 .formats = SNDRV_PCM_FMTBIT_S16_LE |
742 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE,
743 },
744 },
745 {
746 .name = "Reference Pin",
747 .ops = &skl_pcm_dai_ops,
748 .capture = {
749 .stream_name = "Reference Capture",
750 .channels_min = HDA_MONO,
751 .channels_max = HDA_QUAD,
752 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000,
753 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
754 .sig_bits = 32,
755 },
756 },
757 {
758 .name = "Deepbuffer Pin",
759 .ops = &skl_pcm_dai_ops,
760 .playback = {
761 .stream_name = "Deepbuffer Playback",
762 .channels_min = HDA_STEREO,
763 .channels_max = HDA_STEREO,
764 .rates = SNDRV_PCM_RATE_48000,
765 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
766 .sig_bits = 32,
767 },
768 },
769 {
770 .name = "LowLatency Pin",
771 .ops = &skl_pcm_dai_ops,
772 .playback = {
773 .stream_name = "Low Latency Playback",
774 .channels_min = HDA_STEREO,
775 .channels_max = HDA_STEREO,
776 .rates = SNDRV_PCM_RATE_48000,
777 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
778 .sig_bits = 32,
779 },
780 },
781 {
782 .name = "DMIC Pin",
783 .ops = &skl_pcm_dai_ops,
784 .capture = {
785 .stream_name = "DMIC Capture",
786 .channels_min = HDA_MONO,
787 .channels_max = HDA_QUAD,
788 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000,
789 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
790 .sig_bits = 32,
791 },
792 },
793 {
794 .name = "HDMI1 Pin",
795 .ops = &skl_pcm_dai_ops,
796 .playback = {
797 .stream_name = "HDMI1 Playback",
798 .channels_min = HDA_STEREO,
799 .channels_max = 8,
800 .rates = SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
801 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 |
802 SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |
803 SNDRV_PCM_RATE_192000,
804 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE |
805 SNDRV_PCM_FMTBIT_S32_LE,
806 .sig_bits = 32,
807 },
808 },
809 {
810 .name = "HDMI2 Pin",
811 .ops = &skl_pcm_dai_ops,
812 .playback = {
813 .stream_name = "HDMI2 Playback",
814 .channels_min = HDA_STEREO,
815 .channels_max = 8,
816 .rates = SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
817 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 |
818 SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |
819 SNDRV_PCM_RATE_192000,
820 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE |
821 SNDRV_PCM_FMTBIT_S32_LE,
822 .sig_bits = 32,
823 },
824 },
825 {
826 .name = "HDMI3 Pin",
827 .ops = &skl_pcm_dai_ops,
828 .playback = {
829 .stream_name = "HDMI3 Playback",
830 .channels_min = HDA_STEREO,
831 .channels_max = 8,
832 .rates = SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
833 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 |
834 SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |
835 SNDRV_PCM_RATE_192000,
836 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE |
837 SNDRV_PCM_FMTBIT_S32_LE,
838 .sig_bits = 32,
839 },
840 },
841 };
842
843
844 static struct snd_soc_dai_driver skl_platform_dai[] = {
845 {
846 .name = "SSP0 Pin",
847 .ops = &skl_be_ssp_dai_ops,
848 .playback = {
849 .stream_name = "ssp0 Tx",
850 .channels_min = HDA_STEREO,
851 .channels_max = HDA_STEREO,
852 .rates = SNDRV_PCM_RATE_48000,
853 .formats = SNDRV_PCM_FMTBIT_S16_LE,
854 },
855 .capture = {
856 .stream_name = "ssp0 Rx",
857 .channels_min = HDA_STEREO,
858 .channels_max = HDA_STEREO,
859 .rates = SNDRV_PCM_RATE_48000,
860 .formats = SNDRV_PCM_FMTBIT_S16_LE,
861 },
862 },
863 {
864 .name = "SSP1 Pin",
865 .ops = &skl_be_ssp_dai_ops,
866 .playback = {
867 .stream_name = "ssp1 Tx",
868 .channels_min = HDA_STEREO,
869 .channels_max = HDA_STEREO,
870 .rates = SNDRV_PCM_RATE_48000,
871 .formats = SNDRV_PCM_FMTBIT_S16_LE,
872 },
873 .capture = {
874 .stream_name = "ssp1 Rx",
875 .channels_min = HDA_STEREO,
876 .channels_max = HDA_STEREO,
877 .rates = SNDRV_PCM_RATE_48000,
878 .formats = SNDRV_PCM_FMTBIT_S16_LE,
879 },
880 },
881 {
882 .name = "SSP2 Pin",
883 .ops = &skl_be_ssp_dai_ops,
884 .playback = {
885 .stream_name = "ssp2 Tx",
886 .channels_min = HDA_STEREO,
887 .channels_max = HDA_STEREO,
888 .rates = SNDRV_PCM_RATE_48000,
889 .formats = SNDRV_PCM_FMTBIT_S16_LE,
890 },
891 .capture = {
892 .stream_name = "ssp2 Rx",
893 .channels_min = HDA_STEREO,
894 .channels_max = HDA_STEREO,
895 .rates = SNDRV_PCM_RATE_48000,
896 .formats = SNDRV_PCM_FMTBIT_S16_LE,
897 },
898 },
899 {
900 .name = "SSP3 Pin",
901 .ops = &skl_be_ssp_dai_ops,
902 .playback = {
903 .stream_name = "ssp3 Tx",
904 .channels_min = HDA_STEREO,
905 .channels_max = HDA_STEREO,
906 .rates = SNDRV_PCM_RATE_48000,
907 .formats = SNDRV_PCM_FMTBIT_S16_LE,
908 },
909 .capture = {
910 .stream_name = "ssp3 Rx",
911 .channels_min = HDA_STEREO,
912 .channels_max = HDA_STEREO,
913 .rates = SNDRV_PCM_RATE_48000,
914 .formats = SNDRV_PCM_FMTBIT_S16_LE,
915 },
916 },
917 {
918 .name = "SSP4 Pin",
919 .ops = &skl_be_ssp_dai_ops,
920 .playback = {
921 .stream_name = "ssp4 Tx",
922 .channels_min = HDA_STEREO,
923 .channels_max = HDA_STEREO,
924 .rates = SNDRV_PCM_RATE_48000,
925 .formats = SNDRV_PCM_FMTBIT_S16_LE,
926 },
927 .capture = {
928 .stream_name = "ssp4 Rx",
929 .channels_min = HDA_STEREO,
930 .channels_max = HDA_STEREO,
931 .rates = SNDRV_PCM_RATE_48000,
932 .formats = SNDRV_PCM_FMTBIT_S16_LE,
933 },
934 },
935 {
936 .name = "SSP5 Pin",
937 .ops = &skl_be_ssp_dai_ops,
938 .playback = {
939 .stream_name = "ssp5 Tx",
940 .channels_min = HDA_STEREO,
941 .channels_max = HDA_STEREO,
942 .rates = SNDRV_PCM_RATE_48000,
943 .formats = SNDRV_PCM_FMTBIT_S16_LE,
944 },
945 .capture = {
946 .stream_name = "ssp5 Rx",
947 .channels_min = HDA_STEREO,
948 .channels_max = HDA_STEREO,
949 .rates = SNDRV_PCM_RATE_48000,
950 .formats = SNDRV_PCM_FMTBIT_S16_LE,
951 },
952 },
953 {
954 .name = "iDisp1 Pin",
955 .ops = &skl_link_dai_ops,
956 .playback = {
957 .stream_name = "iDisp1 Tx",
958 .channels_min = HDA_STEREO,
959 .channels_max = 8,
960 .rates = SNDRV_PCM_RATE_8000|SNDRV_PCM_RATE_16000|SNDRV_PCM_RATE_48000,
961 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE |
962 SNDRV_PCM_FMTBIT_S24_LE,
963 },
964 },
965 {
966 .name = "iDisp2 Pin",
967 .ops = &skl_link_dai_ops,
968 .playback = {
969 .stream_name = "iDisp2 Tx",
970 .channels_min = HDA_STEREO,
971 .channels_max = 8,
972 .rates = SNDRV_PCM_RATE_8000|SNDRV_PCM_RATE_16000|
973 SNDRV_PCM_RATE_48000,
974 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE |
975 SNDRV_PCM_FMTBIT_S24_LE,
976 },
977 },
978 {
979 .name = "iDisp3 Pin",
980 .ops = &skl_link_dai_ops,
981 .playback = {
982 .stream_name = "iDisp3 Tx",
983 .channels_min = HDA_STEREO,
984 .channels_max = 8,
985 .rates = SNDRV_PCM_RATE_8000|SNDRV_PCM_RATE_16000|
986 SNDRV_PCM_RATE_48000,
987 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE |
988 SNDRV_PCM_FMTBIT_S24_LE,
989 },
990 },
991 {
992 .name = "DMIC01 Pin",
993 .ops = &skl_dmic_dai_ops,
994 .capture = {
995 .stream_name = "DMIC01 Rx",
996 .channels_min = HDA_MONO,
997 .channels_max = HDA_QUAD,
998 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000,
999 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
1000 },
1001 },
1002 {
1003 .name = "DMIC16k Pin",
1004 .ops = &skl_dmic_dai_ops,
1005 .capture = {
1006 .stream_name = "DMIC16k Rx",
1007 .channels_min = HDA_MONO,
1008 .channels_max = HDA_QUAD,
1009 .rates = SNDRV_PCM_RATE_16000,
1010 .formats = SNDRV_PCM_FMTBIT_S16_LE,
1011 },
1012 },
1013 {
1014 .name = "Analog CPU DAI",
1015 .ops = &skl_link_dai_ops,
1016 .playback = {
1017 .stream_name = "Analog CPU Playback",
1018 .channels_min = HDA_MONO,
1019 .channels_max = HDA_MAX,
1020 .rates = SNDRV_PCM_RATE_8000_192000,
1021 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE |
1022 SNDRV_PCM_FMTBIT_S32_LE,
1023 },
1024 .capture = {
1025 .stream_name = "Analog CPU Capture",
1026 .channels_min = HDA_MONO,
1027 .channels_max = HDA_MAX,
1028 .rates = SNDRV_PCM_RATE_8000_192000,
1029 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE |
1030 SNDRV_PCM_FMTBIT_S32_LE,
1031 },
1032 },
1033 {
1034 .name = "Alt Analog CPU DAI",
1035 .ops = &skl_link_dai_ops,
1036 .playback = {
1037 .stream_name = "Alt Analog CPU Playback",
1038 .channels_min = HDA_MONO,
1039 .channels_max = HDA_MAX,
1040 .rates = SNDRV_PCM_RATE_8000_192000,
1041 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE |
1042 SNDRV_PCM_FMTBIT_S32_LE,
1043 },
1044 .capture = {
1045 .stream_name = "Alt Analog CPU Capture",
1046 .channels_min = HDA_MONO,
1047 .channels_max = HDA_MAX,
1048 .rates = SNDRV_PCM_RATE_8000_192000,
1049 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE |
1050 SNDRV_PCM_FMTBIT_S32_LE,
1051 },
1052 },
1053 {
1054 .name = "Digital CPU DAI",
1055 .ops = &skl_link_dai_ops,
1056 .playback = {
1057 .stream_name = "Digital CPU Playback",
1058 .channels_min = HDA_MONO,
1059 .channels_max = HDA_MAX,
1060 .rates = SNDRV_PCM_RATE_8000_192000,
1061 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE |
1062 SNDRV_PCM_FMTBIT_S32_LE,
1063 },
1064 .capture = {
1065 .stream_name = "Digital CPU Capture",
1066 .channels_min = HDA_MONO,
1067 .channels_max = HDA_MAX,
1068 .rates = SNDRV_PCM_RATE_8000_192000,
1069 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE |
1070 SNDRV_PCM_FMTBIT_S32_LE,
1071 },
1072 },
1073 };
1074
1075 int skl_dai_load(struct snd_soc_component *cmp, int index,
1076 struct snd_soc_dai_driver *dai_drv,
1077 struct snd_soc_tplg_pcm *pcm, struct snd_soc_dai *dai)
1078 {
1079 dai_drv->ops = &skl_pcm_dai_ops;
1080
1081 return 0;
1082 }
1083
1084 static int skl_platform_open(struct snd_pcm_substream *substream)
1085 {
1086 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1087 struct snd_soc_dai_link *dai_link = rtd->dai_link;
1088
1089 dev_dbg(rtd->cpu_dai->dev, "In %s:%s\n", __func__,
1090 dai_link->cpus->dai_name);
1091
1092 snd_soc_set_runtime_hwparams(substream, &azx_pcm_hw);
1093
1094 return 0;
1095 }
1096
1097 static int skl_coupled_trigger(struct snd_pcm_substream *substream,
1098 int cmd)
1099 {
1100 struct hdac_bus *bus = get_bus_ctx(substream);
1101 struct hdac_ext_stream *stream;
1102 struct snd_pcm_substream *s;
1103 bool start;
1104 int sbits = 0;
1105 unsigned long cookie;
1106 struct hdac_stream *hstr;
1107
1108 stream = get_hdac_ext_stream(substream);
1109 hstr = hdac_stream(stream);
1110
1111 dev_dbg(bus->dev, "In %s cmd=%d\n", __func__, cmd);
1112
1113 if (!hstr->prepared)
1114 return -EPIPE;
1115
1116 switch (cmd) {
1117 case SNDRV_PCM_TRIGGER_START:
1118 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
1119 case SNDRV_PCM_TRIGGER_RESUME:
1120 start = true;
1121 break;
1122
1123 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
1124 case SNDRV_PCM_TRIGGER_SUSPEND:
1125 case SNDRV_PCM_TRIGGER_STOP:
1126 start = false;
1127 break;
1128
1129 default:
1130 return -EINVAL;
1131 }
1132
1133 snd_pcm_group_for_each_entry(s, substream) {
1134 if (s->pcm->card != substream->pcm->card)
1135 continue;
1136 stream = get_hdac_ext_stream(s);
1137 sbits |= 1 << hdac_stream(stream)->index;
1138 snd_pcm_trigger_done(s, substream);
1139 }
1140
1141 spin_lock_irqsave(&bus->reg_lock, cookie);
1142
1143
1144 snd_hdac_stream_sync_trigger(hstr, true, sbits, AZX_REG_SSYNC);
1145
1146 snd_pcm_group_for_each_entry(s, substream) {
1147 if (s->pcm->card != substream->pcm->card)
1148 continue;
1149 stream = get_hdac_ext_stream(s);
1150 if (start)
1151 snd_hdac_stream_start(hdac_stream(stream), true);
1152 else
1153 snd_hdac_stream_stop(hdac_stream(stream));
1154 }
1155 spin_unlock_irqrestore(&bus->reg_lock, cookie);
1156
1157 snd_hdac_stream_sync(hstr, start, sbits);
1158
1159 spin_lock_irqsave(&bus->reg_lock, cookie);
1160
1161
1162 snd_hdac_stream_sync_trigger(hstr, false, sbits, AZX_REG_SSYNC);
1163 if (start)
1164 snd_hdac_stream_timecounter_init(hstr, sbits);
1165 spin_unlock_irqrestore(&bus->reg_lock, cookie);
1166
1167 return 0;
1168 }
1169
1170 static int skl_platform_pcm_trigger(struct snd_pcm_substream *substream,
1171 int cmd)
1172 {
1173 struct hdac_bus *bus = get_bus_ctx(substream);
1174
1175 if (!bus->ppcap)
1176 return skl_coupled_trigger(substream, cmd);
1177
1178 return 0;
1179 }
1180
1181 static snd_pcm_uframes_t skl_platform_pcm_pointer
1182 (struct snd_pcm_substream *substream)
1183 {
1184 struct hdac_ext_stream *hstream = get_hdac_ext_stream(substream);
1185 struct hdac_bus *bus = get_bus_ctx(substream);
1186 unsigned int pos;
1187
1188
1189
1190
1191
1192
1193
1194
1195
1196
1197
1198
1199
1200
1201
1202
1203
1204
1205
1206
1207
1208
1209 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
1210 pos = readl(bus->remap_addr + AZX_REG_VS_SDXDPIB_XBASE +
1211 (AZX_REG_VS_SDXDPIB_XINTERVAL *
1212 hdac_stream(hstream)->index));
1213 } else {
1214 udelay(20);
1215 readl(bus->remap_addr +
1216 AZX_REG_VS_SDXDPIB_XBASE +
1217 (AZX_REG_VS_SDXDPIB_XINTERVAL *
1218 hdac_stream(hstream)->index));
1219 pos = snd_hdac_stream_get_pos_posbuf(hdac_stream(hstream));
1220 }
1221
1222 if (pos >= hdac_stream(hstream)->bufsize)
1223 pos = 0;
1224
1225 return bytes_to_frames(substream->runtime, pos);
1226 }
1227
1228 static u64 skl_adjust_codec_delay(struct snd_pcm_substream *substream,
1229 u64 nsec)
1230 {
1231 struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
1232 struct snd_soc_dai *codec_dai = rtd->codec_dai;
1233 u64 codec_frames, codec_nsecs;
1234
1235 if (!codec_dai->driver->ops->delay)
1236 return nsec;
1237
1238 codec_frames = codec_dai->driver->ops->delay(substream, codec_dai);
1239 codec_nsecs = div_u64(codec_frames * 1000000000LL,
1240 substream->runtime->rate);
1241
1242 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
1243 return nsec + codec_nsecs;
1244
1245 return (nsec > codec_nsecs) ? nsec - codec_nsecs : 0;
1246 }
1247
1248 static int skl_get_time_info(struct snd_pcm_substream *substream,
1249 struct timespec *system_ts, struct timespec *audio_ts,
1250 struct snd_pcm_audio_tstamp_config *audio_tstamp_config,
1251 struct snd_pcm_audio_tstamp_report *audio_tstamp_report)
1252 {
1253 struct hdac_ext_stream *sstream = get_hdac_ext_stream(substream);
1254 struct hdac_stream *hstr = hdac_stream(sstream);
1255 u64 nsec;
1256
1257 if ((substream->runtime->hw.info & SNDRV_PCM_INFO_HAS_LINK_ATIME) &&
1258 (audio_tstamp_config->type_requested == SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK)) {
1259
1260 snd_pcm_gettime(substream->runtime, system_ts);
1261
1262 nsec = timecounter_read(&hstr->tc);
1263 nsec = div_u64(nsec, 3);
1264 if (audio_tstamp_config->report_delay)
1265 nsec = skl_adjust_codec_delay(substream, nsec);
1266
1267 *audio_ts = ns_to_timespec(nsec);
1268
1269 audio_tstamp_report->actual_type = SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK;
1270 audio_tstamp_report->accuracy_report = 1;
1271 audio_tstamp_report->accuracy = 42;
1272
1273 } else {
1274 audio_tstamp_report->actual_type = SNDRV_PCM_AUDIO_TSTAMP_TYPE_DEFAULT;
1275 }
1276
1277 return 0;
1278 }
1279
1280 static const struct snd_pcm_ops skl_platform_ops = {
1281 .open = skl_platform_open,
1282 .ioctl = snd_pcm_lib_ioctl,
1283 .trigger = skl_platform_pcm_trigger,
1284 .pointer = skl_platform_pcm_pointer,
1285 .get_time_info = skl_get_time_info,
1286 .mmap = snd_pcm_lib_default_mmap,
1287 .page = snd_pcm_sgbuf_ops_page,
1288 };
1289
1290 static void skl_pcm_free(struct snd_pcm *pcm)
1291 {
1292 snd_pcm_lib_preallocate_free_for_all(pcm);
1293 }
1294
1295 #define MAX_PREALLOC_SIZE (32 * 1024 * 1024)
1296
1297 static int skl_pcm_new(struct snd_soc_pcm_runtime *rtd)
1298 {
1299 struct snd_soc_dai *dai = rtd->cpu_dai;
1300 struct hdac_bus *bus = dev_get_drvdata(dai->dev);
1301 struct snd_pcm *pcm = rtd->pcm;
1302 unsigned int size;
1303 struct skl_dev *skl = bus_to_skl(bus);
1304
1305 if (dai->driver->playback.channels_min ||
1306 dai->driver->capture.channels_min) {
1307
1308 size = CONFIG_SND_HDA_PREALLOC_SIZE * 1024;
1309 if (size > MAX_PREALLOC_SIZE)
1310 size = MAX_PREALLOC_SIZE;
1311 snd_pcm_lib_preallocate_pages_for_all(pcm,
1312 SNDRV_DMA_TYPE_DEV_SG,
1313 snd_dma_pci_data(skl->pci),
1314 size, MAX_PREALLOC_SIZE);
1315 }
1316
1317 return 0;
1318 }
1319
1320 static int skl_get_module_info(struct skl_dev *skl,
1321 struct skl_module_cfg *mconfig)
1322 {
1323 struct skl_module_inst_id *pin_id;
1324 guid_t *uuid_mod, *uuid_tplg;
1325 struct skl_module *skl_module;
1326 struct uuid_module *module;
1327 int i, ret = -EIO;
1328
1329 uuid_mod = (guid_t *)mconfig->guid;
1330
1331 if (list_empty(&skl->uuid_list)) {
1332 dev_err(skl->dev, "Module list is empty\n");
1333 return -EIO;
1334 }
1335
1336 list_for_each_entry(module, &skl->uuid_list, list) {
1337 if (guid_equal(uuid_mod, &module->uuid)) {
1338 mconfig->id.module_id = module->id;
1339 if (mconfig->module)
1340 mconfig->module->loadable = module->is_loadable;
1341 ret = 0;
1342 break;
1343 }
1344 }
1345
1346 if (ret)
1347 return ret;
1348
1349 uuid_mod = &module->uuid;
1350 ret = -EIO;
1351 for (i = 0; i < skl->nr_modules; i++) {
1352 skl_module = skl->modules[i];
1353 uuid_tplg = &skl_module->uuid;
1354 if (guid_equal(uuid_mod, uuid_tplg)) {
1355 mconfig->module = skl_module;
1356 ret = 0;
1357 break;
1358 }
1359 }
1360 if (skl->nr_modules && ret)
1361 return ret;
1362
1363 list_for_each_entry(module, &skl->uuid_list, list) {
1364 for (i = 0; i < MAX_IN_QUEUE; i++) {
1365 pin_id = &mconfig->m_in_pin[i].id;
1366 if (guid_equal(&pin_id->mod_uuid, &module->uuid))
1367 pin_id->module_id = module->id;
1368 }
1369
1370 for (i = 0; i < MAX_OUT_QUEUE; i++) {
1371 pin_id = &mconfig->m_out_pin[i].id;
1372 if (guid_equal(&pin_id->mod_uuid, &module->uuid))
1373 pin_id->module_id = module->id;
1374 }
1375 }
1376
1377 return 0;
1378 }
1379
1380 static int skl_populate_modules(struct skl_dev *skl)
1381 {
1382 struct skl_pipeline *p;
1383 struct skl_pipe_module *m;
1384 struct snd_soc_dapm_widget *w;
1385 struct skl_module_cfg *mconfig;
1386 int ret = 0;
1387
1388 list_for_each_entry(p, &skl->ppl_list, node) {
1389 list_for_each_entry(m, &p->pipe->w_list, node) {
1390 w = m->w;
1391 mconfig = w->priv;
1392
1393 ret = skl_get_module_info(skl, mconfig);
1394 if (ret < 0) {
1395 dev_err(skl->dev,
1396 "query module info failed\n");
1397 return ret;
1398 }
1399
1400 skl_tplg_add_moduleid_in_bind_params(skl, w);
1401 }
1402 }
1403
1404 return ret;
1405 }
1406
1407 static int skl_platform_soc_probe(struct snd_soc_component *component)
1408 {
1409 struct hdac_bus *bus = dev_get_drvdata(component->dev);
1410 struct skl_dev *skl = bus_to_skl(bus);
1411 const struct skl_dsp_ops *ops;
1412 int ret;
1413
1414 pm_runtime_get_sync(component->dev);
1415 if (bus->ppcap) {
1416 skl->component = component;
1417
1418
1419 skl->debugfs = skl_debugfs_init(skl);
1420
1421 ret = skl_tplg_init(component, bus);
1422 if (ret < 0) {
1423 dev_err(component->dev, "Failed to init topology!\n");
1424 return ret;
1425 }
1426
1427
1428 ops = skl_get_dsp_ops(skl->pci->device);
1429 if (!ops)
1430 return -EIO;
1431
1432
1433
1434
1435
1436 skl->enable_miscbdcge(component->dev, false);
1437 skl->clock_power_gating(component->dev, false);
1438
1439 ret = ops->init_fw(component->dev, skl);
1440 skl->enable_miscbdcge(component->dev, true);
1441 skl->clock_power_gating(component->dev, true);
1442 if (ret < 0) {
1443 dev_err(component->dev, "Failed to boot first fw: %d\n", ret);
1444 return ret;
1445 }
1446 skl_populate_modules(skl);
1447 skl->update_d0i3c = skl_update_d0i3c;
1448
1449 if (skl->cfg.astate_cfg != NULL) {
1450 skl_dsp_set_astate_cfg(skl,
1451 skl->cfg.astate_cfg->count,
1452 skl->cfg.astate_cfg);
1453 }
1454 }
1455 pm_runtime_mark_last_busy(component->dev);
1456 pm_runtime_put_autosuspend(component->dev);
1457
1458 return 0;
1459 }
1460
1461 static void skl_pcm_remove(struct snd_soc_component *component)
1462 {
1463 struct hdac_bus *bus = dev_get_drvdata(component->dev);
1464 struct skl_dev *skl = bus_to_skl(bus);
1465
1466 skl_tplg_exit(component, bus);
1467
1468 skl_debugfs_exit(skl);
1469 }
1470
1471 static const struct snd_soc_component_driver skl_component = {
1472 .name = "pcm",
1473 .probe = skl_platform_soc_probe,
1474 .remove = skl_pcm_remove,
1475 .ops = &skl_platform_ops,
1476 .pcm_new = skl_pcm_new,
1477 .pcm_free = skl_pcm_free,
1478 .module_get_upon_open = 1,
1479 };
1480
1481 int skl_platform_register(struct device *dev)
1482 {
1483 int ret;
1484 struct snd_soc_dai_driver *dais;
1485 int num_dais = ARRAY_SIZE(skl_platform_dai);
1486 struct hdac_bus *bus = dev_get_drvdata(dev);
1487 struct skl_dev *skl = bus_to_skl(bus);
1488
1489 skl->dais = kmemdup(skl_platform_dai, sizeof(skl_platform_dai),
1490 GFP_KERNEL);
1491 if (!skl->dais) {
1492 ret = -ENOMEM;
1493 goto err;
1494 }
1495
1496 if (!skl->use_tplg_pcm) {
1497 dais = krealloc(skl->dais, sizeof(skl_fe_dai) +
1498 sizeof(skl_platform_dai), GFP_KERNEL);
1499 if (!dais) {
1500 ret = -ENOMEM;
1501 goto err;
1502 }
1503
1504 skl->dais = dais;
1505 memcpy(&skl->dais[ARRAY_SIZE(skl_platform_dai)], skl_fe_dai,
1506 sizeof(skl_fe_dai));
1507 num_dais += ARRAY_SIZE(skl_fe_dai);
1508 }
1509
1510 ret = devm_snd_soc_register_component(dev, &skl_component,
1511 skl->dais, num_dais);
1512 if (ret)
1513 dev_err(dev, "soc component registration failed %d\n", ret);
1514 err:
1515 return ret;
1516 }
1517
1518 int skl_platform_unregister(struct device *dev)
1519 {
1520 struct hdac_bus *bus = dev_get_drvdata(dev);
1521 struct skl_dev *skl = bus_to_skl(bus);
1522 struct skl_module_deferred_bind *modules, *tmp;
1523
1524 if (!list_empty(&skl->bind_list)) {
1525 list_for_each_entry_safe(modules, tmp, &skl->bind_list, node) {
1526 list_del(&modules->node);
1527 kfree(modules);
1528 }
1529 }
1530
1531 kfree(skl->dais);
1532
1533 return 0;
1534 }